armv7 SPL: TAG(overwrite 'b 1f')+'b reset' + ARM_VECTORS
armv7 U-Boot: ARM_VECTORS
armv8 SPL: TAG(overwrite 'b 1f')+'b reset' + Reserved_iram(rk3399)
armv8 U-Boot: 'b reset'
Signed-off-by: Kever Yang
---
arch/arm/include/asm/arch-rockchip/boot0.h | 14 +-
1 file changed, 9 insertion
>> Update rockchip U-Boot location to 0x4000/16384.
>>
>> Signed-off-by: Kever Yang
>> Acked-by: Philipp Tomsich
>> Reviewed-by: Philipp Tomsich
>> ---
>>
>> doc/README.rockchip | 6 +++---
>> 1 file changed, 3 insertions(+), 3 deletions(-)
>>
>
> Applied to u-boot-rockchip, thanks!
I just
On Fri, Nov 10, 2017 at 12:11 PM, Goldschmidt Simon
wrote:
> On Mon, Oct 30, 2017 at 7:26 AM, Jagan Teki wrote:
>> I've similar change on my patchwork, since no-one tested Will CC you by
>> re-basing it please have test?
>
> Yes, of course I'd like to test this. Where do I find your patch?
Will
On Fri, Nov 10, 2017 at 11:34 AM, Chen-Yu Tsai wrote:
> On Fri, Nov 10, 2017 at 2:01 PM, Jagan Teki wrote:
>> On Fri, Nov 10, 2017 at 9:52 AM, Chen-Yu Tsai wrote:
>>> On Wed, Sep 27, 2017 at 11:46 PM, Joe Hershberger
>>> wrote:
On Fri, Sep 22, 2017 at 2:26 AM, Chen-Yu Tsai wrote:
> On
> -Original Message-
> From: York Sun
> Sent: Thursday, November 09, 2017 2:02 AM
> To: Rajesh Bhagat ; u-boot@lists.denx.de
> Cc: Prabhakar Kushwaha ; Priyanka Jain
> ; Ashish Kumar
> Subject: Re: [PATCH v4 1/7] armv8: lsch3: Add serdes and DDR voltage setup
>
> On 11/07/2017 02:37 AM,
On Mon, Oct 30, 2017 at 7:26 AM, Jagan Teki wrote:
> I've similar change on my patchwork, since no-one tested Will CC you by
> re-basing it please have test?
Yes, of course I'd like to test this. Where do I find your patch?
Simon
___
U-Boot mailing li
On Thu, Nov 9, 2017 at 5:09 PM, Baruch Siach wrote:
> Calling .set_speed with zero speed is definitely a bug. Return an error value
> to handle that gracefully instead of crashing.
>
> Signed-off-by: Baruch Siach
> ---
> drivers/spi/kirkwood_spi.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> di
On Fri, Nov 10, 2017 at 2:01 PM, Jagan Teki wrote:
> On Fri, Nov 10, 2017 at 9:52 AM, Chen-Yu Tsai wrote:
>> On Wed, Sep 27, 2017 at 11:46 PM, Joe Hershberger
>> wrote:
>>> On Fri, Sep 22, 2017 at 2:26 AM, Chen-Yu Tsai wrote:
Only the H3/H5 SoCs have an internal PHY and its related clock a
Instruction prefetch feature is by default enabled during core
release.
This patch add support of disabling instruction prefetch by setting
core mask in PPA. Here each core mask bit represents a core and
prefetch is disabled at the time of core release.
Signed-off-by: Prabhakar Kushwaha
---
Chan
On Fri, Nov 10, 2017 at 9:52 AM, Chen-Yu Tsai wrote:
> On Wed, Sep 27, 2017 at 11:46 PM, Joe Hershberger
> wrote:
>> On Fri, Sep 22, 2017 at 2:26 AM, Chen-Yu Tsai wrote:
>>> Only the H3/H5 SoCs have an internal PHY and its related clock and
>>> reset controls.
>>>
>>> Use an #ifdef to guard the
On 2 November 2017 at 08:53, Michal Simek wrote:
> The patch:
> "dm: ahci: Unwind the confusing init code"
> (sha1: 7cf1afce7fa3fe64189020fe14b93f7326dd0758)
> introduce bug for ceva sata because port didn't start.
> On the other hand the dwc_ahci.c was fixed correctly.
> Do the same change for ce
On 26 October 2017 at 05:23, wrote:
> From: Patrice Chotard
>
> Fix clock division factor initialization for RCC_PLLCFGR
> registers.
>
> PLLR bits (bit 31-28) in RCC_PLLCFGR must not be cleared,
> it's a forbidden value. So update RCC_PLLCFGR using
> clrsetbits_le32() to set only necessary bits
On 2 November 2017 at 08:55, Michal Simek wrote:
> s/achi_/ahci_/g
>
> Signed-off-by: Michal Simek
> ---
>
> drivers/ata/ahci.c | 4 ++--
> drivers/ata/dwc_ahci.c | 2 +-
> drivers/ata/sata_ceva.c | 4 ++--
> include/ahci.h | 8
> 4 files changed, 9 insertions(+), 9 delet
On 7 November 2017 at 09:18, Tuomas Tynkkynen wrote:
> Currently, if the user has compiled the libfdt Python module from dtc
> upstream to a non-default location, it cannot be used because the
> 'PYTHONPATH=tools' assignment wipes out the user's PYTHONPATH.
> Instead, extend PYTHONPATH in the main
On 9 November 2017 at 04:44, Baruch Siach wrote:
> Fixes: 4984de2baaa ("dm: core: Add ofnode to represent device tree nodes")
> Cc: Simon Glass
> Signed-off-by: Baruch Siach
> ---
> include/dm/ofnode.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Simon Glass
__
Hi Jagan,
On 3 November 2017 at 06:05, Jagan Teki wrote:
> This specific issue observed with SPL_DM_MMC in falcon mode on
> rk3288 which used dw_mmc.c driver.
>
> Bug details:
> ---
> based on the falcon configuration, SPL trying to read the kernel from
> specified sectors, while mmc send
On 27 October 2017 at 22:22, wrote:
> From: Dongjin Kim
>
> Since CONFIG_DEFAULT_CONSOLE is already started with "console=",
> the console argument in CONFIG_EXTRA_ENV_SETTINGS is expanded to
> "console=console=ttySAC1,115200n8" and this causes the wrong
> console device.
>
> #define CONFIG_DE
Hi,
On 23 October 2017 at 01:35, Kever Yang wrote:
> Philipp,
>
>
> On 10/20/2017 05:00 PM, Dr. Philipp Tomsich wrote:
>>
>> Kever,
>>
>>> On 20 Oct 2017, at 03:59, Kever Yang wrote:
>>>
>>> Hi Simon and Philipp.
>>>
>>> I would like to include Heiko who is maintainer of upstream kernel
>>>
Hi Kever,
On 25 October 2017 at 19:37, Kever Yang wrote:
>
> Hi Simon,Philipp,
>
> I still confuse about how the SPL/TPL build system works, including what
> Kconfig will be used,
> and how to write the Makefile suppose to be correct.
>
> I'm trying to enable the SPL/TPL for rk3328, I wa
Hi,
On 25 October 2017 at 09:02, albert008.xu wrote:
> Dear Simon
>I'm reading doc/README.fdt-control written by U in u-boot source. you
> said CONFIG_OF_EMBED is defined ,dtb will be built into u-boot image.This
> is suitable for debugging and is not recommended for producton.
> Why CONFIG_
On Wed, Sep 27, 2017 at 11:46 PM, Joe Hershberger
wrote:
> On Fri, Sep 22, 2017 at 2:26 AM, Chen-Yu Tsai wrote:
>> Only the H3/H5 SoCs have an internal PHY and its related clock and
>> reset controls.
>>
>> Use an #ifdef to guard the internal PHY control code block so it
>> can be built for other
Andy,
On 11/09/2017 05:03 AM, Dr. Philipp Tomsich wrote:
Andy,
On 9 Nov 2017, at 13:59, Andy Yan wrote:
Hi Phipipp, Kever:
On 2017年10月10日 22:21, Philipp Tomsich wrote:
From: Kever Yang
The '_start' is using as vector table base address, and will write
to VBAR register, so it needs to be
On Thu, Nov 09, 2017 at 05:15:53PM +0530, Jagan Teki wrote:
> Hi Tom,
>
> Few fixes for v2017.11, Please pull the same.
>
> thanks!
> Jagan.
>
> The following changes since commit 43ede0bca7fc1590b623832b743213b818257a27:
>
> Kconfig: Migrate MTDIDS_DEFAULT / MTDPARTS_DEFAULT (2017-11-05 11:
On Thu, Nov 09, 2017 at 11:35:56AM +0100, Stefano Babic wrote:
> Hi Tom,
>
> some fixes for 2017.11. Please pull from u-boot-imx, thanks !
>
>
> The following changes since commit 7a69604bce9a9a9476753af64e5a1870880c1333:
>
> Prepare v2017.11-rc4 (2017-11-06 18:25:37 -0500)
>
> are availabl
> -Original Message-
> From: York Sun
> Sent: Thursday, November 09, 2017 11:22 PM
> To: Prabhakar Kushwaha ; u-
> b...@lists.denx.de
> Subject: Re: [PATCH] armv8: fsl-layerscape: Add support of disabling core
> prefetch
>
> On 11/08/2017 06:48 PM, Prabhakar Kushwaha wrote:
> > Instructio
On Thu, Nov 09, 2017 at 10:42:26AM +0100, Jorge Ramirez wrote:
> Hi all,
>
> Is there any work in progress - maybe a topic branch? to bring in Universal
> Flash Storage support into u-boot?
As far as I know, no, no one has done any work there just yet. Thanks!
--
Tom
signature.asc
Descript
On Thu, 9 Nov 2017 07:34:44 -0800
Andrey Yurovsky wrote:
> On Thu, Nov 9, 2017 at 1:55 AM, Lukasz Majewski
> wrote:
> > Hi Andrey,
> >
> >> Hi Otavio,
> >>
> >> On Wed, Nov 8, 2017 at 2:47 AM, Otavio Salvador
> >> wrote:
> >> > On Tue, Nov 7, 2017 at 10:43 PM, your name
> >> > wrote:
> >
The eMMC is 1V8 device only and the signaling is always 1V8,
fix the DT for Salvator-X/XS to describe the hardware correctly.
Signed-off-by: Marek Vasut
Cc: Nobuhiro Iwamatsu
---
arch/arm/dts/salvator-common.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/s
On 11/08/2017 06:48 PM, Prabhakar Kushwaha wrote:
> Instruction prefetch feature is by default enabled during core
> release.
>
> This patch add support of disabling instruction prefetch by setting
> core mask in PPA. Here each core mask bit represents a core and
> prefetch is disabled at the time
On 11/08/2017 09:16 PM, Ashish Kumar wrote:
> -Original Message-
> From: York Sun
> Sent: Thursday, November 09, 2017 2:07 AM
> To: Ashish Kumar ; u-boot@lists.denx.de
> Cc: joe.hershber...@ni.com; Prabhakar Kushwaha
> Subject: Re: [PATCH] driver: net: ldpaa_eth: Add PHY-less SGMII suppor
Hi,
On 09/11/17 15:23, Jagan Teki wrote:
> Hi Andre,
>
> On Thu, Nov 9, 2017 at 5:48 PM, Andre Przywara wrote:
>> Hi,
>>
>> On 09/11/17 12:11, Maxime Ripard wrote:
>>> On Thu, Nov 09, 2017 at 01:29:21AM +0530, Jagan Teki wrote:
Hi,
I'm trying to increase SPL size to 64K(with SRAM
From: Siva Durga Prasad Paladugu
Add support for non processor mode, this mode doesn't have
access to some of the registers and hence this patch
bypasses it and also length has to be calculated from
status instead of app4 in this mode.
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Mi
From: Siva Durga Prasad Paladugu
Read dma address using fdtdec_get_addr as it checks for
address cells and size cells and reads the address
properly. fdtdec_get_int always assume address is of int
size which goes wrong if using it on 64-bit architecture.
Signed-off-by: Siva Durga Prasad Paladugu
From: Siva Durga Prasad Paladugu
Use wait_for_bit instead while loop during init
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek
---
drivers/net/xilinx_axi_emac.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/net/xilinx_axi_emac
Hi Andre,
On Thu, Nov 9, 2017 at 5:48 PM, Andre Przywara wrote:
> Hi,
>
> On 09/11/17 12:11, Maxime Ripard wrote:
>> On Thu, Nov 09, 2017 at 01:29:21AM +0530, Jagan Teki wrote:
>>> Hi,
>>>
>>> I'm trying to increase SPL size to 64K(with SRAM A2), so-that SPL can
>>> able to fit new features like
On 09/11/2017 15:57, vnktux wrote:
> Hi guys,
>
> For my graduation project I need to port Broadwell-DE in u-boot, and use it
> as bare-metal bootloader on our platform.
> Our platform currently run Coreboot + U-Boot but of course they want to get
> rid of the first one. The final 16Mb rom file
Hi guys,
For my graduation project I need to port Broadwell-DE in u-boot, and use it as
bare-metal bootloader on our platform.
Our platform currently run Coreboot + U-Boot but of course they want to get rid
of the first one. The final 16Mb rom file is created using a tool from Intel
that basica
On 8.11.2017 10:24, Wilson Lee wrote:
> Hi Michal,
>
> On Wed, 2017-11-08 at 08:54 +0100, Michal Simek wrote:
>> On 8.11.2017 03:44, Wilson Lee wrote:
>>>
>>> Putting board_nand_init() function inside NAND driver was not
>>> appropriate
>>> due to it doesn't allow board vendor to customise their N
Andy,
On 9 Nov 2017, at 13:59, Andy Yan wrote:
>
> Hi Phipipp, Kever:
>
>
> On 2017年10月10日 22:21, Philipp Tomsich wrote:
>> From: Kever Yang
>>
>> The '_start' is using as vector table base address, and will write
>> to VBAR register, so it needs to be aligned to 0x20 for armv7.
>>
>> Signe
Hi Phipipp, Kever:
On 2017年10月10日 22:21, Philipp Tomsich wrote:
From: Kever Yang
The '_start' is using as vector table base address, and will write
to VBAR register, so it needs to be aligned to 0x20 for armv7.
Signed-off-by: Kever Yang
[Updated to current code base:]
Signed-off-by: Philipp
On Thu, Nov 09, 2017 at 06:11:58PM +0530, Jagan Teki wrote:
> On Thu, Nov 9, 2017 at 5:48 PM, Andre Przywara wrote:
> > Hi,
> >
> > On 09/11/17 12:11, Maxime Ripard wrote:
> >> On Thu, Nov 09, 2017 at 01:29:21AM +0530, Jagan Teki wrote:
> >>> Hi,
> >>>
> >>> I'm trying to increase SPL size to 64K(
Hi,
On 09/11/17 12:41, Jagan Teki wrote:
> On Thu, Nov 9, 2017 at 5:48 PM, Andre Przywara wrote:
>> Hi,
>>
>> On 09/11/17 12:11, Maxime Ripard wrote:
>>> On Thu, Nov 09, 2017 at 01:29:21AM +0530, Jagan Teki wrote:
Hi,
I'm trying to increase SPL size to 64K(with SRAM A2), so-that SP
On Thu, Nov 9, 2017 at 5:48 PM, Andre Przywara wrote:
> Hi,
>
> On 09/11/17 12:11, Maxime Ripard wrote:
>> On Thu, Nov 09, 2017 at 01:29:21AM +0530, Jagan Teki wrote:
>>> Hi,
>>>
>>> I'm trying to increase SPL size to 64K(with SRAM A2), so-that SPL can
>>> able to fit new features like falcon. I k
Hi Andrey,
> Hi Otavio,
>
> On Wed, Nov 8, 2017 at 2:47 AM, Otavio Salvador
> wrote:
> > On Tue, Nov 7, 2017 at 10:43 PM, your name
> > wrote:
> >> From: Andrey Yurovsky
> >>
> >> It is useful to be able to retrieve a partition UUID or number
> >> given the partition label, for instance some
All current ClearFog SOMs have the SPI flash populated. Enable SPI flash in
the device tree.
Add an alias to the SPI bus so that the 'sf' command can probe the flash on
bus 1.
Add the "spi-flash" compatible string to make the standard SPI flash driver
probe the device.
Signed-off-by: Baruch Siac
From: Jon Nettleton
The production variant of the SPI flash used by the clearfog
devices are based on winbond chips. Additionally enable
SPI_FLASH_BAR since some variants will have 16MB of flash
that requires this to be enabled.
Remove the default speed and mode; these values are taken from the
On Thu, Nov 9, 2017 at 5:36 PM, Maxime Ripard
wrote:
> On Thu, Nov 09, 2017 at 05:12:08PM +0530, Jagan Teki wrote:
>> On Thu, Nov 9, 2017 at 3:06 PM, Maxime Ripard
>> wrote:
>> > On Thu, Nov 09, 2017 at 02:48:18PM +0530, Jagan Teki wrote:
>> >> On Wed, Nov 8, 2017 at 5:35 PM, Peter Robinson
>>
Hi,
On 09/11/17 12:11, Maxime Ripard wrote:
> On Thu, Nov 09, 2017 at 01:29:21AM +0530, Jagan Teki wrote:
>> Hi,
>>
>> I'm trying to increase SPL size to 64K(with SRAM A2), so-that SPL can
>> able to fit new features like falcon. I knew the limit about 32K but
>> page[1] stating that we can use ap
On Thu, Nov 09, 2017 at 01:29:21AM +0530, Jagan Teki wrote:
> Hi,
>
> I'm trying to increase SPL size to 64K(with SRAM A2), so-that SPL can
> able to fit new features like falcon. I knew the limit about 32K but
> page[1] stating that we can use approximately 192 KiB of contiguous
> SRAM.
>
> eGON
On Thu, Nov 09, 2017 at 11:53:48AM +, Andre Przywara wrote:
> >>> because I've tried with 64K SPL size with existing SPL code and was
> >>> able to boot, but with increasing SPL by enabling falcon seems like
> >>> BROM unable read eGON.BT0 which eventually booting failed. Any inputs?
> >>
> >>
On Thu, Nov 09, 2017 at 05:12:08PM +0530, Jagan Teki wrote:
> On Thu, Nov 9, 2017 at 3:06 PM, Maxime Ripard
> wrote:
> > On Thu, Nov 09, 2017 at 02:48:18PM +0530, Jagan Teki wrote:
> >> On Wed, Nov 8, 2017 at 5:35 PM, Peter Robinson
> >> wrote:
> >> > On Wed, Nov 8, 2017 at 11:32 AM, Jagan Teki
On Thu, Nov 9, 2017 at 5:23 PM, Andre Przywara wrote:
> Hi,
>
> On 09/11/17 11:38, Jagan Teki wrote:
>> Hi Andre,
>>
>> On Thu, Nov 9, 2017 at 3:36 AM, André Przywara
>> wrote:
>>> On 08/11/17 19:59, Jagan Teki wrote:
Hi,
I'm trying to increase SPL size to 64K(with SRAM A2), so-th
Hi,
On 09/11/17 11:38, Jagan Teki wrote:
> Hi Andre,
>
> On Thu, Nov 9, 2017 at 3:36 AM, André Przywara wrote:
>> On 08/11/17 19:59, Jagan Teki wrote:
>>> Hi,
>>>
>>> I'm trying to increase SPL size to 64K(with SRAM A2), so-that SPL can
>>> able to fit new features like falcon. I knew the limit
The 'flash' pointer is assigned unconditionally a few lines below, and is not
used before that.
Signed-off-by: Baruch Siach
---
cmd/sf.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/cmd/sf.c b/cmd/sf.c
index f971eec781cc..9be8a89bc84c 100644
--- a/cmd/sf.c
+++ b/cmd/sf.c
@@ -126,7 +126,6 @
On Thu, 2017-11-09 at 11:19 +0100, Lukasz Majewski wrote:
> Hi Martyn,
>
> > *** Resend due to previous use of unsubscribed email address ***
>
> Just a small remark.
>
> You may consider using patman to get the list of u-boot community peers
> to be CC'ed for your patch. Or at least look for a
Hi everyone,
can someone help me on how to boot a bare metal application in svc secure
mode on the Cubieboard 2?
Thanks a lot in advance
--
Sent from: http://u-boot.10912.n7.nabble.com/
___
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U-Boot@lists.denx.de
https://lists.denx.de
On 02 August 2017 15:49, Tom Rini wrote:
> On Wed, Aug 02, 2017 at 11:58:42AM +0200, Stefano Babic wrote:
> > On 07/07/2017 12:40, Ben Whitten wrote:
> > > This board is based on the Atmel 9x5 eval board.
> > > Supporting the following features:
> > > - Boot from NAND Flash
> > > - Ethernet
> > >
Hi Tom,
Few fixes for v2017.11, Please pull the same.
thanks!
Jagan.
The following changes since commit 43ede0bca7fc1590b623832b743213b818257a27:
Kconfig: Migrate MTDIDS_DEFAULT / MTDPARTS_DEFAULT (2017-11-05 11:21:35 -0500)
are available in the git repository at:
git://git.denx.de/u-boot
Fixes: 4984de2baaa ("dm: core: Add ofnode to represent device tree nodes")
Cc: Simon Glass
Signed-off-by: Baruch Siach
---
include/dm/ofnode.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 79374b8f91aa..8b9932a569ce 100644
---
Calling .set_speed with zero speed is definitely a bug. Return an error value
to handle that gracefully instead of crashing.
Signed-off-by: Baruch Siach
---
drivers/spi/kirkwood_spi.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c
in
On Thu, Nov 9, 2017 at 3:06 PM, Maxime Ripard
wrote:
> On Thu, Nov 09, 2017 at 02:48:18PM +0530, Jagan Teki wrote:
>> On Wed, Nov 8, 2017 at 5:35 PM, Peter Robinson wrote:
>> > On Wed, Nov 8, 2017 at 11:32 AM, Jagan Teki
>> > wrote:
>> >> On Tue, Nov 7, 2017 at 5:43 PM, Jagan Teki
>> >> wrote
Hi Andre,
On Thu, Nov 9, 2017 at 3:36 AM, André Przywara wrote:
> On 08/11/17 19:59, Jagan Teki wrote:
>> Hi,
>>
>> I'm trying to increase SPL size to 64K(with SRAM A2), so-that SPL can
>> able to fit new features like falcon. I knew the limit about 32K but
>> page[1] stating that we can use appr
Hi Joe et. al.
After setting MAC address to invalid value 00:00:00:00:00:00 and resetting to a
valid one, u-boot will run into a recursive endless loop until no memory is
left to allocate a new MAC address:
=> print eth1addr
eth1addr=00:a0:a5:10:20:31
=> setenv eth1addr 00:00:00:00:00:00
=> set
The board uses T-topology for the four x16 DRAM chips, so remove
the write-leveling from the SPL as that is only usefly on fly-by
topology and can be harmful on T-topology. Also update the DRAM
timing with values from calibration on multiple boards.
Signed-off-by: Marek Vasut
Cc: Stefano Babic
-
On 11/09/2017 11:00 AM, Lukasz Majewski wrote:
> On Thu, 9 Nov 2017 08:05:18 +0100
> Marek Vasut wrote:
>
>> On 11/09/2017 07:04 AM, Chee, Tien Fong wrote:
>>> On Sel, 2017-11-07 at 10:34 +0100, Marek Vasut wrote:
On 11/07/2017 10:03 AM, Chee, Tien Fong wrote:
>
> On Isn, 2017-11
mac help does not reflect correct descriptions and parameter.
So update mac help command.
Signed-off-by: Prabhakar Kushwaha
---
cmd/mac.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/cmd/mac.c b/cmd/mac.c
index 52d3ba0..4d0dd2b 100644
--- a/
Hi Tom,
some fixes for 2017.11. Please pull from u-boot-imx, thanks !
The following changes since commit 7a69604bce9a9a9476753af64e5a1870880c1333:
Prepare v2017.11-rc4 (2017-11-06 18:25:37 -0500)
are available in the git repository at:
git://www.denx.de/git/u-boot-imx.git master
for you
Hi Martyn,
> *** Resend due to previous use of unsubscribed email address ***
Just a small remark.
You may consider using patman to get the list of u-boot community peers
to be CC'ed for your patch. Or at least look for a custodian (in
MAINTAINERS) responsible to IMX (NXP) SoC part of u-boot (in
Signed-off-by: Shengzhou Liu
---
include/configs/ls2080ardb.h | 39 ---
1 file changed, 32 insertions(+), 7 deletions(-)
diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index 48c3a5397f..650db2f594 100644
--- a/include/configs/ls2080ar
Signed-off-by: Shengzhou Liu
---
include/configs/ls1021atwr.h | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 0f20e5e2cc..5be61ad7b6 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/config
Signed-off-by: Shengzhou Liu
---
include/configs/ls1043a_common.h | 15 +++
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index a24d0062d2..140ea23902 100644
--- a/include/configs/ls1043a_common.h
+++
Signed-off-by: Shengzhou Liu
---
include/configs/ls1046a_common.h | 11 +++
include/configs/ls1046ardb.h | 6 ++
2 files changed, 13 insertions(+), 4 deletions(-)
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index 6d501b9c54..e7b1425c15 100644
Hi Prabhakar,
> Hi All,
>
> I am seeing following type of code for MAC address write for a
> network device.
>
> net/eth-uclass.c eth_post_probe() or net/eth_legacy.c
> eth_write_hwaddr()
>
> eth_env_get_enetaddr_by_index("eth", dev->seq, env_enetaddr);
> if (!is_zero_ethaddr(en
On 09/11/2017 10:49, Lukasz Majewski wrote:
> Hi Stefano,
>
>> Hi Lukasz,
>>
>> On 07/11/2017 11:10, Lukasz Majewski wrote:
>>> The sys_proto.h file has been included earlier in this file.
>>>
>>> Signed-off-by: Lukasz Majewski
>>>
>>> ---
>>>
>>> board/embest/mx6boards/mx6boards.c | 2 +-
>>> 1
On Mon, 6 Nov 2017 18:15:11 -0500
Tom Rini wrote:
> We first introduce CONFIG_USE_BOOTCOMMAND, similar to
> CONFIG_USE_BOOTARGS. We then migrate CONFIG_BOOTCOMMAND for most
> CONFIG_DISTRO_DEFAULT users. In some cases platforms have a complex
> scheme around this usage, and these have been def
On Thu, 9 Nov 2017 08:05:18 +0100
Marek Vasut wrote:
> On 11/09/2017 07:04 AM, Chee, Tien Fong wrote:
> > On Sel, 2017-11-07 at 10:34 +0100, Marek Vasut wrote:
> >> On 11/07/2017 10:03 AM, Chee, Tien Fong wrote:
> >>>
> >>> On Isn, 2017-11-06 at 11:56 +0100, Marek Vasut wrote:
>
>
Hi Stefano,
> Hi Lukasz,
>
> On 07/11/2017 11:10, Lukasz Majewski wrote:
> > The sys_proto.h file has been included earlier in this file.
> >
> > Signed-off-by: Lukasz Majewski
> >
> > ---
> >
> > board/embest/mx6boards/mx6boards.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
>
Hi all,
Is there any work in progress - maybe a topic branch? to bring in
Universal Flash Storage support into u-boot?
thanks
Jorge
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On Thu, Nov 09, 2017 at 02:48:18PM +0530, Jagan Teki wrote:
> On Wed, Nov 8, 2017 at 5:35 PM, Peter Robinson wrote:
> > On Wed, Nov 8, 2017 at 11:32 AM, Jagan Teki
> > wrote:
> >> On Tue, Nov 7, 2017 at 5:43 PM, Jagan Teki
> >> wrote:
> >>> On Sun, Nov 5, 2017 at 7:11 PM, Werner Böllmann
> >>>
On 06/11/2017 20:14, Martyn Welch wrote:
> From: Peter Senna Tschudin
>
> Create board support for GE PPD, based on mx53loco.
>
> Use mx53ppd_defconfig make target to configure for this board.
>
> Signed-off-by: Peter Senna Tschudin
> Signed-off-by: Ian Ray
> Signed-off-by: Nandor Han
> Sign
On 08/11/2017 16:35, Martyn Welch wrote:
> Add register definitions require for video configuration.
>
> Signed-off-by: Nandor Han
> Signed-off-by: Martyn Welch
> Reviewed-by: Stefano Babic
> Cc: Stefano Babic
> ---
> Changes in v5:
> - Reduced checkpatch warnings.
>
> arch/arm/include/asm
Assuming mac_clk is fed by an external clock, set clk_rmii_src
clock select control register from IO for rgmii interface.
Signed-off-by: David Wu
---
Changes in v2:
- New patch
drivers/clk/rockchip/clk_rk322x.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/clk/rock
On 08/11/2017 16:35, Martyn Welch wrote:
> Add missing parts for i.MX53 PWM support
>
> Acked-by: Nandor Han
> Signed-off-by: Martyn Welch
> Cc: Stefano Babic
> ---
> Changes for v4:
>- Removed ifdef.
>
> arch/arm/include/asm/arch-mx5/imx-regs.h | 17 +
> drivers/pwm/pwm-i
On 08/11/2017 16:35, Martyn Welch wrote:
> The VPD data is used on a number of GE products. Move the parsing code to
> a common location so that we can share this code.
>
> Signed-off-by: Martyn Welch
> ---
> Changes in v4:
>- New patch.
>
> Changes in v5:
>- Fixed checkpatch issues.
>
Set gmac pins iomux and rgmii tx pins to 12ma drive-strength,
clean others to 2ma.
Signed-off-by: David Wu
---
Changes in v2:
- New patch
drivers/pinctrl/rockchip/pinctrl_rk322x.c | 138 ++
1 file changed, 138 insertions(+)
diff --git a/drivers/pinctrl/rockchip/pin
Value provided in MC_MEM_SIZE_ENV_VAR is in hex.
So provide 16 as base in simple_strtoul.
Signed-off-by: Prabhakar Kushwaha
---
arch/arm/cpu/armv8/fsl-layerscape/doc/README.lsch3 | 2 +-
drivers/net/fsl-mc/mc.c| 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
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On 08/11/2017 16:35, Martyn Welch wrote:
> From: Ian Ray
>
> Some fixes when reading EXT files and directory entries were identified
> after using e2fuzz to corrupt an EXT3 filesystem:
>
> - Stop reading directory entries if the offset becomes badly aligned.
>
> - Avoid overwriting memory by
Add rk3328-evb gmac support.
Signed-off-by: David Wu
---
Changes in v2:
- New patch
arch/arm/dts/rk3328-evb.dts | 30 ++
1 file changed, 30 insertions(+)
diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index 3dd9d81..336c2d5 100644
--- a/arch
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Enable GMAC configs for evb-rk3328
Signed-off-by: David Wu
---
Changes in v2:
- New patch
configs/evb-rk3328_defconfig | 5 +
1 file changed, 5 insertions(+)
diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 3b8b104..3d8c04d 100644
--- a/configs/evb-rk3328_def
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The rk3328 soc has two gmac controllers, one is gmac2io,
the other is gmac2phy. We use the gmac2io rgmii interface
for 1000M phy here.
Signed-off-by: David Wu
---
Changes in v2:
- New patch
drivers/clk/rockchip/clk_rk3328.c | 20
include/dt-bindings/clock/rk3328-cru.h
Hi Lukasz,
On 07/11/2017 11:10, Lukasz Majewski wrote:
> The sys_proto.h file has been included earlier in this file.
>
> Signed-off-by: Lukasz Majewski
>
> ---
>
> board/embest/mx6boards/mx6boards.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/board/embest/mx6boa
Greetings Chris,
> Sent: Wednesday, November 08, 2017 at 12:21 PM
> From: "Chris Moore"
> To: daggs , "Tom Rini"
> Cc: u-boot@lists.denx.de
> Subject: Re: [U-Boot] u-boot <=> kernel compatibility?
>
> Hi,
>
> Le 08/11/2017 à 09:11, daggs a écrit :
> >> Greetings Tom,
> >>
> >>> Sent: Saturday,
On Wed, Nov 8, 2017 at 5:35 PM, Peter Robinson wrote:
> On Wed, Nov 8, 2017 at 11:32 AM, Jagan Teki wrote:
>> On Tue, Nov 7, 2017 at 5:43 PM, Jagan Teki wrote:
>>> On Sun, Nov 5, 2017 at 7:11 PM, Werner Böllmann
>>> wrote:
After updating u-boot from v2016.01 to 2017.09 i got a "SATA link 0
On Wed, Nov 8, 2017 at 5:17 PM, Jagan Teki wrote:
> On Wed, Nov 8, 2017 at 8:38 AM, Artturi Alm wrote:
>> due misnaming of CONFIG_SUN4I_EMAC in include/configs/sunxi-common.h,
>> likely missed in:
>> commit 3146f0c017df ("Move PHYLIB to Kconfig")
>>
>> Signed-off-by: Artturi Alm
>
> Revi
On Wed, Nov 8, 2017 at 5:17 PM, Jagan Teki wrote:
> On Wed, Nov 8, 2017 at 8:38 AM, Artturi Alm wrote:
>> fixes CONFIG_SUNXI_EMAC references from drivers/net/Makefile and
>> include/configs/sunxi-common.h likely forgotten in:
>> commit abc3e4df59f5 ("sunxi: Convert SUNXI_EMAC to Kconfig")
Need to set gmac m1 pins iomux, gmac m0 tx pins, select bit2
and bit10 at com iomux register. After that, set rgmii m1 tx
pins to 12ma drive-strength, and clean others to 2ma.
Signed-off-by: David Wu
---
Changes in v2:
- New patch
drivers/pinctrl/rockchip/pinctrl_rk3328.c | 236 +++
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