Hi Christian,
On Fri, Jun 9, 2017 at 8:58 AM, Tom Rini wrote:
> On Thu, Jun 08, 2017 at 09:38:49AM +0200, Christian Gmeiner wrote:
>> Hi Tom
>>
>> 2017-06-06 22:04 GMT+02:00 Tom Rini :
>> > On Tue, Jun 06, 2017 at 01:51:38PM +0200, Christian Gmeiner wrote:
>> >
>> >> Signed-off-by: Christian Gmei
since commit: f8b7fff1d5c5 "serial: atmel_usart: Add clk support"
smartweb board comes not up anymore. Fix it.
Signed-off-by: Heiko Schocher
---
arch/arm/dts/at91sam9260-smartweb.dts | 2 ++
board/siemens/smartweb/smartweb.c | 9 -
configs/smartweb_defconfig| 3 +++
inc
fix warnings:
drivers/usb/gadget/at91_udc.c:1344:12: warning: 'at91rm9200_udc_init' defined
but not used [-Wunused-function]
drivers/usb/gadget/at91_udc.c:1379:13: warning: 'at91rm9200_udc_pullup' defined
but not used [-Wunused-function]
drivers/usb/gadget/at91_udc.c:1476:12: warning: 'at91sam926
since commit: f8b7fff1d5c5 "serial: atmel_usart: Add clk support"
smartweb board comes not up anymore. Fix it.
While at it, fix compiler warning for drivers/usb/gadget/at91_udc.c
Heiko Schocher (2):
drivers, usb, gadget: fix compiler warnings for at91_udc.c
atmel, at91: fix smartweb board
On Sat, Jun 17, 2017 at 11:45 AM, Simon Glass wrote:
> On 16 June 2017 at 07:31, Bin Meng wrote:
>> As all x86 boards have been switched over to use DM USB, remove
>> CONFIG_USB_MAX_CONTROLLER_COUNT which is not used by DM USB.
>>
>> Signed-off-by: Bin Meng
>>
>> ---
>>
>> include/configs/conga
On Sat, Jun 17, 2017 at 11:44 AM, Simon Glass wrote:
> On 16 June 2017 at 07:31, Bin Meng wrote:
>> GPIO bank E pin 8 & 9 are used to control the on-board two USB ports
>> VBUS on/off. Let's configure them in the misc_init_r().
>>
>> Signed-off-by: Bin Meng
>> ---
>>
>> board/intel/minnowmax/mi
From: Ken Ma
In armada_37xx_gpiochip_register, the return value of fdtdec_get_bool
should be true when gpio-controller is found; current codes makes a
wrong inverse return value judgement, this patch fixes it.
Signed-off-by: Ken Ma
Cc: Simon Glass
Cc: Stefan Roese
Cc: Michal Simek
Cc: Kostya
From: Ken Ma
If north bridge selection register bit1 is clear, pins [10:8] are for
SDIO0 Resetn, Wakeup, and PDN while if bit1 is set, pins [10:8]are for
GPIO; when bit1 is clear, pin 9 and pin 10 can be used for uart2 RTSn
and CTSn, so bit1 should be added to uart2 group and it must be set
for b
From: Ken Ma
*** BLURB HERE ***
Fix 2 armada37x0 pinctrl issues.
Ken Ma (2):
pinctrl: a3700: Fix uart2 group selection register mask
pinctrl: a3700: Fix the issue that gpio controller is registered with
wrong node id
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 7 ---
1 file chang
Hi,
On Wed, Jun 21, 2017 at 8:44 PM, Bin Meng wrote:
> Hi Stefan,
>
> On Wed, Jun 21, 2017 at 8:07 PM, Stefan Roese wrote:
>> Hi Bin,
>>
>> On 21.06.2017 12:24, Bin Meng wrote:
>>> On Wed, Jun 21, 2017 at 5:28 PM, Stefan Roese wrote:
>>
>>
>>
As you can see, the 2 USB mass storage devices
since commit: f8b7fff1d5c5 "serial: atmel_usart: Add clk support"
corvus board comes not up anymore. Fix it.
Signed-off-by: Heiko Schocher
---
arch/arm/dts/at91sam9g45-corvus.dts | 2 ++
configs/corvus_defconfig| 6 ++
include/configs/corvus.h| 3 +--
3 files changed
Hello Christophe,
Am 21.06.2017 um 23:38 schrieb Christophe Leroy:
Signed-off-by: Christophe Leroy
---
v3: Fixed build error in arch/powerpc/include/asm/ppc.h ; removed commproc.h
from 4xx
v2: Tom squashed patches 1-10 of the serie
.travis.yml|2 +
MAIN
Hello Christophe,
Am 21.06.2017 um 18:47 schrieb Christophe LEROY:
Le 21/06/2017 à 17:51, Heiko Schocher a écrit :
Hello Christophe,
Am 21.06.2017 um 17:22 schrieb Tom Rini:
On Wed, Jun 21, 2017 at 05:09:09PM +0200, Christophe Leroy wrote:
CS Systemes d'Information (CSSI) manufactures two
On Wed, Jun 21, 2017 at 07:56:52AM -0400, Tom Rini wrote:
> On ARCH_SUNXI we've been selecting these targets for a long time if
> SUPPORT_SPL is set. However, Lichee Pi Zero is the first platform we've
> added that does support SPL but does not build SPL and has exposed a
> latent bug. Both of t
On Tue, Jun 20, 2017 at 12:04:45PM -0700, Tom Warren wrote:
> Tom,
>
> Please pull u-boot-tegra/master into U-Boot/master. Thanks!
>
> All Tegra builds are OK, and Stephen's automated test system reports that
> all tests pass.
> This is a bug fix, so please try to get it in to the next RC. Thank
On Tue, Jun 20, 2017 at 04:45:19PM +0200, Michal Simek wrote:
> Hi Tom,
>
> please pull these patches to your tree. Travis is not showing me any
> problem.
>
> Thanks,
> Michal
>
>
> The following changes since commit
> b9f7d8817424bb328d5eac9b16196a1189b8b6f5:
>
>powerpc, 5xx: remove so
On Tue, Jun 06, 2017 at 09:18:43AM -0300, Fabio Estevam wrote:
> I would like to help Stefano Babic as a co-maintainer of
> U-Boot i.MX.
>
> Signed-off-by: Fabio Estevam
> Acked-by: Stefano Babic
> Acked-by: Jagan Teki
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: Di
On Wed, Jun 21, 2017 at 11:41:02PM +0200, Christophe LEROY wrote:
>
> Le 21/06/2017 à 17:26, Tom Rini a écrit :
> >From: Christophe Leroy
> >
> >Please fill me in better with v3. I squahed the previous 1-10 into a
> >single commit that brings back the core of mpc8xx. Please add an entry
> >to M
Le 21/06/2017 à 17:26, Tom Rini a écrit :
From: Christophe Leroy
Please fill me in better with v3. I squahed the previous 1-10 into a
single commit that brings back the core of mpc8xx. Please add an entry
to MAINTAINERS for yourself for mpc8xx and do a travis-ci build and see
if we really n
On 21 June 2017 at 07:13, Philipp Tomsich
wrote:
> Adding myself to MAINTAINERS and git-mailrc for the rockchip
> sub-architecture.
>
> Signed-off-by: Philipp Tomsich
> ---
>
> MAINTAINERS| 1 +
> doc/git-mailrc | 3 ++-
> 2 files changed, 3 insertions(+), 1 deletion(-)
>
Acked-by: Simon Gl
Le 21/06/2017 à 17:51, Heiko Schocher a écrit :
Hello Christophe,
Am 21.06.2017 um 17:22 schrieb Tom Rini:
On Wed, Jun 21, 2017 at 05:09:09PM +0200, Christophe Leroy wrote:
CS Systemes d'Information (CSSI) manufactures two boards, named MCR3000
and CMPC885 which are respectively based on MP
On Wed, Jun 21, 2017 at 05:51:35PM +0200, Heiko Schocher wrote:
> Hello Christophe,
>
> Am 21.06.2017 um 17:22 schrieb Tom Rini:
> >On Wed, Jun 21, 2017 at 05:09:09PM +0200, Christophe Leroy wrote:
> >
> >>CS Systemes d'Information (CSSI) manufactures two boards, named MCR3000
> >>and CMPC885 whic
This change sets the VLDO4 settings output to 2.8V in PMIC
initialization so that the MIPI DSI and MIPI CSI input voltage
is 2.8V as per the schematics.
Signed-off-by: Gautam Bhat
---
board/freescale/mx7dsabresd/mx7dsabresd.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/board
This change sets the VLDO4 settings output to 2.8V in PMIC
initialization. I accidentally noticed this when I was testing
the DSI voltage input which was 3.3V. Not setting the proper voltage
can harm some of the voltage sensitive peripheral.
Gautam Bhat (1):
Set VLD04 output to 2.8V in PMIC in
On Wed, 14 Jun 2017, Kever Yang wrote:
The SPL_MAX_SIZE is the internal memory size minux the space
used by bootrom.
Signed-off-by: Kever Yang
Reviewed-by: Philipp Tomsich
Reviewed-by: Simon Glass
---
Applied to u-boot-rockchip/master, thanks!
On Wed, 14 Jun 2017, Kever Yang wrote:
The maximum spl_size for rk3399 is the internal memory size minus
the size used in bootrom (which usually can get from SPL_TEXT_BASE).
Signed-off-by: Kever Yang
Reviewed-by: Philipp Tomsich
Reviewed-by: Simon Glass
---
Applied to u-boot-rockchip/mas
On Thu, 8 Jun 2017, Tom Rini wrote:
This function is unused, remove. Reported by clang-3.8.
Fixes: a1c29d4b43dc ("rockchip: mkimage: set init_boot_size to avoid ...")
Cc: Philipp Tomsich
Signed-off-by: Tom Rini
Reviewed-by: Philipp Tomsich
---
Applied to u-boot-rockchip/master, thanks!
On Tue, 6 Jun 2017, Kever Yang wrote:
According to rk3036 TRM, pll_con1[12] should be set to '1' for the pll
interger mode, while the '0' means the frac mode.
Signed-off-by: Kever Yang
Acked-by: Simon Glass
Reviewed-by: Philipp Tomsich
---
Applied to u-boot-rockchip/master, thanks!
_
Hello Christophe,
Am 21.06.2017 um 17:22 schrieb Tom Rini:
On Wed, Jun 21, 2017 at 05:09:09PM +0200, Christophe Leroy wrote:
CS Systemes d'Information (CSSI) manufactures two boards, named MCR3000
and CMPC885 which are respectively based on MPC866 and MPC885.
This patch is the skeleton to allo
On Wed, Jun 21, 2017 at 05:09:09PM +0200, Christophe Leroy wrote:
> CS Systemes d'Information (CSSI) manufactures two boards, named MCR3000
> and CMPC885 which are respectively based on MPC866 and MPC885.
> This patch is the skeleton to allow soon inclusion of support for
> those two boards.
>
>
This reverts commit 9057df88e1f50d54b9765a5f98443455db4f63c6.
Signed-off-by: Christophe Leroy
---
drivers/serial/serial.c | 2 ++
include/netdev.h| 1 +
include/serial.h| 2 ++
3 files changed, 5 insertions(+)
diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c
index
CS Systemes d'Information (CSSI) manufactures two boards, named MCR3000
and CMPC885 which are respectively based on MPC866 and MPC885.
This patch is the skeleton to allow soon inclusion of support for
those two boards.
Signed-off-by: Christophe Leroy
---
The source code for those two boards need
This reverts commit b9f7d8817424bb328d5eac9b16196a1189b8b6f5.
Signed-off-by: Christophe Leroy
---
drivers/serial/serial.c | 1 +
include/serial.h| 1 +
tools/buildman/func_test.py | 1 +
tools/buildman/test.py | 1 +
4 files changed, 4 insertions(+)
diff --git a/drivers/ser
CS Systemes d'Information (CSSI) manufactures two boards, named MCR3000
and CMPC885 which are respectively based on MPC866 and MPC885.
This serie reverts the deletion of the 8xx support in order to allow
soon inclusion of support for those two boards.
The serie reverts the deletion of 8xx and all
Adding myself to MAINTAINERS and git-mailrc for the rockchip
sub-architecture.
Signed-off-by: Philipp Tomsich
---
MAINTAINERS| 1 +
doc/git-mailrc | 3 ++-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 56dd1f3..0186cfa 100644
--- a/MAINTAINERS
From: Patrice Chotard
Use an array to save enabled clocks reference and deasserted resets
in order to respectively disabled and asserted them in case of error
during probe() or during driver removal.
Signed-off-by: Patrice Chotard
---
v9: _ remove useless reset_free() and clk_free() in case
From: Patrice Chotard
Extend ehci-generic driver with generic PHY framework
Signed-off-by: Patrice Chotard
---
v9: _ none
v8: _ rework error path by propagating the initial error code until the end
of probe()
v7: _ none
v6: _ none
v5: _ none
v4: _ update the memory
From: Patrice Chotard
use array to save enabled clocks reference in order to
disabled them in case of error during probe() or during
driver removal.
Signed-off-by: Patrice Chotard
---
v9: _ remove useless clk_free() when a clock is correctly requested and
enabled
_ replace clk_disa
From: Patrice Chotard
Extend ohci-generic driver with generic PHY framework
Signed-off-by: Patrice Chotard
---
v9: _ none
v8: _ rework error path by propagating the initial error code until the end
of probe()
v7: _ none
v6: _ none
v5: _ none
v4: _ use generic_phy_v
From: Patrice Chotard
This function is usefull to get phandle number contained
in a property list.
For example, this allows to allocate the right amount
of memory to keep clock's reference contained into the
"clocks" property.
To implement it, either of_count_phandle_with_args() or
fdtdec_parse
From: Patrice Chotard
use array to save deasserted resets reference in order to
assert them in case of error during probe() or during driver
removal.
Signed-off-by: Patrice Chotard
---
v9: _ remove useless reset_free() when a reset is correctly requested and
deasserted
_ replace re
From: Patrice Chotard
this allows to get file, line and function location
of the current error message.
Signed-off-by: patrice chotard
Reviewed-by: Simon Glass
---
v9: _ none
v8: _ none
v7: _ none
v6: _ none
v5: _ none
v4: _ none
v3: _ add commit message
v2: _ c
Hi Stefan,
On Wed, Jun 21, 2017 at 8:07 PM, Stefan Roese wrote:
> Hi Bin,
>
> On 21.06.2017 12:24, Bin Meng wrote:
>> On Wed, Jun 21, 2017 at 5:28 PM, Stefan Roese wrote:
>
>
>
>>> As you can see, the 2 USB mass storage devices which are connected
>>> to the xHCI HSIC port are only detected aft
From: Patrice Chotard
Add reset_release_all() method which Assert/Free an
array of resets signal that has been previously successfully
requested by reset_get_by_*()
Signed-off-by: Patrice Chotard
---
v9: _ to avoid confusion, rename reset_assert_all() in reset_release_all()
as th
From: Patrice Chotard
Add clk_release_all() method which Disable/Free an
array of clocks that has been previously requested by
clk_request/get_by_*()
Signed-off-by: Patrice Chotard
---
v9: _ to avoid confusion, rename clk_disable_all() in clk_release_all()
as this function not on
From: Patrice Chotard
This is needed in error path to assert previously deasserted
reset by using a saved reset_ctl reference.
Signed-off-by: Patrice Chotard
Reviewed-by: Simon Glass
---
v9: _ none
v8: _ none
v7: _ none
v6: _ none
v5: _ none
v4: _ none
v3: _ none
v2
From: Patrice Chotard
This series improves generic ehci and ohci drivers by addition of :
_ error path during probe (clocks, resets and phy release)
_ .remove callback
_ add generic PHY framework for both generic ehci and ohci drivers
_ add RESET and CLOCK framewor
From: Stefan Chulski
Set BM poll size once during priv probe and do not
overwrite it during port probe procedure. Pool is common for
all CP ports.
Change-Id: Icf8c2be3f9cc653c132365e918044713accef335
Signed-off-by: Stefan Chulski
Reviewed-on: http://vgitil04.il.marvell.com:8080/39969
Tested-by:
From: Stefan Chulski
TX drain in transmit procedure could cause issues due
to race between drain procedure and transmition of descriptor
between AGGR TXQ and physical TXQ.
TXQ be cleared before moving to Linux by stop procedure.
Change-Id: I1d52cf087505d35d8a10e0249f78d0177a569658
Signed-off-by:
From: Stefan Chulski
Remove IRQ configuration from u-boot PP driver.
U-BOOT don't use interupts and coniguration of IRQ in u-boot
caused crushes in Linux interupt shared mode.
Also interput cause is redundant in RX routine since single RXQ
used.
Change-Id: Ie7dda9bc57accb24c2e58c63de31f359711e71
Hi Bin,
On 16.06.2017 16:09, Bin Meng wrote:
Hi Stefan,
On Fri, Jun 16, 2017 at 9:31 PM, Bin Meng wrote:
Now that EHCD does not use CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS,
remove it in all boards' config files.
Signed-off-by: Bin Meng
---
arch/arm/include/asm/ehci-omap.h| 4
includ
Hi Bin,
On 16.06.2017 15:31, Bin Meng wrote:
Currently U-Boot xHCI driver does not work on Intel BayTrail SoC based
boards that have USB 3.0 ports. Trying to do a 'usb start' simply hangs
the board. This series fixes a bunch of xHCI driver issues to make it
work on Intel's platform.
Issues iden
From: Stefan Chulski
This WA for mdio issue. U-boot 2017 don't have mdio driver
and on MACHIATOBin board ports from CP1 connected to mdio on
CP0. WA is to get mdio address from phy handler parent base address.
WA should be removed after mdio driver implementation.
Change-Id: Ice33c318a2872e750c8
From: Stefan Chulski
MVPP22 driver support 64 Bit arch and require BM pool
high address configuration.
Change-Id: I04417b8cc081ea75e43b230d5ba1cc5c0071ce25
Signed-off-by: Stefan Chulski
Reviewed-on: http://vgitil04.il.marvell.com:8080/39967
Tested-by: iSoC Platform CI
Reviewed-by: Nadav Haklai
From: Stefan Chulski
Issue:
BM counters were overran by probe that called per Network interface and
caused release of wrong number of buffers during remove procedure.
Fix:
Add CP level flags to call init and remove procedure once per CP.
Change-Id: I7fa24704e1feadb079d7dc3a19a0b92b3b69b238
Sign
Hi Bin,
On 16.06.2017 16:06, Bin Meng wrote:
Hi Stefan,
On Fri, Jun 16, 2017 at 9:31 PM, Bin Meng wrote:
Now that xHCD does not use CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS,
remove it in all boards' config files.
Signed-off-by: Bin Meng
---
include/configs/am43xx_evm.h | 1 -
include/
From: Stefan Chulski
This patch enable padding of packets shorter than 64B in TX(set by default).
Disabling of padding cause crushes on MACCIATO board.
Regarding to GoP instruction padding should be enabled.
Change-Id: Iceaa1bd8a3543795463938d1a8d561f4ecc29234
Signed-off-by: Stefan Chulski
Revi
From: Stefan Chulski
MBUS driver were replaced by AXI in PPv22 and relevant
only for PPv21.
Change-Id: Iafb42f121d0ad2d8bc99a42e7ed671cd7b754b42
Signed-off-by: Stefan Chulski
Reviewed-on: http://vgitil04.il.marvell.com:8080/39965
Tested-by: iSoC Platform CI
Reviewed-by: Nadav Haklai
Reviewed-
From: Stefan Chulski
U-boot use single physical tx queue with size 16 descriptors.
So aggregated tx queue size should be equal to physical tx queue
and cpu descriptor chunk(number of descriptors delivered from
physical tx queue to aggregated tx queue by one chunk) shouldn't be
larger than physica
From: Stefan Chulski
Issues were found during internal QA phase.
Stefan Chulski (10):
net: mvpp2x: Add GPIO configuration support
net: mvpp2x: fix phy connected to wrong mdio issue
net: mvpp2x: Enable GoP packet padding in TX
net: mvpp2x: fix BM configuration overrun issue
net: mvpp2x:
From: Stefan Chulski
This patch add GPIO configuration support in mvpp2x driver.
Driver will handle 10G SFP gpio reset and SFP TX disable. GPIO pins should
be set in device tree.
Change-Id: I3165545b276a3590399d1ac66b1e20d4544212c6
Signed-off-by: Stefan Chulski
Reviewed-on: http://vgitil04.il.m
Previously this driver appeared to have been half-way converted to the new
driver model and did not work at all.
Complete the transition to the driver model, adding the necessary
connections.
Signed-off-by: Alan Ott
---
configs/pic32mzdask_defconfig | 1 -
drivers/mmc/Kconfig | 2 +-
Hi Bin,
On 21.06.2017 12:24, Bin Meng wrote:
> On Wed, Jun 21, 2017 at 5:28 PM, Stefan Roese wrote:
>> As you can see, the 2 USB mass storage devices which are connected
>> to the xHCI HSIC port are only detected after a power-up and not
>> after a system reset.
>>
>> Is this something that yo
On ARCH_SUNXI we've been selecting these targets for a long time if
SUPPORT_SPL is set. However, Lichee Pi Zero is the first platform we've
added that does support SPL but does not build SPL and has exposed a
latent bug. Both of these symbols depend on SPL not SUPPORT_SPL, so we
need to update ou
Hi
On 06/21/2017 11:02 AM, Lothar Waßmann wrote:
> Hi,
>
> On Wed, 21 Jun 2017 09:50:16 +0200 patrice.chot...@st.com wrote:
>> From: Patrice Chotard
>>
>> Add reset_assert_all() method which Request/Assert/Free an
>> array of resets signal that has been previously successfully
>> requested by re
On Wed, Jun 21, 2017 at 6:23 AM, Peter Robinson wrote:
> On Tue, Jun 20, 2017 at 10:49 PM, Rob Clark wrote:
>> efi_disk_register() would try to iterate all the blk devices. But if
>> the first one in the list failed to probe, uclass_first_device() would
>> return NULL and no attempt would be mad
On 9.6.2017 03:00, Tom Rini wrote:
> On Tue, May 30, 2017 at 02:22:11PM +0200, Michal Simek wrote:
>
>> From: Siva Durga Prasad Paladugu
>>
>> Printing the first entry reset separately is no longer
>> needed as it now prints the entries with valid name and
>> timestamp zero. This removes duplicat
Hi Stefan,
On Wed, Jun 21, 2017 at 5:28 PM, Stefan Roese wrote:
> Hi Bin,
>
> On 16.06.2017 15:31, Bin Meng wrote:
>> Currently U-Boot xHCI driver does not work on Intel BayTrail SoC based
>> boards that have USB 3.0 ports. Trying to do a 'usb start' simply hangs
>> the board. This series fixes a
On Tue, Jun 20, 2017 at 10:49 PM, Rob Clark wrote:
> efi_disk_register() would try to iterate all the blk devices. But if
> the first one in the list failed to probe, uclass_first_device() would
> return NULL and no attempt would be made to register the remaining
> devices. Also uclass_next_devi
Hi Bin,
On 16.06.2017 15:31, Bin Meng wrote:
> Currently U-Boot xHCI driver does not work on Intel BayTrail SoC based
> boards that have USB 3.0 ports. Trying to do a 'usb start' simply hangs
> the board. This series fixes a bunch of xHCI driver issues to make it
> work on Intel's platform.
>
> I
Hi,
On Wed, 21 Jun 2017 09:50:16 +0200 patrice.chot...@st.com wrote:
> From: Patrice Chotard
>
> Add reset_assert_all() method which Request/Assert/Free an
> array of resets signal that has been previously successfully
> requested by reset_get_by_*()
>
IMO this is a terrible API. The purpose of
Hi Lothar
On 06/21/2017 09:56 AM, Lothar Waßmann wrote:
> Hi,
>
> On Tue, 20 Jun 2017 12:56:48 + Patrice CHOTARD wrote:
>> Hi Lothar
>>
>> On 06/20/2017 02:06 PM, Lothar Waßmann wrote:
>>> Hi,
>>>
>>> On Tue, 20 Jun 2017 11:59:09 +0200 patrice.chot...@st.com wrote:
From: Patrice Chotard
Don't take care of this series, I need to resend a new one
Sorry
On 06/21/2017 09:50 AM, patrice.chot...@st.com wrote:
> From: Patrice Chotard
>
> This series improves generic ehci and ohci drivers by addition of :
> _ error path during probe (clocks, resets and phy release)
> _ .re
Hi Vignesh,
> Hi,
>
> On Tuesday 20 June 2017 07:14 PM, Lukasz Majewski wrote:
> > Hi Marek, Vignesh,
> [...]
> >>>
> >>> All gadget drivers like ether.c or f_mass_storage.c call
> >>> usb_gadget_handle_interrupts() just passing the index of the USB
> >>> instance. This does not help at all in dm
Hi,
On Tue, 20 Jun 2017 12:26:29 -0600 Simon Glass wrote:
> Hi Lothar,
>
> On 20 June 2017 at 04:25, Lothar Waßmann wrote:
> > LCD_MAX_WIDTH, LCD_MAX_HEIGHT and LCD_MAX_LSBPP are not alternative
> > values for one specific variable, but unrelated entities with distinct
> > purposes. There is no
Hi,
On Tue, 20 Jun 2017 12:56:48 + Patrice CHOTARD wrote:
> Hi Lothar
>
> On 06/20/2017 02:06 PM, Lothar Waßmann wrote:
> > Hi,
> >
> > On Tue, 20 Jun 2017 11:59:09 +0200 patrice.chot...@st.com wrote:
> >> From: Patrice Chotard
> >>
> >> use array to save enabled clocks reference in order t
From: Patrice Chotard
use array to save enabled clocks reference in order to
disabled them in case of error during probe() or during
driver removal.
Signed-off-by: Patrice Chotard
---
v8: _ rework error path by propagating the initial error code until the end
of probe()
v7: _ replace
From: Patrice Chotard
this allows to get file, line and function location
of the current error message.
Signed-off-by: patrice chotard
Reviewed-by: Simon Glass
---
v8: _ none
v7: _ none
v6: _ none
v5: _ none
v4: _ none
v3: _ add commit message
v2: _ create this inde
From: Patrice Chotard
This function is usefull to get phandle number contained
in a property list.
For example, this allows to allocate the right amount
of memory to keep clock's reference contained into the
"clocks" property.
To implement it, either of_count_phandle_with_args() or
fdtdec_parse
From: Patrice Chotard
Extend ohci-generic driver with generic PHY framework
Signed-off-by: Patrice Chotard
---
v8: _ rework error path by propagating the initial error code until the end
of probe()
v7: _ none
v6: _ none
v5: _ none
v4: _ use generic_phy_valid() before g
From: Patrice Chotard
Add reset_assert_all() method which Request/Assert/Free an
array of resets signal that has been previously successfully
requested by reset_get_by_*()
Signed-off-by: Patrice Chotard
Reviewed-by: Simon Glass
---
v8: _ none
v7: _ none
v6: _ none
v5: _ none
v4
From: Patrice Chotard
use array to save deasserted resets reference in order to
assert them in case of error during probe() or during driver
removal.
Signed-off-by: Patrice Chotard
---
v8: _ rework error path by propagating the initial error code until the end
of probe()
_ replace
From: Patrice Chotard
Use an array to save enabled clocks reference and deasserted resets
in order to respectively disabled and asserted them in case of error
during probe() or during driver removal.
Signed-off-by: Patrice Chotard
---
v8: _ replace devm_kmalloc() by devm_kcalloc()
From: Patrice Chotard
Extend ehci-generic driver with generic PHY framework
Signed-off-by: Patrice Chotard
---
v8: _ rework error path by propagating the initial error code until the end
of probe()
v7: _ none
v6: _ none
v5: _ none
v4: _ update the memory allocation for
From: Patrice Chotard
Add clk_disable_all() method which Request/Disable/Free an
array of clocks that has been previously requested by
clk_request/get_by_*()
Signed-off-by: Patrice Chotard
---
v8: _ replace clk->dev by clk[i].dev in clk_request() param
v7: _ none
v6: _ none
v5:
From: Patrice Chotard
This series improves generic ehci and ohci drivers by addition of :
_ error path during probe (clocks, resets and phy release)
_ .remove callback
_ add generic PHY framework for both generic ehci and ohci drivers
_ add RESET and CLOCK framewor
From: Patrice Chotard
This is needed in error path to assert previously deasserted
reset by using a saved reset_ctl reference.
Signed-off-by: Patrice Chotard
Reviewed-by: Simon Glass
---
v8: _ none
v7: _ none
v6: _ none
v5: _ none
v4: _ none
v3: _ none
v2: _ none
Hi Eddie,
> Hi Eddie,
>
> > 2017-05-31 15:12 GMT+08:00 Lukasz Majewski :
> > > On Wed, 31 May 2017 10:27:23 +0800
> > > Eddie Cai wrote:
> > >
> > >> Hi Lukasz
> > >>
> > >> 2017-05-29 15:51 GMT+08:00 Lukasz Majewski :
> > >> > Good morning Eddie,
> > >> >
> > >> >> this patch enable rockusb sup
Hi Vignesh,
> Hi Lukasz,
>
> On Thursday 15 June 2017 10:28 PM, Marek Vasut wrote:
> > On 06/14/2017 02:24 PM, Vignesh R wrote:
> >>
> >>
> >> On Tuesday 13 June 2017 07:36 PM, Marek Vasut wrote:
> >>> On 06/13/2017 02:10 PM, Vignesh R wrote:
> Provide a way to read MAC address for usb_ether
Hi Simon,
On Mon, Jun 19, 2017 at 11:11:27AM -0600, Simon Glass wrote:
> Add a driver-model version of this driver which mostly uses the existing
> code. The old code can be removed once all boards are switched over.
>
> Signed-off-by: Simon Glass
I'm not sure if you tested that, but we have so
Hi,
On Tue, Jun 20, 2017 at 12:26:21PM -0600, Simon Glass wrote:
> Hi Maxime,
>
> On 20 June 2017 at 00:45, Maxime Ripard
> wrote:
> > Hi Simon,
> >
> > On Mon, Jun 19, 2017 at 11:11:31AM -0600, Simon Glass wrote:
> >> Move this board over to driver model for MMC and SATA. This means that it
> >
Simon, do you have some suggestions on what to do here? Thanks!
--
Tom
>>>
>>> My guess is that there is already a libfdt.py in the system. Someone
>>> else reported this too.
>>>
>>> We could perhaps change the ordering in PYTHONPATH so that our one is first.
>>
>> No, I'm not
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