On Tue, Mar 7, 2017 at 6:10 PM, Tom Rini wrote:
> On Wed, Mar 08, 2017 at 02:09:46AM +0900, Masahiro Yamada wrote:
>> 2017-02-27 15:24 GMT+09:00 Masahiro Yamada :
>> > DTC 1.4.2 or later checks DT unit-address without reg property and
>> > vice-versa, and generates lots of warnings. Fixing DT fil
Hi,
It appears as though linking u-boot with binutils-2.28 fails:
arm-oe-linux-gnueabi-ld.bfd: u-boot: Not enough room for program
headers, try linking with -N
openembedded-core master just upgraded from binutils-2.27 to 2.28, everything
builds fine with 2.27 but fails (see above) with
From: Hou Zhiqiang
Signed-off-by: Hou Zhiqiang
---
V2:
- no change
configs/ls1043ardb_nand_defconfig | 1 +
configs/ls1043ardb_sdcard_defconfig | 1 +
configs/ls1046ardb_emmc_defconfig | 1 +
configs/ls1046ardb_sdcard_defconfig | 1 +
4 files changed, 4 insertions(+)
diff --git a/configs
From: Hou Zhiqiang
Signed-off-by: Hou Zhiqiang
---
V2:
- no change
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index adccdf1..6d2dd15 100644
From: Hou Zhiqiang
Signed-off-by: Hou Zhiqiang
---
V2:
- added flush cache operation after nand read
arch/arm/cpu/armv8/fsl-layerscape/ppa.c | 122 +++-
1 file changed, 121 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
b/arch/a
From: Hou Zhiqiang
Add nand_size() function to move the nand size print into initr_nand().
Remove nand size print from nand_init() to allow other function to call
nand_init() without printing nand size.
Signed-off-by: Hou Zhiqiang
---
V2:
- no change
common/board_r.c| 1 +
drivers/mt
From: Hou Zhiqiang
Add initialization flag to avoid initializing NAND Flash multiple
times, otherwise it will calculate a wrong total size.
Signed-off-by: Hou Zhiqiang
---
V2:
- no change
drivers/mtd/nand/nand.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/mtd/nand
On Tue, Mar 7, 2017 at 7:04 PM, Tom Rini wrote:
> On Tue, Mar 07, 2017 at 04:23:08PM -0600, Adam Ford wrote:
>> On Tue, Mar 7, 2017 at 4:05 PM, Tom Rini wrote:
>> > On Tue, Mar 07, 2017 at 04:02:22PM -0600, Adam Ford wrote:
>> >> On Wed, Feb 15, 2017 at 7:23 AM, Adam Ford wrote:
>> >> > On Tue,
A previous patch broke the board. This patch will add missing part
from the previous patch and also move the SPL Stack into SDRAM at
0x8200.
Tested with GCC 4.8.2 and GCC 6.2
Fixes: 0959649dc6d9 ("omap3_logic: Switch to simple malloco in SPL")
Signed-off-by: Adam Ford
Changes in V2:
- Ke
At first, the ARM64 Linux booting requirement recommended that the
kernel image be placed text_offset bytes from 2MB aligned base near
the start of usable system RAM because memory below that base address
was unusable at that time.
This requirement was relaxed by Linux commit a7f8de168ace ("arm64:
Hi Tom,
2017-03-08 3:10 GMT+09:00 Tom Rini :
> On Wed, Mar 08, 2017 at 02:09:46AM +0900, Masahiro Yamada wrote:
>> 2017-02-27 15:24 GMT+09:00 Masahiro Yamada :
>> > DTC 1.4.2 or later checks DT unit-address without reg property and
>> > vice-versa, and generates lots of warnings. Fixing DT files
Hi Simon
2017-03-06 14:46 GMT+08:00 Eddie Cai :
> Hi Simon
>
> 2017-02-23 11:33 GMT+08:00 Simon Glass :
>
>> Hi Eddie,
>>
>> On 22 February 2017 at 07:12, Eddie Cai
>> wrote:
>> > Hi Simon
>> >
>> > 2017-02-22 17:05 GMT+08:00 Eddie Cai :
>> >>
>> >> Hi Simon
>> >>
>> >> 2017-02-22 11:59 GMT+08:0
On Tue, Mar 07, 2017 at 04:23:08PM -0600, Adam Ford wrote:
> On Tue, Mar 7, 2017 at 4:05 PM, Tom Rini wrote:
> > On Tue, Mar 07, 2017 at 04:02:22PM -0600, Adam Ford wrote:
> >> On Wed, Feb 15, 2017 at 7:23 AM, Adam Ford wrote:
> >> > On Tue, Feb 14, 2017 at 4:07 PM, Tom Rini wrote:
> >> >> On Tu
I understand the purpose of using a device tree for the Linux kernel,
but it's not entirely clear to me what the need would be for using it
in the bootloader.
I was thinking about experimenting with porting my board (OMAP3 /
DM3730) to using a device tree from Linux, but I assume there needs to
be
Hi,
I'm working with a new board using u-boot v2016.11. The board is using
a SoC (Marvell integrated switch using armada-xp "compatible" core).
While the SoC does have some built-in Ethernet interfaces the board I
have only has USB available.
Based on doc/README.usb I expect that running "usb sta
On Tue, Mar 07, 2017 at 04:23:08PM -0600, Adam Ford wrote:
> On Tue, Mar 7, 2017 at 4:05 PM, Tom Rini wrote:
> > On Tue, Mar 07, 2017 at 04:02:22PM -0600, Adam Ford wrote:
> >> On Wed, Feb 15, 2017 at 7:23 AM, Adam Ford wrote:
> >> > On Tue, Feb 14, 2017 at 4:07 PM, Tom Rini wrote:
> >> >> On Tu
On Tue, Mar 7, 2017 at 4:05 PM, Tom Rini wrote:
> On Tue, Mar 07, 2017 at 04:02:22PM -0600, Adam Ford wrote:
>> On Wed, Feb 15, 2017 at 7:23 AM, Adam Ford wrote:
>> > On Tue, Feb 14, 2017 at 4:07 PM, Tom Rini wrote:
>> >> On Tue, Feb 14, 2017 at 03:56:43PM -0600, Adam Ford wrote:
>> >>> On Feb 1
A previos patch broke the board. This patch will undo the previous
patch but move the SPL Stack into SDRAM located at 0x8200
Fixes: 0959649dc6d9 ("omap3_logic: Switch to simple malloco in SPL")
Signed-off-by: Adam Ford
diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconf
On Tue, Mar 07, 2017 at 04:02:22PM -0600, Adam Ford wrote:
> On Wed, Feb 15, 2017 at 7:23 AM, Adam Ford wrote:
> > On Tue, Feb 14, 2017 at 4:07 PM, Tom Rini wrote:
> >> On Tue, Feb 14, 2017 at 03:56:43PM -0600, Adam Ford wrote:
> >>> On Feb 14, 2017 3:10 PM, "Tom Rini" wrote:
> >>>
> >>> On Tue,
On Wed, Feb 15, 2017 at 7:23 AM, Adam Ford wrote:
> On Tue, Feb 14, 2017 at 4:07 PM, Tom Rini wrote:
>> On Tue, Feb 14, 2017 at 03:56:43PM -0600, Adam Ford wrote:
>>> On Feb 14, 2017 3:10 PM, "Tom Rini" wrote:
>>>
>>> On Tue, Feb 14, 2017 at 03:03:44PM -0600, Adam Ford wrote:
>>>
>>> > Tom,
>>>
Signed-off-by: Stephen Arnold
---
doc/README.socfpga | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/doc/README.socfpga b/doc/README.socfpga
index 63733a986e..3110161753 100644
--- a/doc/README.socfpga
+++ b/doc/README.socfpga
@@ -20,7 +20,9 @@ controller support wi
From v2-U-Boot-arm-socfpga-Add-SoCFPGA-SR1500-board limbo patch series
describing SR1500 SPL generation (updates in following patch).
Signed-off-by: Stephen Arnold
Signed-off-by: Stefan Roese
Cc: Marek Vasut
---
doc/README.socfpga | 89 --
1
Hi Tom,
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Tom Rini
> Sent: Thursday, March 02, 2017 7:00 AM
> To: u-boot@lists.denx.de
> Cc: Mans Rullgard
> Subject: [U-Boot] [PATCH] arm: Update our 'ret' assembler macro slightly
>
> We only support c
I've been swamped this week. I hope to pick this up with you next week.
On Tue, Feb 28, 2017 at 4:06 PM, Ron Brash wrote:
> Hello,
>
> Here is a list of things I have tried: The raw zImage (which is compressed
> with XZ), various addresses from indeed load address 0x2300, entry at
> 0x23008
Hello Tom,
LGTM.
On Thu, 2 Mar 2017 09:59:30 -0500, Tom Rini wrote:
> We only support cores that do Thumb-1 or later. So we add a comment to
> explain this and remove the architecture test.
>
> Cc: Albert ARIBAUD
> Cc: Mans Rullgard
> Signed-off-by: Tom Rini
> ---
> arch/arm/include/asm/a
On Mon, 6 Mar 2017 01:13:38 +
Andre Przywara andre.przyw...@arm.com wrote:
> "unsigned long" is a lousy data type when it comes to match peripheral
> hardware registers with a fixed size.
> Just do the obvious and match a 32-bit display format with an "u32"
> data type for casting.
> This fix
Hi Tom,
The following changes since commit 3fd2b3aa19b9479b5e785087e4951d3a7bbb87be:
net: macb: Fix ETH not found when clock not support (2017-03-01 21:28:39
-0500)
are available in the git repository at:
git://git.denx.de/u-boot-video.git master
for you to fetch changes up to 1d4ed26fafb
Hi Tom,
The following changes since commit 3fd2b3aa19b9479b5e785087e4951d3a7bbb87be:
net: macb: Fix ETH not found when clock not support (2017-03-01 21:28:39
-0500)
are available in the git repository at:
git://git.denx.de/u-boot-net.git master
for you to fetch changes up to 2c2ab8d65ff6c
Hi Nathan,
https://patchwork.ozlabs.org/patch/735435/ was applied to u-boot-net.git.
Thanks!
-Joe
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Am Dienstag, 7. März 2017, 10:01:02 CET schrieb Simon Glass:
> Hi,
>
> On 6 March 2017 at 23:56, Kever Yang wrote:
> > Hi Heiko,
> >
> > That patch break all the Rockchip SoCs SPL which using spl_init().
> >
> > Eddie send one patch for rk3288 by add a spl_early_init(), which is
> > under revie
Hi,
On 7 March 2017 at 11:39, Heiko Stübner wrote:
>
> Am Dienstag, 7. März 2017, 10:01:02 CET schrieb Simon Glass:
> > Hi,
> >
> > On 6 March 2017 at 23:56, Kever Yang wrote:
> > > Hi Heiko,
> > >
> > > That patch break all the Rockchip SoCs SPL which using spl_init().
> > >
> > > Eddie send on
On Wed, Mar 08, 2017 at 02:09:46AM +0900, Masahiro Yamada wrote:
> 2017-02-27 15:24 GMT+09:00 Masahiro Yamada :
> > DTC 1.4.2 or later checks DT unit-address without reg property and
> > vice-versa, and generates lots of warnings. Fixing DT files will
> > take for a while. Until then, let's turn
Those features are used by distro boot with efi boot.
Signed-off-by: Frank Kunz
---
:100644 100644 b122135690... 14ac97e4f9... M
configs/socfpga_de0_nano_soc_defconfig
configs/socfpga_de0_nano_soc_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/configs/socfpga_de0_nano_soc_d
This allows the SPL to scan the MMC for a valid uboot image on a second
sector location defined by CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR when
the default location "CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR + first
partition offset" does not contain a valid uboot image.
Signed-off-by: Frank Kunz
-
This enables EFI support for DE0-nano-SoC distro boot.
The patches will apply on top of Dalon Westergreens "[PATCH v3 0/8] arm:
socfpga: Move to using distro boot" series.
Tested on openSUSE openSUSE Tumbleweed ARM JeOS image.
Signed-off-by: Frank Kunz
---
Changes in v2: remove unneeded change
2017-02-27 15:24 GMT+09:00 Masahiro Yamada :
> DTC 1.4.2 or later checks DT unit-address without reg property and
> vice-versa, and generates lots of warnings. Fixing DT files will
> take for a while. Until then, let's turn off the check unless
> building with W=*.
>
> Introduce a new helper dtc-
Hi,
On 6 March 2017 at 23:56, Kever Yang wrote:
> Hi Heiko,
>
> That patch break all the Rockchip SoCs SPL which using spl_init().
>
> Eddie send one patch for rk3288 by add a spl_early_init(), which is
> under review, I also look forward for better solution.
Is this a problem for the upcoming r
On 03/06/2017 10:36 PM, Marek Vasut wrote:
> On 03/07/2017 05:31 AM, york sun wrote:
>> On 03/06/2017 07:59 PM, Marek Vasut wrote:
>>> On 03/06/2017 06:02 PM, York Sun wrote:
Early MMU improves performance especially on emulators. However, the
early MMU is left enabled after the first sta
Commit 94e3c8c4fd7b ("crypto/fsl - Add progressive hashing support
using hardware acceleration.") created entries for CONFIG_SHA1,
CONFIG_SHA256, CONFIG_SHA_HW_ACCEL, and CONFIG_SHA_PROG_HW_ACCEL.
However, no defconfig has migrated to it. Complete the move by first
adding additional logic to vario
Marek Vasut wrote:
> On 03/03/2017 04:17 PM, Rush, Jason A. wrote:
>> Marek Vasut wrote:
>>> On 03/01/2017 05:36 PM, Rush, Jason A. wrote:
This reverts commit b63b46313ed29e9b0c36b3d6b9407f6eade40c8f.
The Cadence QSPI device does not work with caching (introduced with
the bounce
Hi Marek, All,
On Tue, Mar 07, 2017 at 03:52:23AM +0100, Marek Vasut wrote:
> On 03/06/2017 11:21 PM, Steve Rae wrote:
> > The "chunks" in the "fastboot sparse image" are not aligned,
> > resulting in many "cached misaligned" messages from
> > check_cache_range(). Implement a runtime flag to suppr
On Tue, Mar 07, 2017 at 01:54:43PM +, Mark Rutland wrote:
> On Tue, Mar 07, 2017 at 07:16:56AM -0500, Tom Rini wrote:
> > On Tue, Mar 07, 2017 at 11:43:52AM +, Mark Rutland wrote:
> > > On Tue, Feb 28, 2017 at 12:15:09PM -0500, Tom Rini wrote:
> > > > On Wed, Mar 01, 2017 at 02:03:58AM +090
Hi Prabhakar,
Thanks for your comments!
> -Original Message-
> From: Prabhakar Kushwaha
> Sent: Tuesday, March 07, 2017 6:05 PM
> To: Z.Q. Hou ; u-boot@lists.denx.de;
> o...@buserror.net; york sun ;
> mingkai...@freescale.com; s...@chromium.org; Xiaobo Xie
>
> Subject: RE: [U-Boot] [PATC
On Tue, Mar 07, 2017 at 07:16:56AM -0500, Tom Rini wrote:
> On Tue, Mar 07, 2017 at 11:43:52AM +, Mark Rutland wrote:
> > On Tue, Feb 28, 2017 at 12:15:09PM -0500, Tom Rini wrote:
> > > On Wed, Mar 01, 2017 at 02:03:58AM +0900, Masahiro Yamada wrote:
> > > > 2017-02-27 7:41 GMT+09:00 Tom Rini :
Hi Parbhakar,
Thanks a lot for your comments!
> -Original Message-
> From: Prabhakar Kushwaha
> Sent: Tuesday, March 07, 2017 11:20 AM
> To: Z.Q. Hou ; u-boot@lists.denx.de;
> o...@buserror.net; york sun ;
> mingkai...@freescale.com; s...@chromium.org; Xiaobo Xie
>
> Cc: Z.Q. Hou
> Subj
On Mon, Mar 06, 2017 at 02:38:54PM +0800, Eddie Cai wrote:
> scan_dev_for_boot_part will fail when there is no GPT table. So add auto write
> GPT table if fail to get it.
>
> Signed-off-by: Eddie Cai
> ---
> include/config_distro_bootcmd.h | 8
> 1 file changed, 8 insertions(+)
>
> dif
OPOS6UL is an i.MX6UL based SoM with 256MB RAM, 4GB eMMC and an ethernet
phy. OPOS6ULDev is carrier board for the OPOS6UL.
U-Boot SPL 2017.03-rc3-2-g5085c26 (Mar 07 2017 - 09:48:09)
Trying to boot from MMC1
U-Boot 2017.03-rc3-2-g5085c26 (Mar 07 2017 - 09:48:09 +0100)
CPU: Freescale i.M
Signed-off-by: Sébastien Szymanski
---
drivers/serial/serial_mxc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c
index 1cfcbf2..64126e2 100644
--- a/drivers/serial/serial_mxc.c
+++ b/drivers/serial/serial_mxc.c
@@ -365,6 +365,7 @@ st
On Tue, Mar 07, 2017 at 11:43:52AM +, Mark Rutland wrote:
> On Tue, Feb 28, 2017 at 12:15:09PM -0500, Tom Rini wrote:
> > On Wed, Mar 01, 2017 at 02:03:58AM +0900, Masahiro Yamada wrote:
> > > 2017-02-27 7:41 GMT+09:00 Tom Rini :
> > > > On Thu, Feb 23, 2017 at 10:31:17AM -0500, Tom Rini wrote:
This moves all of the current ARM errata from various header files and in to
Kconfig. This allows for a minor amount of cleanup as we had some instances
where both a general common header file was enabling errata as well as the
board config. We now just select these once at the higher level in Kc
On Tue, Feb 28, 2017 at 12:15:09PM -0500, Tom Rini wrote:
> On Wed, Mar 01, 2017 at 02:03:58AM +0900, Masahiro Yamada wrote:
> > 2017-02-27 7:41 GMT+09:00 Tom Rini :
> > > On Thu, Feb 23, 2017 at 10:31:17AM -0500, Tom Rini wrote:
> > > c) I'm not convinced your math above is correct. images->ep i
> -Original Message-
> From: Z.Q. Hou
> Sent: Tuesday, March 07, 2017 12:27 PM
> To: Prabhakar Kushwaha ; u-
> b...@lists.denx.de; o...@buserror.net; york sun ;
> mingkai...@freescale.com; s...@chromium.org; Xiaobo Xie
>
> Subject: RE: [U-Boot] [PATCH 1/5] mtd: nand: add initialization fl
On Sel, 2017-03-07 at 04:45 +0100, Marek Vasut wrote:
> On 03/06/2017 05:45 AM, Chee, Tien Fong wrote:
> >
> > On Ahd, 2017-03-05 at 01:57 +0100, Marek Vasut wrote:
> > >
> > > On 03/03/2017 01:50 PM, Chee Tien Fong wrote:
> > > >
> > > >
> > > > From: Tien Fong Chee
> > > >
> > > > This patc
On Sel, 2017-03-07 at 04:49 +0100, Marek Vasut wrote:
> On 03/06/2017 08:39 AM, Ley Foon Tan wrote:
> >
> > On Sab, 2017-02-25 at 22:36 +0100, Marek Vasut wrote:
> > >
> > > On 02/22/2017 10:47 AM, Ley Foon Tan wrote:
> > > >
> > > >
> > > > Add system manager support for Arria 10.
> > > But th
2017-02-27 10:07 GMT+01:00 Lukasz Majewski :
> On Sun, 26 Feb 2017 07:27:42 +0100
> Eric BOUXIROT wrote:
>
>> I’m using u-boot-2015.07 in one of my project based on vpac270 soc
>> module.
>>
>> u-boot is well configured and build is fine without error.
>>
>> Gcc is v3.4.5 and glibc v2.3.6 built by
2017年3月3日 17:55于 Andre Przywara 写道：
>
> Hi,
>
> On 03/03/17 09:22, Maxime Ripard wrote:
> > On Thu, Mar 02, 2017 at 12:03:20AM +0800, Icenowy Zheng wrote:
> >>
> >> 2017年3月1日 23:51于 Maxime Ripard 写道：
> >>>
> >>> Hi Andre,
> >>>
> >>> On Wed, Mar 01, 2017 at 02:25:26AM +, Andre Przywara
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