Hi,
After I switched to dtc 1.4.2, when building x86 boards, I got:
Warning (unit_address_vs_reg): Node /memory has a reg or ranges
property, but no unit name
Warning (unit_address_vs_reg): Node /serial has a reg or ranges
property, but no unit name
Warning (unit_address_vs_reg): Node /rtc has a
On Fri, Oct 7, 2016 at 4:59 AM, Simon Glass wrote:
> Add a standard command definition for binman so that it can be used in
> makefiles.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
>
> Makefile | 6 ++
> 1 file changed, 6 insertion
Hi Simon,
On Fri, Oct 7, 2016 at 4:59 AM, Simon Glass wrote:
> Change x86 boards to use binman to produce the ROM. This involves adding the
> image definition to the device tree and using it in the Makefile. The
> existing ifdtool features are no-longer needed.
>
> Note that the .dtsi file is com
Hi Simon,
On Fri, Oct 7, 2016 at 4:59 AM, Simon Glass wrote:
> It is sometimes useful to be able to reference configuration options in a
> device tree source file. Add the necessary includes so that this works.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v4: None
> Changes in v3: None
>
Hi Simon,
On Wed, Nov 2, 2016 at 10:07 PM, Simon Glass wrote:
> Hi Bin,
>
> On 1 November 2016 at 04:07, Bin Meng wrote:
>> Hi Simon,
>>
>> On Fri, Oct 28, 2016 at 10:41 AM, Simon Glass wrote:
>>> Hi Bin,
>>>
>>> On 12 October 2016 at 17:56, Bin Meng wrote:
Hi Simon,
On Thu, Oct
When compiling the SPL for the Allwinner A64 in AArch64 mode, we can't
use the more compact Thumb2 encoding, which only exists for AArch32
code. This makes the SPL rather big, up to a point where any code
additions or even a different compiler may easily exceed the 32KB limit
that the Allwinner BRO
According to Jens disabling the on-die-termination should set bit 5,
not bit 1 in the respective register. Fix this.
Reported-by: Jens Kuske
Signed-off-by: Andre Przywara
---
arch/arm/mach-sunxi/dram_sun8i_h3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-su
The ARMv8 capable Allwinner A64 SoC comes out of reset in AArch32 mode.
To run AArch64 code, we have to trigger a warm reset via the RMR register,
which proceeds with code execution at the address stored in the RVBAR
register.
If the bootable payload in the FIT image is using a different
architectu
Read the specified "arch" value from a legacy or FIT U-Boot image and
store it in our SPL data structure.
This allows loaders to take the target architecture in account for
custom loading procedures.
Having the complete string -> arch mapping for FIT based images in the
SPL would be too big, so we
From: Jens Kuske
Instead of setting the delay for whole bytes allow setting
it for each individual bit. Also add support for
address/command lane delays.
Signed-off-by: Jens Kuske
Signed-off-by: Andre Przywara
---
arch/arm/mach-sunxi/dram_sun8i_h3.c | 54 ++---
From: Jens Kuske
The A64 DRAM controller is very similar to the H3 one,
so the code can be reused with some small changes.
[Andre: fixed up typo, merged in fixes from Jens]
Signed-off-by: Jens Kuske
Signed-off-by: Andre Przywara
---
arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 1 +
arc
From: Jens Kuske
The IOCR registers got renamed to BDLR to match the public
documentation of similar controllers.
Signed-off-by: Jens Kuske
Signed-off-by: Andre Przywara
---
arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h | 43 ++---
arch/arm/mach-sunxi/dram_sun8i_h3.c
To avoid enumerating the very same DRAM values in defconfig files
for each and every Allwinner A64 board out there, let's put some sane
default values in the Kconfig file.
Boards with different needs can override them at any time.
Signed-off-by: Andre Przywara
---
board/sunxi/Kconfig |
These days many Allwinner SoCs use clock_sun6i.c, although out of them
only the (original sun6i) A31 has a second MBUS clock register.
Also setting up the PRCM PLL_CTLR1 register to provide the proper voltage
seems to be an A31-only feature as well.
So restrict the initialization to this SoC only t
At the moment we use the arch/arm directory for arm64 boards as well,
so the Makefile will pick up the "arm" name for the architecture to use
for tagging binaries in U-Boot image files.
Differentiate between the two by looking at the CPU variable being defined
to "armv8", and use the arm64 architec
Hi,
this is my first take on the SPL support for the Allwinner A64 SoC.
The actual meat - the DRAM initialization code - has been provided
by Jens - many thanks for that!
The rest of the patches mostly deal with the 32-bit/64-bit switch.
While it is possible and seems natural to let the SPL also
Hello,
Am 25.07.2016 um 05:45 schrieb Kever Yang:
> RK3399 needs reserve 0x20 at the beginning of DRAM, for ATF bl31.
>
> Signed-off-by: Kever Yang
> ---
>
> Changes in v2:
> - correct some typo on commit message and comment
>
> board/rockchip/evb_rk3399/evb-rk3399.c | 3 ++-
> 1 file cha
This file apparently hasn't seen an update in a while, so just sync
it with reality.
Signed-off-by: Andre Przywara
---
doc/README.arm64 | 27 +--
1 file changed, 17 insertions(+), 10 deletions(-)
diff --git a/doc/README.arm64 b/doc/README.arm64
index f658fa2..b0bba0f 100
Somehow an int returning function without a return statement sneaked
in. Fix it.
Signed-off-by: Andre Przywara
---
drivers/mtd/spi/sunxi_spi_spl.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/sunxi_spi_spl.c b/drivers/mtd/spi/sunxi_spi_spl.c
index 67c7edd
For 64-bit ARM systems we provide just a timer_read_counter()
implementation and rely on the generic non-uclass get_ticks() function
in lib/time.c to call the former.
However this function is actually not 64-bit safe, as it assumes a
"long" to be 32-bit. Beside the fact that the resulting uint64_t
On 11/02/2016 05:30 PM, Dinh Nguyen wrote:
> On Tue, Nov 1, 2016 at 3:43 PM, Dinh Nguyen wrote:
>>
>>
>> On 11/01/2016 03:42 PM, Marek Vasut wrote:
>>> On 11/01/2016 09:39 PM, Dinh Nguyen wrote:
On 11/01/2016 03:09 PM, Marek Vasut wrote:
> On 11/01/2016 04:43 PM, Dinh Nguyen wro
On Wed, Nov 2, 2016 at 6:52 AM, Michal Simek wrote:
> From: Siva Durga Prasad Paladugu
>
> Use random ethernet address if the ethernet address found
> is invalid, not zero and config for random address
> is defined.
>
> Signed-off-by: Siva Durga Prasad Paladugu
> Signed-off-by: Michal Simek
Ac
On 11/02/2016 04:28 PM, Lukasz Majewski wrote:
> Hi Marek,
Is this for 2016.11 or next ?
> Please find following code for u-boot-dfu repository.
>
> The following changes since commit 57faca19a82fc9b43a227824c30aeb76a43d1957:
>
> drivers: USB: OHCI: allow compilation for 64-bit targets (2016-
On 11/02/2016 04:24 PM, Phil Edworthy wrote:
> The IP supports two ports, A and B, each providing up to 32 gpios.
> The driver already creates a 2nd gpio bank by reading the 2nd node
> from DT, so this is quite a simple change to support the 2nd bank.
>
> Signed-off-by: Phil Edworthy
> ---
> dri
On 11/02/2016 04:15 PM, Phil Edworthy wrote:
> With the existing code, when the requested SPI clock rate is near
> to the lowerest that can be achieved by the hardware (max divider
> of the ref clock is 32), the generated clock rate is wrong.
> For example, with a 50MHz ref clock, when asked for an
On Mon, Sep 12, 2016 at 12:51 PM, Stephen Warren wrote:
> From: Stephen Warren
>
> Enable the Ethernet device in DT, provide board-specific configuration,
> and enable the driver in Kconfig.
>
> Signed-off-by: Stephen Warren
Acked-by: Joe Hershberger
___
On Mon, Sep 12, 2016 at 12:51 PM, Stephen Warren wrote:
> From: Stephen Warren
>
> Tegra186 includes a Synopsys DWC EQoS (Ethernet) device. Add this to the
> Tegra186 SoC DT so that boards can make use of it.
>
> Signed-off-by: Stephen Warren
Acked-by: Joe Hershberger
_
On Mon, Sep 12, 2016 at 12:51 PM, Stephen Warren wrote:
> From: Stephen Warren
>
> On Tegra186, the bootloader which runs before U-Boot passes the Ethernet
> MAC address to U-Boot using device tree. Extract this value and write it
> to the environment, so that the Ethernet uclass picks it up and
On Mon, Sep 12, 2016 at 12:51 PM, Stephen Warren wrote:
> From: Stephen Warren
>
> Extend the Tegra186 implementation of board_late_init() to call a per-SoC
> "hook" function. This will allow SoC-specific (rather than Tegra-wide)
> functionality to be implemented without the core Tegra code needi
On Tue, 2016-11-01 at 19:55 -0600, Simon Glass wrote:
> Hi Marcel,
>
> On 28 October 2016 at 04:44, Marcel Ziswiler
> wrote:
> >
> > On Wed, 2016-10-26 at 16:30 +, Simon Glass wrote:
> > > ...
> > > OK we can hold off - when do you expect to do this?
> > Thanks Simon, I'm looking into it rig
Hi Vlad,
On 2 November 2016 at 09:44, Vlad Zakharov
wrote:
> This commit introduces timer driver for ARC.
>
> ARC timers are configured via ARC AUX registers so we use special
> functions to access timer control registers.
>
> This driver allows utilization of either timer0 or timer1
> depending
On 2 November 2016 at 11:02, Andreas Färber wrote:
> Sort rk3036 before rk3288.
>
> Signed-off-by: Andreas Färber
> ---
> arch/arm/dts/Makefile | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Acked-by: Simon Glass
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Hi Vlad,
On 2 November 2016 at 09:44, Vlad Zakharov
wrote:
> This commit replaces legacy timer code with usage of arc timer
> driver.
>
> Also it adds timer0 device tree node with corresponding
> "clock-frequency" property.
>
> Therefore we remove legacy CONFIG_SYS_TIMER_RATE config symbol
> that
On 2 November 2016 at 11:03, Andreas Färber wrote:
> UART,s -> UARTs, to avoid this spreading via copy&paste.
>
> Signed-off-by: Andreas Färber
> ---
> arch/arm/mach-rockchip/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Acked-by: Simon Glass
_
On Tue, 1 Nov 2016, Joe Hershberger wrote:
On Tue, Nov 1, 2016 at 4:54 PM, Michael Kurz wrote:
This patch adds glue code required for enabling the designware
mac on stm32f7 devices.
Signed-off-by: Michael Kurz
---
arch/arm/include/asm/arch-stm32f7/rcc.h | 8
arch/arm/inclu
UART,s -> UARTs, to avoid this spreading via copy&paste.
Signed-off-by: Andreas Färber
---
arch/arm/mach-rockchip/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 1aac3c8..ffd281c 100644
--- a/arch/a
Sort rk3036 before rk3288.
Signed-off-by: Andreas Färber
---
arch/arm/dts/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 756535b..7f6545e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -28,6 +28,
On Tue, Nov 1, 2016 at 3:43 PM, Dinh Nguyen wrote:
>
>
> On 11/01/2016 03:42 PM, Marek Vasut wrote:
>> On 11/01/2016 09:39 PM, Dinh Nguyen wrote:
>>>
>>>
>>> On 11/01/2016 03:09 PM, Marek Vasut wrote:
On 11/01/2016 04:43 PM, Dinh Nguyen wrote:
>
>
> On 10/29/2016 02:59 PM, Marek V
This commit replaces legacy timer code with usage of arc timer
driver.
Also it adds timer0 device tree node with corresponding
"clock-frequency" property.
Therefore we remove legacy CONFIG_SYS_TIMER_RATE config symbol
that is not longer required.
Furthermore the commit adds CONFIG_TIMER and CONF
This commit introduces timer driver for ARC.
ARC timers are configured via ARC AUX registers so we use special
functions to access timer control registers.
This driver allows utilization of either timer0 or timer1
depending on which one is available in real hardware. Essentially
only existing tim
This patch series replaces legacy approach to access ARC timer
via specific code in "arch/arc/lib/time.c" and uses timer
driver instead.
ARC cores may have up to 2 built-in timers: timer0 and timer1,
usually at least one of them exists.
They are controlled through auxiliary registers and so we
do
Hi Patrick,
> Signed-off-by: Patrick Delaunay
> ---
>
> drivers/dfu/dfu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
> index 20dfcbb..8dacc1a 100644
> --- a/drivers/dfu/dfu.c
> +++ b/drivers/dfu/dfu.c
> @@ -482,7 +482,7 @@ int
Hi Marek,
Please find following code for u-boot-dfu repository.
The following changes since commit 57faca19a82fc9b43a227824c30aeb76a43d1957:
drivers: USB: OHCI: allow compilation for 64-bit targets (2016-10-29 19:45:40
+0200)
are available in the git repository at:
git://git.denx.de/u-boo
The IP supports two ports, A and B, each providing up to 32 gpios.
The driver already creates a 2nd gpio bank by reading the 2nd node
from DT, so this is quite a simple change to support the 2nd bank.
Signed-off-by: Phil Edworthy
---
drivers/gpio/dwapb_gpio.c | 40 +++
The HW manual does not give details about what the register
value for this bit actually does, other than "Choose edge on
which data outputs from flash memory will be sampled".
Signed-off-by: Phil Edworthy
---
Our HW engineers tell me that it needs to be set for our hardware.
---
doc/device-tree
This change copes with the delay being less than a SCLK period.
Signed-off-by: Phil Edworthy
---
drivers/spi/cadence_qspi_apb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c
index a0edeb8..533274d 100644
--- a/
With the existing code, when the requested SPI clock rate is near
to the lowerest that can be achieved by the hardware (max divider
of the ref clock is 32), the generated clock rate is wrong.
For example, with a 50MHz ref clock, when asked for anything less
than a 1.5MHz SPI clock, the code sets up
Most of the code already uses #defines for the bit value, rather
than the shift required to get the value. This changes the remaining
code over.
Whislt at it, fix the names of the "Rd Data Capture" register defs.
Signed-off-by: Phil Edworthy
---
drivers/spi/cadence_qspi_apb.c | 37 +
Signed-off-by: Phil Edworthy
---
drivers/spi/cadence_qspi_apb.c | 8
1 file changed, 8 deletions(-)
diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c
index 639780c..a0edeb8 100644
--- a/drivers/spi/cadence_qspi_apb.c
+++ b/drivers/spi/cadence_qspi_apb.c
@@ -19
A lot of the #defines are for single bits in a register, where the
name has _MASK on the end. Since this can be used for both a mask
and the value, remove _MASK from them.
Whilst doing so, also remove the unneccesary brackets around the
constants.
Signed-off-by: Phil Edworthy
---
drivers/spi/ca
This series has fixes, patches to clean the code up, and add support for
specifying the sampling edge.
Phil Edworthy (7):
spi: cadence_qspi: Fix clearing of pol/pha bits
spi: cadence_qspi: Fix baud rate calculation
spi: cadence_qspi: Use #define for bits instead of bit shifts
spi: cadence_
Or'ing together bit positions is clearly wrong.
Signed-off-by: Phil Edworthy
---
drivers/spi/cadence_qspi_apb.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c
index e285d3c..2403e71 100644
--- a/drivers/spi/
On Sun, Oct 23, 2016 at 08:45:18PM -0700, Vagrant Cascadian wrote:
> Signed-off-by: Vagrant Cascadian
> Reviewed-by: Simon Glass
Applied to u-boot/master (before v2016.11-rc3), thanks!
--
Tom
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___
U-Boot
On Tue, Nov 01, 2016 at 06:04:32PM +0800, macro.wav...@gmail.com wrote:
> From: Hongbo Zhang
>
> A most basic PSCI implementation with only one psci_version is added for
> LS1043A, this can verify the generic PSCI framework, and more platform
> specific
> implementation will be added later.
>
>
On Tue, Nov 01, 2016 at 06:04:31PM +0800, macro.wav...@gmail.com wrote:
> From: Hongbo Zhang
>
> Newly add ARMv8 PSCI needs to be initialized, be copied or reserved in right
> place, this patch does all the setup steps.
>
> Signed-off-by: Hongbo Zhang
[snip]
> diff --git a/arch/arm/cpu/armv8/cp
On Tue, Nov 01, 2016 at 06:04:29PM +0800, macro.wav...@gmail.com wrote:
> From: Hongbo Zhang
>
> This patch adds secure_text, secure_data and secure_stack sections for ARMv8
> to
> hold PSCI text and data, and it is based on the legacy implementation of
> ARMv7.
>
> Signed-off-by: Hongbo Zhan
On Sun, Oct 30, 2016 at 05:30:30PM +0100, Jelle van der Waa wrote:
> Signed-off-by: Jelle van der Waa
Applied to u-boot/master (before v2016.11-rc3), thanks!
--
Tom
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On Tue, Nov 01, 2016 at 06:04:27PM +0800, macro.wav...@gmail.com wrote:
> From: Hongbo Zhang
>
> NXP/Freescale uses macro CONFIG_ARMV8_PSCI to enable their private PSCI
> implementation in PPA firmware, but this macro naming too generic, so this
> patch replaces it with a specic one CONFIG_FSL_P
On Tue, Nov 01, 2016 at 06:04:28PM +0800, macro.wav...@gmail.com wrote:
> From: Hongbo Zhang
>
> PSCI implementation needs the SMC instruction to be enabled.
> Following the legacy codes pattern, no bit macro definition and bit operation
> are used, only the immediate data used in line is change
On Sat, Oct 29, 2016 at 05:11:17PM -0400, Tom Rini wrote:
> - Add in system aarch64-linux-gnu toolchain
> - Now that all VMs will have aarch64 available, don't exclude them from
> other jobs but instead exclude them from the catch-all aarch64 build
> - Add JOB= to the Freescale/ARM build to be c
On Sun, Oct 23, 2016 at 08:45:19PM -0700, Vagrant Cascadian wrote:
> Cover-Letter: Fixes several spelling errors for the words "resetting",
> "extended", "occur", and "multiple".
>
> Signed-off-by: Vagrant Cascadian
> Reviewed-by: Simon Glass
Applied to u-boot/master (before v2016.11-rc3), t
On Thu, Oct 27, 2016 at 05:54:03PM -0600, Simon Glass wrote:
> The allocated memory should be freed. Fix it.
>
> Signed-off-by: Simon Glass
> Reported-by: Coverity (CID: 150963)
> Reviewed-by: Tom Rini
Applied to u-boot/master (before v2016.11-rc3), thanks!
--
Tom
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On Tue, Oct 25, 2016 at 08:22:48PM +1300, Chris Packham wrote:
> Prevent cache misalignment message by ensuring that a whole cache line
> is flushed.
>
> Signed-off-by: Chris Packham
> Reviewed-by: Stefan Roese
Applied to u-boot/master (before v2016.11-rc3), thanks!
--
Tom
signature.asc
De
On Sun, Oct 23, 2016 at 08:45:17PM -0700, Vagrant Cascadian wrote:
> Signed-off-by: Vagrant Cascadian
> Acked-by: Angelo Dureghello
> Reviewed-by: Simon Glass
Applied to u-boot/master (before v2016.11-rc3), thanks!
--
Tom
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Description: Digital signature
___
On Sun, Oct 23, 2016 at 08:45:16PM -0700, Vagrant Cascadian wrote:
> Signed-off-by: Vagrant Cascadian
> Reviewed-by: Simon Glass
Applied to u-boot/master (before v2016.11-rc3), thanks!
--
Tom
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___
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On Sun, Oct 23, 2016 at 07:39:01AM -0500, Adam Ford wrote:
> The autodetect feature doesn't allow users to specify the device tree.
> This fix will make it only autodetect if 'fdtimage' is not defined.
>
> Signed-off-by: Adam Ford
> Reviewed-by: Tom Rini
>
> diff --git a/board/logicpd/omap3som
On Sat, Oct 15, 2016 at 08:16:27AM -0500, Adam Ford wrote:
> Not all networks have a DHCP server configured properly, so these
> scripts make it easier to boot in that scenario.
>
> Signed-off-by: Adam Ford
> Reviewed-by: Tom Rini
>
> diff --git a/include/configs/omap3_logic.h b/include/config
On Sat, Oct 15, 2016 at 06:23:11AM -0500, Adam Ford wrote:
> The LCD isn't supported in U-Boot and the LCD is now configured in
> the device tree, so this code is pointless.
>
> V2: Eliminiate erroneous newline.
>
> Signed-off-by: Adam Ford
> Reviewed-by: Tom Rini
>
> diff --git a/include/con
On Tue, Oct 11, 2016 at 12:39:05PM -0500, Nishanth Menon wrote:
> Current logic for query of revision, board_name, config returns
> NULL. Users of these functions do a direct strncmp to compare.
> Unfortunately, as per conventions require two valid strings to compare
> against and the current impl
On Tue, Oct 11, 2016 at 12:39:04PM -0500, Nishanth Menon wrote:
> config should have been initialized along with others as defaults.
>
> Signed-off-by: Nishanth Menon
> Reviewed-by: Lokesh Vutla
> Reviewed-by: Tom Rini
Applied to u-boot/master (before v2016.11-rc3), thanks!
--
Tom
signatu
On Fri, Oct 07, 2016 at 07:44:14PM +0200, Alexander von Gernler wrote:
> Signed-off-by: Alexander von Gernler
Applied to u-boot/master (before v2016.11-rc3), thanks!
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On Tue, Oct 11, 2016 at 12:39:03PM -0500, Nishanth Menon wrote:
> We should have used TI_DEAD_EEPROM_MAGIC in the first place.
>
> Fixes: d3b98a9eb941 ("ti: common: dra7: Add standard access for board
> description EEPROM")
> Signed-off-by: Nishanth Menon
> Reviewed-by: Lokesh Vutla
> Reviewed
Hi Bin,
On 1 November 2016 at 04:07, Bin Meng wrote:
> Hi Simon,
>
> On Fri, Oct 28, 2016 at 10:41 AM, Simon Glass wrote:
>> Hi Bin,
>>
>> On 12 October 2016 at 17:56, Bin Meng wrote:
>>> Hi Simon,
>>>
>>> On Thu, Oct 13, 2016 at 8:04 AM, Simon Glass wrote:
Hi Bin,
On 6 October
>From: Marek Vasut [mailto:ma...@denx.de]
>On 10/27/2016 08:56 AM, Sriram Dash wrote:
>> For FSL USB node fixup, the dt is walked multiple times for fixing
>> erratum and phy type. This patch walks the tree and fixes the node
>> till no more USB nodes are left.
>>
>> Signed-off-by: Sriram Dash
>>
Hi,
Regarding "invalid" Ethernet address.
Is there a reliable way to set the default environment that will prevent
Ethernet communications from being attempted.
That is, when an Ethernet capable system is brand new and before an
Ethernet MAC address has been assigned to that system during
m
From: Siva Durga Prasad Paladugu
Use random ethernet address if the ethernet address found
is invalid, not zero and config for random address
is defined.
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek
---
net/eth-uclass.c | 3 ++-
1 file changed, 2 insertions(+), 1 del
2016-11-02 5:30 GMT+05:30 郑 祎 :
> It seems that the register arrary should be indexed by cs, not by wordlen.
Please send it like patch format[1]
[1] http://www.denx.de/wiki/U-Boot/Patches
--
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, Indi
On 11/02/2016 12:21 PM, Marek Vasut wrote:
> Always execute the tools from the build destination directory
> and with a full path, otherwise we may get errors like this
> (from OE-core):
>
> | ERROR: oe_runmake failed
> | cat ./Licenses/gpl-2.0.txt | gzip -9 -c | \
> | tools/bin2header licen
Always execute the tools from the build destination directory
and with a full path, otherwise we may get errors like this
(from OE-core):
| ERROR: oe_runmake failed
| cat ./Licenses/gpl-2.0.txt | gzip -9 -c | \
| tools/bin2header license_gzip > ./include/license.h
| /bin/sh: 2: tools/bin2hea
Dear sir or madam :
when i want to generate u-boot file for zynq device , i found it can not be
compiled ;
the error code are as below :
root@lolo-pc:~/zynq_study/u-boot_file/u-boot-d8bdfc8# make zynq_zc702_defconfig
HOSTCC scripts/basic/fixdep
as: unrecognized option '--32'
scripts/Makef
It seems that the register arrary should be indexed by cs, not by wordlen.
--
Brock Zheng
郑 祎
北京中科腾越科技发展有限公司
北京市海淀区东北旺西路8号中关村软件园21号楼启明星辰大厦二层六区（邮编：100094）
diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c
index 60e9d6e..2380a0e 100644
--- a/drivers/spi/omap3_spi.c
+++ b/drivers/s
On 11/02/2016 09:30 AM, Sriram Dash wrote:
>> From: Marek Vasut [mailto:ma...@denx.de]
>> On 10/27/2016 08:56 AM, Sriram Dash wrote:
>>> For FSL USB node fixup, the dt is walked multiple times for fixing
>>> erratum and phy type. This patch walks the tree and fixes the node
>>> till no more USB nod
Firmware provides a spin table on the raspberry pi. This table shouldn't
get overwritten by payloads, so we need to mark it as reserved.
Signed-off-by: Alexander Graf
---
board/raspberrypi/rpi/rpi.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/board/raspberrypi/rpi/rpi.c b/board/ras
To enable working efifb support, let's map the frame buffer as 32bpp
instead of 16bpp.
Signed-off-by: Alexander Graf
---
drivers/video/bcm2835.c | 6 +++---
include/configs/rpi.h | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/video/bcm2835.c b/drivers/video/bcm2
With this patch set I can successfully boot a Raspberry Pi 3 into Linux, with
efifb, efi based reset/power off and spin table secondary bringup working.
Please apply.
v2 -> v3:
- Rebase
- Adjust to new runtime macro names
Alexander Graf (3):
ARM: bcm283x: Implement EFI RTS reset_system
The rpi has a pretty simple way of resetting the whole system. All it takes
is to poke a few registers at a well defined location in MMIO space.
This patch adds support for the EFI loader implementation to allow an OS to
reset and power off the system when we're outside of boot time.
Signed-off-b
From: Siva Durga Prasad Paladugu
Correct the sdhci minimum frequency for ep platform.
It should be right shift instead of left shift operand.
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek
---
include/configs/xilinx_zynqmp_ep.h | 2 +-
1 file changed, 1 insertion(+), 1
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