The second USB wasn't enabled. This patch fixes it.
Signed-off-by: Michal Simek
---
board/xilinx/zynqmp/zynqmp.c| 20 ++--
include/configs/xilinx_zynqmp.h | 2 +-
2 files changed, 19 insertions(+), 3 deletions(-)
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zyn
On 14.8.2016 20:31, Andreas Bießmann wrote:
> Commit 62afc601883e788f3f22291202d5b2a23c1a8b06 introduced fpga image load via
> bootm but broke the OS check in fit_image_load().
>
> This commit removes following compiler warning:
>
> ---8<---
> In file included from tools/common/image-fit.c:1:
> /
On 2016-08-14 13:06, Tom Rini wrote:
> On Tue, Aug 02, 2016 at 12:20:28AM -0700, Stefan Agner wrote:
>
>> From: Stefan Agner
>>
>> Flush loaded data cacheline aligned. This avoids warnings such as
>> CACHE: Misaligned operation at range [8100, 816d0fa8]
>>
>> Signed-off-by: Stefan Agner
>> T
From: Stefan Agner
Add LPAE support for mmu_set_region_dcache_behaviour. The function
is in use in some LPAE capable board such TI DRA7xx or NXP i.MX 7.
Signed-off-by: Stefan Agner
---
Changes in v5:
- Add this LPAE enablement patch
Changes in v4: None
Changes in v3: None
Changes in v2: None
From: Stefan Agner
The page table is maintained by the CPU, hence it is safe to always
align cache flush to a whole cache line size. This allows to use
mmu_page_table_flush for a single page table, e.g. when configure
only small regions through mmu_set_region_dcache_behaviour.
Signed-off-by: Ste
On 2016-08-14 13:01, Tom Rini wrote:
> On Mon, Aug 08, 2016 at 12:43:03AM -0700, Stefan Agner wrote:
>> On 2016-08-07 23:10, Lokesh Vutla wrote:
>> > Hi,
>> >
>> > On Sunday 07 August 2016 11:13 PM, Stefan Agner wrote:
>> >> From: Stefan Agner
>> >>
>> >> The page table is maintained by the CPU, h
On Sun, 14 Aug 2016, jonsm...@gmail.com wrote:
I'm trying out various versions of the A64 u-boot -- Allwinner lichee,
longsleep, apritzel, etc on the Pine64. I can get all of them up to
the prompt, but fastboot doesn't work in an of them. There is code
from Allwinner in there for implementing fa
I'm trying out various versions of the A64 u-boot -- Allwinner lichee,
longsleep, apritzel, etc on the Pine64. I can get all of them up to
the prompt, but fastboot doesn't work in an of them. There is code
from Allwinner in there for implementing fastboot, but so far I've had
no luck getting it to
On Sun, Aug 14, 2016 at 07:43:56PM +, Karl Beldan wrote:
> On Sun, Aug 14, 2016 at 11:47:25AM -0400, Tom Rini wrote:
> > On Sun, Aug 14, 2016 at 03:03:16PM +, Karl Beldan wrote:
> >
> > > check_cache_range() warns that the top boundaries are not properly
> > > aligned while flushing and in
On Tue, Aug 02, 2016 at 12:20:28AM -0700, Stefan Agner wrote:
> From: Stefan Agner
>
> Flush loaded data cacheline aligned. This avoids warnings such as
> CACHE: Misaligned operation at range [8100, 816d0fa8]
>
> Signed-off-by: Stefan Agner
> Tested-by: Fabio Estevam
> Reviewed-by: Simon
On Thu, Jun 23, 2016 at 01:37:32PM +0100, Jon Medhurst (Tixy) wrote:
> The firmware on TC2 needs to be configured appropriately before booting
> in nonsec mode will work as expected, so test for this and fall back to
> sec mode if required.
>
> Signed-off-by: Jon Medhurst
> Reviewed-by: Ryan Har
On Mon, Aug 08, 2016 at 12:43:03AM -0700, Stefan Agner wrote:
> On 2016-08-07 23:10, Lokesh Vutla wrote:
> > Hi,
> >
> > On Sunday 07 August 2016 11:13 PM, Stefan Agner wrote:
> >> From: Stefan Agner
> >>
> >> The page table is maintained by the CPU, hence it is safe to always
> >> align cache fl
On Sun, Aug 14, 2016 at 11:47:25AM -0400, Tom Rini wrote:
> On Sun, Aug 14, 2016 at 03:03:16PM +, Karl Beldan wrote:
>
> > check_cache_range() warns that the top boundaries are not properly
> > aligned while flushing and invalidating the buffers and make these
> > operations to fail.
> > ATM t
On 18.07.16 13:47, Mario Six wrote:
> Commit 302c5db ("dm: tpm: Add Driver Model support for tpm_atmel_twi
> driver") converted the Atmel TWI TPM driver itself to driver model, but
> kept the legacy-style i2c_write/i2c_read calls.
>
> Commit 3e7d940 ("dm: tpm: Every TPM drivers should depends on D
Commit 62afc601883e788f3f22291202d5b2a23c1a8b06 introduced fpga image load via
bootm but broke the OS check in fit_image_load().
This commit removes following compiler warning:
---8<---
In file included from tools/common/image-fit.c:1:
/Volumes/devel/u-boot/tools/../common/image-fit.c:1715:39: wa
The following command triggers a segfault in search_dir:
./sandbox/u-boot -c 'host bind 0 ./sandbox/test/fs/3GB.ext4.img ;
ext4write host 0 0 /./foo 0x10'
The following command triggers a segfault in check_filename:
./sandbox/u-boot -c 'host bind 0 ./sandbox/test/fs/3GB.ext4.img ;
ext4writ
The following command crashes u-boot:
./sandbox/u-boot -c 'i=0; host bind 0 ./sandbox/test/fs/3GB.ext4.img ;
while test $i -lt 200 ; do echo $i; setexpr i $i + 1;
ext4write host 0 0 /foobar${i} 0; done'
Previously, the code updated the direct_block even for extents, and
fortunately crashed bef
In case the dir entry creation failed, ext4fs_write would later overwrite
a random inode, as inodeno was never initialized.
Signed-off-by: Stefan Brüns
---
fs/ext4/ext4_common.c | 12 ++--
fs/ext4/ext4_common.h | 2 +-
fs/ext4/ext4_write.c | 4 +++-
3 files changed, 10 insertions(+),
Hi,
On Fri, Aug 12, 2016 at 09:27:29AM -0600, Simon Glass wrote:
> Yes it means there is an error in the calling code. If you can figure
> out who is calling this then it is worth fixing. But also see recent
> discussions on the mailing list. Also possibly this patch?
>
> http://patchwork.ozlabs.
The U-Boot ext4 support has some bugs which either cause U-Boot crashes
or lead to filesystem corruption.
This series goes on top of the endian patch series by Michael Walle.
The first patch has been sent earlier but contained a bug.
Stefan Brüns (3):
ext4: fix possible crash on directory trav
The following command triggers a segfault in search_dir:
./sandbox/u-boot -c 'host bind 0 ./sandbox/test/fs/3GB.ext4.img ;
ext4write host 0 0 /./foo 0x10'
The following command triggers a segfault in check_filename:
./sandbox/u-boot -c 'host bind 0 ./sandbox/test/fs/3GB.ext4.img ;
ext4writ
Hello All,
I am using ums (USB Mass Storage) in u-boot to expose the storage of
my device into my host machine. Everything works okay except when the
host machine wakeup from the sleep - my device got disconnect from
host after it received an resume signal.
I tried the g_mass_storage driver in th
Dear Pantelis,
On 20.06.16 03:58, Wenyou Yang wrote:
> Add the programmable clock mode for the clock generator.
>
this one is delegated to me, but I think it is out of my scope. Could
you please have a look?
Andreas
> Signed-off-by: Wenyou Yang
> ---
>
> drivers/mmc/sdhci.c | 49 +++
ATM the rx and tx descriptors are handled as cached memory while they
lie in a dedicated RAM of the SoCs, which is an uncached area.
Removing the said dcache ops, while optimizing the logic and clarifying
the code, also gets rid of most of the check_cache_range() incurred
warnings:
CACHE: Misaligne
On 13 August 2016 at 02:36, Stephen Warren wrote:
> From: Stephen Warren
>
> When the set_mode() function runs, the SPI bus is not active, and hence
> the clocks to the SPI controller are not running. Any register read/write
> at this time will hang the CPU. Remove the code from set_mode() that d
On Sun, Aug 14, 2016 at 03:03:15PM +, Karl Beldan wrote:
> ATM the rx and tx descriptors are handled as cached memory while they
> lie in a dedicated RAM of the SoCs, which is an uncached area.
> Removing the said dcache ops, while optimizing the logic and clarifying
> the code, also gets rid
On Sun, Aug 14, 2016 at 03:03:16PM +, Karl Beldan wrote:
> check_cache_range() warns that the top boundaries are not properly
> aligned while flushing and invalidating the buffers and make these
> operations to fail.
> ATM the RX bottom boundaries are aligned by design with EMAC_RXBUF_SIZE,
>
check_cache_range() warns that the top boundaries are not properly
aligned while flushing and invalidating the buffers and make these
operations to fail.
ATM the RX bottom boundaries are aligned by design with EMAC_RXBUF_SIZE,
properly aligned with ARCH_DMA_MINALIGN, however the top ones are not.
ATM when receiving a packet the whole buffer is invalidated, this change
optimizes this behaviour.
Signed-off-by: Karl Beldan
---
drivers/net/davinci_emac.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c
in
On Freitag, 12. August 2016 15:16:20 CEST Michael Walle wrote:
> All fields were accessed directly instead of using the proper byte swap
> functions. Thus, ext4 write support was only usable on little-endian
> architectures. Fix this.
>
> Signed-off-by: Michael Walle
I have tested this on sandbo
Hi,
On Tue, Aug 2, 2016 at 9:35 PM, Benoît Thébaudeau
wrote:
> On Tue, Aug 2, 2016 at 8:53 PM, Stephen Warren wrote:
>> On 07/28/2016 12:11 AM, Tien Fong Chee wrote:
>>>
>>> Single 64KB get_contents_vfatname_block global variable would be used for
>>> all FAT implementation instead of allocating
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