To i.MX7, different boot medias' IVT offset is fixed at 0x400.
So consolidate BOOT_FROM to use FLASH_OFFSET_STANDARD.
Signed-off-by: Peng Fan
Cc: Stefano Babic
---
board/freescale/mx7dsabresd/imximage.cfg | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/board/freescale
Add pinctrl defines for NXP i.MX 6ULL.
Since i.MX6ULL reuses some definitions of i.MX6UL,
also add i.MX6UL pinctrl defines from linux kernel commit (29b4817d401).
Signed-off-by: Peng Fan
Cc: Simon Glass
Cc: Stefano Babic
---
arch/arm/dts/imx6ul-pinfunc.h | 938 +++
Need to initialize mmc->dev when probe, or will met
"dev_get_uclass_priv: null device", when `mmc dev 1`.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Simon Glass
Cc: Jaehoon Chung
---
drivers/mmc/fsl_esdhc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mmc/fsl_esdhc.c b/drive
Add device tree for i.MX6ULL.
Signed-off-by: Peng Fan
Cc: Simon Glass
Cc: Stefano Babic
---
arch/arm/dts/imx6ull.dtsi | 1161 +
1 file changed, 1161 insertions(+)
create mode 100644 arch/arm/dts/imx6ull.dtsi
diff --git a/arch/arm/dts/imx6ull.dtsi b
Add i.MX6ULL EVK board support:
Add device tree file, which is copied from NXP Linux.
Enabled DM_MMC, DM_GPIO, DM_I2C, DM_SPI, PINCTRL, DM_REGULATOR.
The uart iomux settings are still keeped in board file.
Boot Log:
U-Boot 2016.09-rc1-00366-gbb419ef-dirty (Aug 11 2016 - 13:08:58 +0800)
CPU: Fre
Adjust POR_B settings on i.MX6ULL according to IC design
team's suggestion:
2'b00 : always PUP100K
2'b01 : PUP100K when PMIC_ON_REQ || SOC_NOT_FAIL
2'b10 : always disable PUP100K
2'b11 : PDN100K when SOC_FAIL, PUP100K when SOC_NOT_FAIL -- recommended setting
Signed-off-by: Peng Fan
Signed-of
Rom already initialized clock at 396M and 132M for arm core and ahb,
so skip setting them again in U-Boot.
Signed-off-by: Peng Fan
Cc: Stefano Babic
---
arch/arm/cpu/armv7/mx6/soc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/a
Add i.MX6ULL major cpu type.
Signed-off-by: Peng Fan
Signed-off-by: Ye Li
Cc: Stefano Babic
---
arch/arm/imx-common/cpu.c | 2 ++
arch/arm/include/asm/arch-imx/cpu.h | 3 ++-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common
Add i.mx6ul clock header, copied from kernel commit (29b4817d401).
i.MX6ULL reuse the file in Linux Kernel, so let's keep the same.
Signed-off-by: Peng Fan
Cc: Simon Glass
Cc: Stefano Babic
---
include/dt-bindings/clock/imx6ul-clock.h | 253 +++
1 file changed, 253
i.MX6ULL has two 128 bits fuse banks, bank 7 and bank 8,
while other banks use 256 bits. So we have to adjust the
word and bank index when accessing the bank 8.
When in command line `fuse read 8 0 1`, you can image
`fuse read 7 4 1` in the ocotp driver implementation for 6ULL.
When programming, w
Per to design team, on i.MX6UL, the LDO 1.2V bandgap voltage
is 30mV higher, so we need to adjust the REFTOP_VBGADJ(anatop
MISC0 bit[6:4]) setting to 2b'110.
Signed-off-by: Peng Fan
Signed-off-by: Bai Ping
Cc: Stefano Babic
---
arch/arm/cpu/armv7/mx6/soc.c | 6 ++
arch/arm/incl
There two iomuxc for i.MX6ULL. one iomuxc is compatible is i.MX6UL,
the other iomuxc is for SVNS usage, similar with the one in mx7.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Simon Glass
---
drivers/pinctrl/nxp/pinctrl-imx6.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers
Update memory map address for mx6ull.
Signed-off-by: Peng Fan
Signed-off-by: Ye Li
Cc: Stefano Babic
---
arch/arm/include/asm/arch-mx6/imx-regs.h | 17 ++---
1 file changed, 14 insertions(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h
b/arch/arm/include/
Add iomux header file for i.MX6ULL.
Signed-off-by: Peng Fan
Signed-off-by: Ye Li
Cc: Stefano Babic
---
arch/arm/include/asm/arch-mx6/mx6-pins.h|2 +
arch/arm/include/asm/arch-mx6/mx6ull_pins.h | 1065 +++
2 files changed, 1067 insertions(+)
create mode 100644 a
Update Clock settings and CCM register map for i.MX6ULL.
Signed-off-by: Peng Fan
Signed-off-by: Ye Li
Cc: Stefano Babic
---
arch/arm/cpu/armv7/mx6/clock.c | 59
arch/arm/include/asm/arch-mx6/crm_regs.h | 59
2 files ch
Since MX6ULL select MX6UL, we can not use IS_ENABLED(CONFIG_MX6UL) here,
because this piece code is only for i.MX6UL.
Signed-off-by: Peng Fan
Cc: Stefano Babic
---
arch/arm/cpu/armv7/mx6/soc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arc
SNVS TAMPER pin and BOOT MODE pins are in SNVS IOMUXC module,
not in IOMUXC, so correct the related registers' offset.
Use IOMUX_CONFIG_LPSR flag for these pins, so we can differentiate
them from iomuxc pins.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: "Benoît Thébaudeau"
---
arch/arm/imx-c
Since the mx6ull adds the AIPS3, so enable its initialization.
Signed-off-by: Peng Fan
Signed-off-by: Ye Li
Cc: Stefano Babic
---
arch/arm/imx-common/init.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/imx-common/init.c b/arch/arm/imx-common/init.c
index 3d2ce3a
Update misc SOC related settings for i.MX6ULL, such as FEC mac address,
cpu speed grading and mmdc channel mask clearing.
Also update s_init to skip pfd reset.
Signed-off-by: Peng Fan
Cc: Stefano Babic
---
arch/arm/cpu/armv7/mx6/soc.c | 8
1 file changed, 4 insertions(+), 4 deletions(
From: Ye Li
i.MX6ULL is derivative from i.MX6UL, so select MX6UL for MX6ULL.
If need to differenate MX6ULL from MX6UL, use CONFIG_MX6ULL
Signed-off-by: Peng Fan
Signed-off-by: Ye Li
Cc: Stefano Babic
---
arch/arm/cpu/armv7/mx6/Kconfig | 4
1 file changed, 4 insertions(+)
diff --git a/a
Introduce is_mx6ull macro.
Signed-off-by: Peng Fan
Cc: Stefano Babic
---
arch/arm/include/asm/imx-common/sys_proto.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/include/asm/imx-common/sys_proto.h
b/arch/arm/include/asm/imx-common/sys_proto.h
index 32f95b3..6ace8bb 100644
--- a
The i.MX6ULL's GPT supportting taking OSC as clock source.
Add i.MX6ULL support.
Signed-off-by: Peng Fan
Signed-off-by: Ye Li
Cc: Stefano Babic
---
arch/arm/imx-common/timer.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/imx-common/timer.c b/arch/arm/imx-
This patch set is to support i.MX6ULL and i.MX6ULL 14x14 evk board.
Device tree is also included and default enabled.
The iomux header file is also added, because we can not use pinctrl
to cover all the usecase, such as early pinmux settings.
Since i.MX6ULL is derivative from i.MX6UL, the device
On 2016年08月10日 22:21, Sandy Patterson wrote:
Move back_to_bootrom() call later in SPL init so that the console is
initialized and printouts happen.
Currently when ROCKCHIP_SPL_BACK_TO_BROM is enabled there is no console
output from the SPL init stages.
I wasn't sure exactly where this should
Sorry..
On 08/11/2016 11:12 AM, Jaehoon Chung wrote:
> To prevent the compiler error, split the checking condition whether
> cfg->ops is NULL or not.
> It's more clearly, because it's not included in mmc_config structure
> when CONFIG_DM_MMC_OPS is disabled.
I sent the wrong patch..I will resend
To prevent the compiler error, split the checking condition whether
cfg->ops is NULL or not.
It's more clearly, because it's not included in mmc_config structure
when CONFIG_DM_MMC_OPS is disabled.
drivers/mmc/mmc_legacy.c: In function ‘mmc_create’:
drivers/mmc/mmc_legacy.c:118:31: error: ‘const s
Hi,
On 08/10/2016 11:51 AM, Wenyou Yang wrote:
> Convert the driver to the driver model while retaining the existing
> legacy code. This allows the driver to support boards that have
> converted to driver model as well as those that have not.
>
> Signed-off-by: Wenyou Yang
> Reviewed-by: Simon G
On Wed, Aug 10, 2016 at 11:35:47PM +0900, Nobuhiro Iwamatsu wrote:
> Hi Tom,
>
> Please pull u-boot-sh rmobile branch.
>
> The following changes since commit 59d07ee08e858bf2c121d0cdc6c8ddd3b26ee5b1:
>
> SPL: tiny-printf: avoid any BSS usage (2016-07-08 12:50:34 -0400)
>
> are available in t
Hi Joe,
On 10 August 2016 at 10:43, Joe Desbonnet wrote:
>
> I've been trying to implement vboot from SPI flash on the BeagleBone Black
> with only limited success. I'm working with u-boot 2016.07 and using the
> instructions in beaglebone_vboot.txt (in doc directory).
>
> So far: I've had no pro
Hi Lokesh,
On Wed, Aug 10, 2016 at 7:02 AM, Lokesh Vutla wrote:
>
>
> On Wednesday 10 August 2016 08:43 AM, Joe Hershberger wrote:
>> Hi Lokesh
>>
>> On Tue, Aug 9, 2016 at 12:47 AM, Lokesh Vutla wrote:
>>> cpsw tries to flush dcache which is not in the range of PKTSIZE.
>>> Because of this the
> On 10 Aug 2016, at 18:25, Tom Rini wrote:
>
> On Wed, Aug 10, 2016 at 03:25:16PM +0200, Alexander Graf wrote:
>>
>>
>>> Am 10.08.2016 um 15:16 schrieb Simon Glass :
>>>
>>> Hi Alex,
>>>
On 10 August 2016 at 07:02, Alexander Graf wrote:
> On 08/10/2016 02:56 PM, Simon Glass wrote:
I've been trying to implement vboot from SPI flash on the BeagleBone Black
with only limited success. I'm working with u-boot 2016.07 and using the
instructions in beaglebone_vboot.txt (in doc directory).
So far: I've had no problem booting regular u-boot from SPI flash. I build
with am335x_boneb
On Wed, Aug 10, 2016 at 10:05:03PM +0530, Mugunthan V N wrote:
> Enable eth driver model for dra7xx_evm as cpsw supports
> driver model.
>
> This was already added with the commit 641b936fa5ba but with
> commit bd7245849f7c to add fit support CONFIG_DM_ETH was missed.
>
> Signed-off-by: Muguntha
Enable eth driver model for dra7xx_evm as cpsw supports
driver model.
This was already added with the commit 641b936fa5ba but with
commit bd7245849f7c to add fit support CONFIG_DM_ETH was missed.
Signed-off-by: Mugunthan V N
Cc: Lokesh Vutla
---
configs/dra7xx_evm_defconfig | 1 +
1 file chang
On Wed, Aug 10, 2016 at 06:36:44PM +0300, Max Filippov wrote:
> From: Chris Zankel
>
> The Xtensa processor architecture is a configurable, extensible,
> and synthesizable 32-bit RISC processor core provided by Tensilica, inc.
>
> This is the second part of the basic architecture port, adding t
On Wed, Aug 10, 2016 at 07:24:06PM +0530, Sekhar Nori wrote:
> K2G can benefit from driver model support in the
> MMC/SD driver it uses: omap_hsmmc
>
> Enable driver model MMC support for K2G.
>
> Signed-off-by: Sekhar Nori
Reviewed-by: Tom Rini
--
Tom
signature.asc
Description: Digital s
On Wed, Aug 10, 2016 at 07:24:05PM +0530, Sekhar Nori wrote:
> The K2G EVM from TI has an SD card slot as
> well as onboard eMMC for data storage.
>
> Enable support for these.
>
> Signed-off-by: Sekhar Nori
Reviewed-by: Tom Rini
--
Tom
signature.asc
Description: Digital signature
___
On Wed, Aug 10, 2016 at 07:24:03PM +0530, Sekhar Nori wrote:
> structure member 'cd_inverted' of omap_hsmmc_data
> is available only when OMAP_HSMMC_USE_GPIO is
> defined.
>
> When CONFIG_DM_MMC is defined, but not
> CONFIG_OMAP_GPIO, this will cause build breakage
> in omap_hsmmc driver of the s
On Wed, Aug 10, 2016 at 07:24:04PM +0530, Sekhar Nori wrote:
> K2G SoC from TI has two MMC/SD controllers.
> Add device tree data for these.
>
> Signed-off-by: Sekhar Nori
Reviewed-by: Tom Rini
--
Tom
signature.asc
Description: Digital signature
On Wed, Aug 10, 2016 at 03:25:16PM +0200, Alexander Graf wrote:
>
>
> > Am 10.08.2016 um 15:16 schrieb Simon Glass :
> >
> > Hi Alex,
> >
> >> On 10 August 2016 at 07:02, Alexander Graf wrote:
> >>> On 08/10/2016 02:56 PM, Simon Glass wrote:
> >>>
> >>> +Tom
> >>>
> >>> Hi Alex,
> >>>
> >>>
On Wednesday 10 August 2016 07:24 PM, Sekhar Nori wrote:
> The K2G EVM from TI has an SD card slot as
> well as onboard eMMC for data storage.
>
> Enable support for these.
>
> Signed-off-by: Sekhar Nori
Acked-by: Mugunthan V N
Regards
Mugunthan V N
___
From: Chris Zankel
DC232B is an xtensa processor with full MMUv2 capable of running Linux.
Core information files are autogenerated from the processor description
and are not meant to be edited.
Signed-off-by: Chris Zankel
Signed-off-by: Max Filippov
Reviewed-by: Simon Glass
Reviewed-by: Tom
On Wednesday 10 August 2016 07:24 PM, Sekhar Nori wrote:
> K2G can benefit from driver model support in the
> MMC/SD driver it uses: omap_hsmmc
>
> Enable driver model MMC support for K2G.
>
> Signed-off-by: Sekhar Nori
> ---
Acked-by: Mugunthan V N
Regards
Mugunthan V N
_
From: Chris Zankel
The 'xtfpga' board is actually a set of FPGA evaluation boards that
can be configured to run an Xtensa processor.
- Avnet Xilinx LX60
- Avnet Xilinx LX110
- Avnet Xilinx LX200
- Xilinx ML605
- Xilinx KC705
These boards share the same components (open-ethernet, ns16550 se
On Wednesday 10 August 2016 07:24 PM, Sekhar Nori wrote:
> K2G SoC from TI has two MMC/SD controllers.
> Add device tree data for these.
>
> Signed-off-by: Sekhar Nori
> ---
Acked-by: Mugunthan V N
Regards
Mugunthan V N
___
U-Boot mailing list
U-Boot
On Wednesday 10 August 2016 07:24 PM, Sekhar Nori wrote:
> structure member 'cd_inverted' of omap_hsmmc_data
> is available only when OMAP_HSMMC_USE_GPIO is
> defined.
>
> When CONFIG_DM_MMC is defined, but not
> CONFIG_OMAP_GPIO, this will cause build breakage
> in omap_hsmmc driver of the sort:
DC233C is an xtensa processor with full MMUv3 capable of running Linux.
Core information files are autogenerated from the processor description
and are not meant to be edited.
Signed-off-by: Max Filippov
Reviewed-by: Simon Glass
Reviewed-by: Tom Rini
---
arch/xtensa/include/asm/arch-dc233c/cor
From: Chris Zankel
The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.
This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.
Signed-off-by: Chris Zankel
DE212 is a general purpose xtensa processor without full MMU.
Core information files are autogenerated from the processor description
and are not meant to be edited.
Signed-off-by: Max Filippov
Reviewed-by: Simon Glass
Reviewed-by: Tom Rini
---
arch/xtensa/include/asm/arch-de212/core.h| 57
From: Chris Zankel
The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Cadence.
This is the first part of the basic architecture port with changes to
common files. The 'arch/xtensa' directory, and boards and additional
drivers
Hello,
this series adds U-Boot port to Xtensa, configurable processor architecture
from Tensilica, Inc., now Cadence Design Systems Inc. It depends on the
following patch series:
- net/ethoc improvements
http://lists.denx.de/pipermail/u-boot/2016-August/263040.html
- drivers/sysreset: group sysr
Hi Tom,
Please pull u-boot-sh rmobile branch.
The following changes since commit 59d07ee08e858bf2c121d0cdc6c8ddd3b26ee5b1:
SPL: tiny-printf: avoid any BSS usage (2016-07-08 12:50:34 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-sh.git rmobile
for you to fetch cha
Move back_to_bootrom() call later in SPL init so that the console is
initialized and printouts happen.
Currently when ROCKCHIP_SPL_BACK_TO_BROM is enabled there is no console
output from the SPL init stages.
I wasn't sure exactly where this should happen, so if we are set to do
run spl_board_init
Hi Alex,
On 10 August 2016 at 07:41, Alexander Graf wrote:
>
>> On 10 Aug 2016, at 15:33, Simon Glass wrote:
>>
>> Hi Alex,
>>
>> On 10 August 2016 at 07:25, Alexander Graf wrote:
>>>
>>>
Am 10.08.2016 um 15:16 schrieb Simon Glass :
Hi Alex,
> On 10 August 2016 at 07:02,
K2G SoC from TI has two MMC/SD controllers.
Add device tree data for these.
Signed-off-by: Sekhar Nori
---
arch/arm/dts/k2g.dtsi | 23 +++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/dts/k2g.dtsi b/arch/arm/dts/k2g.dtsi
index 00cd49297336..add03b74da36 100644
---
This patch set switches mmc/sd support on k2g
to use driver model.
Tested both SD card and emmc on k2g-evm by
writing data, reading it back and comparing crc.
also tested with buildman for am33xx and omap
Sekhar Nori (4):
drivers: mmc: omap_hsmmc: fix build breakage
ARM: dts: K2G: Add suppor
The K2G EVM from TI has an SD card slot as
well as onboard eMMC for data storage.
Enable support for these.
Signed-off-by: Sekhar Nori
---
arch/arm/dts/k2g-evm.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/dts/k2g-evm.dts b/arch/arm/dts/k2g-evm.dts
index e95efd476707.
structure member 'cd_inverted' of omap_hsmmc_data
is available only when OMAP_HSMMC_USE_GPIO is
defined.
When CONFIG_DM_MMC is defined, but not
CONFIG_OMAP_GPIO, this will cause build breakage
in omap_hsmmc driver of the sort:
CC drivers/mmc/omap_hsmmc.o
../drivers/mmc/omap_hsmmc.c: In fun
K2G can benefit from driver model support in the
MMC/SD driver it uses: omap_hsmmc
Enable driver model MMC support for K2G.
Signed-off-by: Sekhar Nori
---
configs/k2g_evm_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig
index 5d
> On 10 Aug 2016, at 15:33, Simon Glass wrote:
>
> Hi Alex,
>
> On 10 August 2016 at 07:25, Alexander Graf wrote:
>>
>>
>>> Am 10.08.2016 um 15:16 schrieb Simon Glass :
>>>
>>> Hi Alex,
>>>
On 10 August 2016 at 07:02, Alexander Graf wrote:
> On 08/10/2016 02:56 PM, Simon Glass wr
Hi Alex,
On 10 August 2016 at 07:25, Alexander Graf wrote:
>
>
>> Am 10.08.2016 um 15:16 schrieb Simon Glass :
>>
>> Hi Alex,
>>
>>> On 10 August 2016 at 07:02, Alexander Graf wrote:
On 08/10/2016 02:56 PM, Simon Glass wrote:
+Tom
Hi Alex,
On 10 August 2016 at
> Am 10.08.2016 um 15:16 schrieb Simon Glass :
>
> Hi Alex,
>
>> On 10 August 2016 at 07:02, Alexander Graf wrote:
>>> On 08/10/2016 02:56 PM, Simon Glass wrote:
>>>
>>> +Tom
>>>
>>> Hi Alex,
>>>
>>> On 10 August 2016 at 01:47, Alexander Graf wrote:
>
> On 08 Aug 2016, at 23:44, S
Hi Alex,
On 10 August 2016 at 07:02, Alexander Graf wrote:
> On 08/10/2016 02:56 PM, Simon Glass wrote:
>>
>> +Tom
>>
>> Hi Alex,
>>
>> On 10 August 2016 at 01:47, Alexander Graf wrote:
On 08 Aug 2016, at 23:44, Simon Glass wrote:
Hi Alexander,
On 5 August 2016 at
On 08/10/2016 02:56 PM, Simon Glass wrote:
+Tom
Hi Alex,
On 10 August 2016 at 01:47, Alexander Graf wrote:
On 08 Aug 2016, at 23:44, Simon Glass wrote:
Hi Alexander,
On 5 August 2016 at 06:49, Alexander Graf wrote:
When using CONFIG_BLK, there were 2 issues:
1) The name we generate th
Hi,
On 9 August 2016 at 16:44, Stefan Brüns wrote:
> Signed-off-by: Stefan Brüns
> ---
> test/fs/fs-test.sh | 40
> 1 file changed, 20 insertions(+), 20 deletions(-)
I'd like to convert this test to pytest. If you are able to give that
a crack, please s
On 08/10/2016 02:56 PM, Simon Glass wrote:
Hi Alex,
On 10 August 2016 at 05:49, Alexander Graf wrote:
On 08/07/2016 01:23 AM, Simon Glass wrote:
Add the required pieces to support the EFI loader on x86.
Since U-Boot only builds for 32-bit on x86, only a 32-bit EFI application
is supported. I
+Tom
Hi Alex,
On 10 August 2016 at 01:47, Alexander Graf wrote:
>
>> On 08 Aug 2016, at 23:44, Simon Glass wrote:
>>
>> Hi Alexander,
>>
>> On 5 August 2016 at 06:49, Alexander Graf wrote:
>>> When using CONFIG_BLK, there were 2 issues:
>>>
>>> 1) The name we generate the device with has to m
Hi Alex,
On 10 August 2016 at 05:49, Alexander Graf wrote:
> On 08/07/2016 01:23 AM, Simon Glass wrote:
>>
>> Add the required pieces to support the EFI loader on x86.
>>
>> Since U-Boot only builds for 32-bit on x86, only a 32-bit EFI application
>> is supported. If a 64-bit kernel must be boote
On 9 August 2016 at 16:44, Stefan Brüns wrote:
> Signed-off-by: Stefan Brüns
> ---
> cmd/host.c | 8
> 1 file changed, 8 insertions(+)
Acked-by: Simon Glass
Please can you add a short commit message?
>
> diff --git a/cmd/host.c b/cmd/host.c
> index 8d84415..b427e54 100644
> --- a/cm
The following changes since commit 59d07ee08e858bf2c121d0cdc6c8ddd3b26ee5b1:
SPL: tiny-printf: avoid any BSS usage (2016-07-08 12:50:34 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-sh.git rmobile
for you to fetch changes up to 9d96c3f426f72569c08d57a2736f984a9a632
On Wed, Aug 10, 2016 at 03:17:21PM +0530, Vignesh R wrote:
> Enable DM based regulator framework and also fixed regulator support as
> some IPs like mmc use regulators for there functioning.
>
> Signed-off-by: Vignesh R
Reviewed-by: Tom Rini
--
Tom
signature.asc
Description: Digital signat
On Wed, Aug 10, 2016 at 03:17:20PM +0530, Vignesh R wrote:
> Add a node for evm_3v3_sd using onboard PCF GPIO expander which feeds
> on to mmc vdd.
> Update mapping for vmmc-supply and vmmc_aux-supply.
> evm_3v3_sd supplies to SD card vdd, and ldo1 to sdcard i/o lines.
>
> Signed-off-by: Vignesh
On Wednesday 10 August 2016 08:43 AM, Joe Hershberger wrote:
> Hi Lokesh
>
> On Tue, Aug 9, 2016 at 12:47 AM, Lokesh Vutla wrote:
>> cpsw tries to flush dcache which is not in the range of PKTSIZE.
>> Because of this the following warning comes while flushing:
>>
>> CACHE: Misaligned operation
On 08/07/2016 01:23 AM, Simon Glass wrote:
Add the required pieces to support the EFI loader on x86.
Since U-Boot only builds for 32-bit on x86, only a 32-bit EFI application
is supported. If a 64-bit kernel must be booted, U-Boot supports this
directly using FIT (see doc/uImage.FIT/kernel.its).
On 08/07/2016 01:23 AM, Simon Glass wrote:
These are missing in some functions. Add them to keep things consistent.
Signed-off-by: Simon Glass
Is there any way to change the EFIAPI definition so that we get build
warnings for non matching function types on aarch64 as well?
Reviewed-by: Ale
On Wed, Aug 10, 2016 at 09:53:03AM +0200, Michael Walle wrote:
> Am 2016-08-05 14:06, schrieb Michael Walle:
> >there doesn't seem to be a dedicated filesystem maintainer, but I've
> >included the original committer for the ext4 write support.
> >
> >I guess the ext4 write support does not work on
Hi Fabio,
> On Tue, Aug 9, 2016 at 5:41 AM, Lukasz Majewski
> wrote:
> > Change made in the commit:
> > "arm: Show cache warnings in U-Boot proper only"
> > SHA1: bcc53bf095893fbdae531a9a7b5d4ef4a125a7fc
> >
> > has revealed that during initial setting of MMU regions in the
> > mmu_set_region_dca
Some IPs like MMC use PCF GPIO lines as fixed regulator, hence add
support for the same.
Vignesh R (2):
ARM: dts: dra7xx-evm: add evm_3v3_sd regulator
ARM: dra7xx_evm: Enable regulator DM support
arch/arm/dts/dra7-evm.dts | 12 +++-
arch/arm/dts/dra72-evm.dts | 12
Add a node for evm_3v3_sd using onboard PCF GPIO expander which feeds
on to mmc vdd.
Update mapping for vmmc-supply and vmmc_aux-supply.
evm_3v3_sd supplies to SD card vdd, and ldo1 to sdcard i/o lines.
Signed-off-by: Vignesh R
---
arch/arm/dts/dra7-evm.dts | 12 +++-
arch/arm/dts/dra72
Enable DM based regulator framework and also fixed regulator support as
some IPs like mmc use regulators for there functioning.
Signed-off-by: Vignesh R
---
configs/dra7xx_evm_defconfig| 3 +++
configs/dra7xx_hs_evm_defconfig | 3 +++
2 files changed, 6 insertions(+)
diff --git a/configs/dr
Hello, Stefan.
I've tried your patch on Atom C2000 board (which is not supported by
U-boot, but I use U-boot
as the Coreboot payload).
I've added
/* Intel Atom processor C2000 PCU SMBus */
{ PCI_VDEVICE(INTEL, 0x1f3c) },
to intel_smbus_pci_supported for it to work.
It works and works exa
Hi Simon,
Also see cli_process_fdt() which allows you to lock out commands using
a device-tree setting. This avoids changing the U-Boot binary - it is
easy enough to update the device tree using fdtput. This is how Chrome
OS did it.
Hmm, interesting approach. Thanks for your suggestion.
Petr
_
Hi Jaehoon,
> -Original Message-
> From: Jaehoon Chung [mailto:jh80.ch...@samsung.com]
> Sent: 2016年8月10日 10:13
> To: Wenyou Yang - A41535 ; u-
> b...@lists.denx.de; pa...@antoniou-consulting.com
> Cc: h...@denx.de; s...@chromium.org; andr...@biessmann.org
> Subject: Re: [PATCH v10] mmc: a
I have u-boot built and can completely boot the pi with u-boot on the SD card.
But, the video resolution start off correctly, and when the kernel starts
switches to a low resolution.
Any suggestions?
Duncan Hare
714 931 7952
___
U-Boot mailing list
U-B
Commit f4db6c976cf ("arm: mvebu: Add runtime detection of UART (xmodem)
boot-mode") added a change to hdr->destaddr when dynamically patching an
image for UART boot mode. With this change, kwboot ceases to work on
Kirkwood.
Thus, let's change hdr->destaddr only when we are patching an image with
Am 2016-08-05 14:06, schrieb Michael Walle:
there doesn't seem to be a dedicated filesystem maintainer, but I've
included the original committer for the ext4 write support.
I guess the ext4 write support does not work on big-endian machines.
As far as I see, almost no fields of the ext4 structur
> On 08 Aug 2016, at 23:44, Simon Glass wrote:
>
> Hi Alexander,
>
> On 5 August 2016 at 06:49, Alexander Graf wrote:
>> When using CONFIG_BLK, there were 2 issues:
>>
>> 1) The name we generate the device with has to match the
>> name we set in efi_set_bootdev()
>>
>> 2) The device we
> On 09 Aug 2016, at 16:35, Simon Glass wrote:
>
> Hi Alexander,
>
> On 9 August 2016 at 08:11, Alexander Graf wrote:
>>
>> On 08/09/2016 03:57 PM, Simon Glass wrote:
>>>
>>> Hi Alexander,
>>>
>>> On 9 August 2016 at 00:48, Alexander Graf wrote:
> Am 08.08.2016 um 23:44 sch
The System Cache (outer cache) is used not only as L2 cache,
but also as locked SRAM. The functions for turning on/off it
is necessary whether the L2 cache is enabled or not.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/arm32/cache-uniphier.c | 34 +++
arch
Currently, only the CPU_ON function is supported.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/Kconfig| 2 +
arch/arm/mach-uniphier/arm32/Makefile | 1 +
arch/arm/mach-uniphier/arm32/arm-mpcore.h | 3 +
arch/arm/mach-uniphier/arm32/psci.c | 153 +
The UniPhier outer cache (L2 cache on ARMv7 SoCs) can be used as
SRAM by locking ways.
These functions will be used to transfer the trampoline code for SMP
into the locked SRAM.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/arm32/cache-uniphier.c | 50 +--
a
Now, all of these macros are only used in cache-uniphier.c, so
there is no need to export them in a header file.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/arm32/cache-uniphier.c | 56 +-
arch/arm/mach-uniphier/arm32/ssc-regs.h | 68 -
As the sLD3 Boot ROM has a complex page table, it is difficult to
set up the debug UART with enabling it. It will be much easier to
initialize the UART port after switching over to the straight-mapped
page table.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/arm32/lowlevel_init.S |
If CONFIG_UNIPHIER_L2CACHE_ON is undefined, the L2 cache is never
enabled, so there is no need for v7_outer_cache_disable(). The weak
stub avoids the compile error anyway.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/arm32/cache-uniphier.c | 2 +-
1 file changed, 1 insertion(+), 1
Move this option to Kconfig, renaming it into CONFIG_CACHE_UNIPHIER.
The new option name makes sense enough, and the same as Linux has.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/Kconfig| 7 +++
arch/arm/mach-uniphier/arm32/cache-uniphier.c | 2 +-
include/con
Here, the ldr pseudo-instruction falls into the ldr + data set.
The register access by [r1, #offset] produces shorter code.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/arm32/lowlevel_init.S | 48 +---
1 file changed, 22 insertions(+), 26 deletions(-)
diff
This invalidates entries in specified ways of the outer cache.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/arm32/cache-uniphier.c | 10 +-
arch/arm/mach-uniphier/arm32/cache-uniphier.h | 1 +
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-uni
Unify the range/all operation routines into the common function,
uniphier_cache_maint_common(), and sync code with Linux a bit more.
This reduces the code duplication.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/arm32/cache-uniphier.c | 99 ++-
1 file chan
Cleanups, Fixes, and PSCI support.
Masahiro Yamada (14):
ARM: uniphier: refactor outer cache code
ARM: uniphier: support prefetch and touch operations for outer cache
ARM: uniphier: do not compile v7_outer_cache_disable if L2 is disabled
ARM: uniphier: refactor L2 zero-touching code in
The DRAM is available at this point, so setup the temporary stack
and call the C function to reduce the code duplication a bit.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/arm32/late_lowlevel_init.S | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/arc
1 - 100 of 103 matches
Mail list logo
