It seems we've regressed with the Orange Pi PC for 2016.07 but I'm
wondering with the PCSI bits whether the process has changed and I've
missed the details of what's needed to flash u-boot.
With rc3 I see the follwing:
U-Boot SPL 2016.07-rc3 (Jul 07 2016 - 10:36:40)
DRAM: u MiB
Could not determin
On Fri, Jul 08, 2016 at 11:48:12PM +0200, Marek Vasut wrote:
> On 07/08/2016 06:50 PM, Tom Rini wrote:
> >On Fri, Jul 08, 2016 at 03:18:35PM +0100, Andre Przywara wrote:
> >
> >>As printf calls may be executed quite early, we should avoid using any
> >>BSS stored variables, since some boards put BS
On 07/08/2016 06:50 PM, Tom Rini wrote:
On Fri, Jul 08, 2016 at 03:18:35PM +0100, Andre Przywara wrote:
As printf calls may be executed quite early, we should avoid using any
BSS stored variables, since some boards put BSS in DRAM, which may not
have been initialised yet.
Explicitly mark those
With a recent bunch of SD3.0 cards in our A20-based board we
experienced data transfer rates of about 250 KiB/s instead of 10 MiB/s
with previous cards from the same vendor (both 4 GB/class 10). By
increasing status register polling rate from 1 kHz to 1 MHz we were
able to reach the original transf
On Thu, Jul 07, 2016 at 03:45:47PM -0600, Simon Glass wrote:
> Hi Tom,
>
> A little fix.
>
> The following changes since commit e8009beff6d5c55c1bf1ae8184791f167e6378b0:
>
> Merge git://git.denx.de/u-boot-arc (2016-07-04 11:46:21 -0400)
>
> are available in the git repository at:
>
> git:
On Fri, Jul 08, 2016 at 03:18:35PM +0100, Andre Przywara wrote:
> As printf calls may be executed quite early, we should avoid using any
> BSS stored variables, since some boards put BSS in DRAM, which may not
> have been initialised yet.
> Explicitly mark those "static global" variables as belong
On Wed, Jul 06, 2016 at 09:04:08AM -0600, Stephen Warren wrote:
> From: Stephen Warren
>
> Some CONFIG_ variables were recently renamed, but test/py wasn't updated
> to match. This causes some tests to be skipped. Fix test/py so the tests
> are run.
>
> Fixes: 11636258981a ("Rename reset to sys
Signed-off-by: Max Filippov
---
arch/xtensa/include/asm/arch-de212/core.h| 594 +++
arch/xtensa/include/asm/arch-de212/tie-asm.h | 170
arch/xtensa/include/asm/arch-de212/tie.h | 136 ++
3 files changed, 900 insertions(+)
create mode 100644 arch/xtens
From: Chris Zankel
Signed-off-by: Chris Zankel
Signed-off-by: Max Filippov
---
arch/xtensa/include/asm/arch-dc232b/core.h| 422 ++
arch/xtensa/include/asm/arch-dc232b/tie-asm.h | 120
arch/xtensa/include/asm/arch-dc232b/tie.h | 129
3 files cha
From: Chris Zankel
The 'ethoc' device could also be configured to have a private memory
region instead of having access to the main memory. In that case,
the packets must be copied into (transmit) or out of (receive) that
memory.
This behavior is configured by defining CONFIG_SYS_ETHOC_BUFFER_AD
From: Chris Zankel
The 'xtfpga' board is actually a set of FPGA evaluation boards that
can be configured to run an Xtensa processor.
- Avnet Xilinx LX60
- Avnet Xilinx LX110
- Avnet Xilinx LX200
- Xilinx ML605
- Xilinx KC705
These boards share the same components (open-ethernet, ns16550 se
Signed-off-by: Max Filippov
---
arch/xtensa/include/asm/arch-dc233c/core.h| 475 ++
arch/xtensa/include/asm/arch-dc233c/tie-asm.h | 193 +++
arch/xtensa/include/asm/arch-dc233c/tie.h | 150
3 files changed, 818 insertions(+)
create mode 100644 arc
Introduce MDIO communication routines. Scan MDIO bus at reset to find
attached PHYs and see if they support gigabit speeds. If they do check
their gigabit control register: if gigabit autonegotiation is enabled
clear it and reset the PHY.
This allows using OpenCores 10/100 MAC with gigabit PHY con
From: Chris Zankel
The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.
This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.
Signed-off-by: Chris Zankel
From: Chris Zankel
The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Cadence.
This is the first part of the basic architecture port with changes to
common files. The 'arch/xtensa' directory, and boards and additional
drivers
Hi Tom,
this series adds U-Boot port to Xtensa, configurable processor architecture
from Tensilica, Inc., now Cadence Design Systems Inc.
Two patches add proper xtensa bits: changes to shares files and contents
of arch/xtensa. Next three patches add three sample xtensa CPU
configurations: one wit
On Fri, Jul 08, 2016 at 03:25:23PM +0100, Andre Przywara wrote:
> Since we lack information about the DRAM initialization for the
> Allwinner A64 SoC, booting any A64 based board like the Pine64 is a bit
> involved at the moment.
> Add a README file to explain the process.
>
> Signed-off-by: Andr
On Thu, Jul 07, 2016 at 12:27:53PM -0600, Stephen Warren wrote:
> On 07/03/2016 03:14 PM, Simon Glass wrote:
> >This makes a few minor improvements to buildman to make it work more easiler
> >for first-time users:
> >
> >- Improve progress and warning messages when fetching toolchains
> >- Fix a bu
On Sun, Jul 03, 2016 at 03:14:27PM -0600, Simon Glass wrote:
> It is confusing to mention MAKEALL when it is not the normal way of building
> U-Boot anymore. Update the documentation to suit.
>
> Signed-off-by: Simon Glass
Reviewed-by: Tom Rini
--
Tom
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On Sun, Jul 03, 2016 at 03:14:26PM -0600, Simon Glass wrote:
> Buildman has been around for 3 years now. It has had a lot of use and
> testing. Perhaps it is time to remove MAKEALL.
>
> Signed-off-by: Simon Glass
Reviewed-by: Tom Rini
--
Tom
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___
On Sun, Jul 03, 2016 at 03:14:16PM -0600, Simon Glass wrote:
> This makes a few minor improvements to buildman to make it work more easiler
> for first-time users:
>
> - Improve progress and warning messages when fetching toolchains
> - Fix a bug where toolchain paths can be overwritten when fetc
On Sun, Jul 03, 2016 at 03:14:21PM -0600, Simon Glass wrote:
> Use colour to make it easier to see what is going on. Also print a message
> before downloading a new toolchain. Mention --fetch-arch in the message that
> is shown when there are no available toolchains, since this is the quickest
> w
On Sun, Jul 03, 2016 at 03:14:17PM -0600, Simon Glass wrote:
> Tidy up some problems found by a recent review.
>
> Signed-off-by: Simon Glass
Reviewed-by: Tom Rini
--
Tom
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On Thu, Jul 07, 2016 at 12:23:37PM -0600, Stephen Warren wrote:
> On 07/03/2016 03:14 PM, Simon Glass wrote:
> >For those who just want to build a board, it is useful to see a quick hint
> >right at the start of the documentation. Add a few commands showing how to
> >download toolchains and build a
On Sun, Jul 03, 2016 at 03:14:24PM -0600, Simon Glass wrote:
> The current code for setting up the toolchain config always writes the new
> paths to an item called 'toolchain'. This means that it will overwrite any
> existing toolchain item with the same name. In practice, this means that:
>
>
As printf calls may be executed quite early, we should avoid using any
BSS stored variables, since some boards put BSS in DRAM, which may not
have been initialised yet.
Explicitly mark those "static global" variables as belonging to the
.data section, to keep tiny-printf clear of any BSS usage.
Si
Since we lack information about the DRAM initialization for the
Allwinner A64 SoC, booting any A64 based board like the Pine64 is a bit
involved at the moment.
Add a README file to explain the process.
Signed-off-by: Andre Przywara
---
Hi,
is there any chance we can stuff this README still into
On Fri, 8 Jul 2016, Wolfgang Denk wrote:
> Dear Robert,
>
> In message you
> wrote:
> >
> > yup, i just went through most of the above, and built a
> > *cpio.gz.u-boot format ramdisk, and it works just fine, so i'm happy.
> > onward ...
>
> For now this is OK, but you might consider switching
On Sun, Jun 26, 2016 at 10:43:55PM +0200, Mateusz Kulikowski wrote:
> MMC core expects (now) valid mmc->dev pointer.
> During conversion in commit cffe5d86 not every driver was updated.
>
> This patch fixes crash while accessing MMC on
> boards using Qualcomm SDHCI controller.
>
> Signed-off-by:
Hi Bin,
On 08.07.2016 12:34, Bin Meng wrote:
> On Fri, Jul 8, 2016 at 6:13 PM, Stefan Roese wrote:
>> Hi Bin,
>>
>> On 08.07.2016 11:22, Bin Meng wrote:
>>> On Fri, Jul 8, 2016 at 4:44 PM, Stefan Roese wrote:
Hi Bin,
On 08.07.2016 04:27, Bin Meng wrote:
> On Thu, Jul 7, 2016 a
On Tue, May 24, 2016 at 2:59 PM, Tim Harvey wrote:
> The CONFIG_HIDE_LOGO_VERSION config can be used to disable putting the
> U-Boot version string on top of the logo.
>
> Signed-off-by: Tim Harvey
> ---
> README | 3 +++
> drivers/video/cfb_console.c | 4 +++-
> 2 files cha
Dear Robert,
In message you wrote:
>
> yup, i just went through most of the above, and built a
> *cpio.gz.u-boot format ramdisk, and it works just fine, so i'm happy.
> onward ...
For now this is OK, but you might consider switching to FIT images
instead. These may look more complicated init
On Fri, 8 Jul 2016, Wolfgang Denk wrote:
> Dear Robert,
>
> In message you
> wrote:
> >
> > ok, and one last (admittedly a bit off-topic) followup ...
> > openembedded supplies a class, image_types_uboot.bbclass, that can
> > generate a pile of u-boot related images:
> >
> > IMAGE_TYPES += "ex
Hello,
On 30 June 2016 at 19:13, Robert Nelson wrote:
> On Wed, Jun 29, 2016 at 5:30 AM, Michal Suchanek wrote:
>> Hello,
>>
>> On 29 June 2016 at 10:45, Karsten Merker wrote:
>>> On Wed, Jun 29, 2016 at 09:30:33AM +0200, Michal Suchanek wrote:
>>>
I tried loading system with recent u-boot
Dear Robert,
In message you wrote:
>
> ok, and one last (admittedly a bit off-topic) followup ...
> openembedded supplies a class, image_types_uboot.bbclass, that can
> generate a pile of u-boot related images:
>
> IMAGE_TYPES += "ext2.u-boot ext2.gz.u-boot ext2.bz2.u-boot
>ext2.lzma.u-bo
Hi Masahiro,
On 07/08/2016 07:58 PM, Masahiro Yamada wrote:
> The current timeout detection logic is not very nice; it calls
> get_timer(start) in the while() loop, and then calls it again after
> the loop to check if a timeout error happened.
>
> Because of the time difference between the two ca
The current timeout detection logic is not very nice; it calls
get_timer(start) in the while() loop, and then calls it again after
the loop to check if a timeout error happened.
Because of the time difference between the two calls of get_time(),
the reason detected after the loop may not be really
Hi Stefan,
On Fri, Jul 8, 2016 at 6:13 PM, Stefan Roese wrote:
> Hi Bin,
>
> On 08.07.2016 11:22, Bin Meng wrote:
>> On Fri, Jul 8, 2016 at 4:44 PM, Stefan Roese wrote:
>>> Hi Bin,
>>>
>>> On 08.07.2016 04:27, Bin Meng wrote:
On Thu, Jul 7, 2016 at 11:52 PM, Stefan Roese wrote:
> Hi!
>
Hi Bin,
On 08.07.2016 11:22, Bin Meng wrote:
> On Fri, Jul 8, 2016 at 4:44 PM, Stefan Roese wrote:
>> Hi Bin,
>>
>> On 08.07.2016 04:27, Bin Meng wrote:
>>> On Thu, Jul 7, 2016 at 11:52 PM, Stefan Roese wrote:
Hi!
I do have BayTrail / FSP related question. I'm currently trying
>>>
Hi Stefan,
On Fri, Jul 8, 2016 at 4:44 PM, Stefan Roese wrote:
> Hi Bin,
>
> On 08.07.2016 04:27, Bin Meng wrote:
>> On Thu, Jul 7, 2016 at 11:52 PM, Stefan Roese wrote:
>>> Hi!
>>>
>>> I do have BayTrail / FSP related question. I'm currently trying
>>> to use a DFI QSeven SoM which has one x4 P
On Fri, 8 Jul 2016, Wolfgang Denk wrote:
> Dear Robert,
>
> In message you
> wrote:
> >
> > using yocto project to build artifacts to tftp down to a board for
> > "bootm" command -- what are the valid formats for the "initrd" object
> > that can be recognized by "bootm"? since YP can generate
Hi Bin,
On 08.07.2016 04:27, Bin Meng wrote:
> On Thu, Jul 7, 2016 at 11:52 PM, Stefan Roese wrote:
>> Hi!
>>
>> I do have BayTrail / FSP related question. I'm currently trying
>> to use a DFI QSeven SoM which has one x4 PCIe slot instead
>> of the usual 4 x1 slots. So all 4 PCIe lanes are used b
Dear Vinoth,
In message
you wrote:
>
> Where can I check the heap configuration in U-Boot??
The REAME says:
- CONFIG_SYS_MALLOC_LEN:
Size of DRAM reserved for malloc() use.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, Managing Direct
Dear Robert,
In message you wrote:
>
> using yocto project to build artifacts to tftp down to a board for
> "bootm" command -- what are the valid formats for the "initrd" object
> that can be recognized by "bootm"? since YP can generate a *ton* of
> different image types. thanks.
"bootm" unde
Hi Tobias,
On 07/05/2016 05:31 PM, Tobias Doerffel wrote:
> With a recent bunch of SD3.0 cards in our A20-based board we
> experienced data transfer rates of about 250 KiB/s instead of 10 MiB/s
> with previous cards from the same vendor (both 4 GB/class 10). By
> increasing status register polling
On Fri, Jul 1, 2016 at 6:40 PM, Simon Glass wrote:
> Hi,
>
> On 1 July 2016 at 00:13, vinoth eswaran wrote:
> > Hello,
> >
> > I am working on an embedded project using Minnowboard Max with U-boot
> > and customised Linux kernel.
> >
> > To optimize boot time, currently I am comparing the diffe
using yocto project to build artifacts to tftp down to a board for
"bootm" command -- what are the valid formats for the "initrd" object
that can be recognized by "bootm"? since YP can generate a *ton* of
different image types. thanks.
rday
--
From: Toshifumi NISHINAGA
This change is to remove a halt at about 200KiB
while sending a large(1MiB) binary to a micro controller using USART1.
USART1 is connected to a PC via an on-board ST-Link debugger
that also functions as a USB-Serial converter.
However, it seems to loss some data occasion
From: Toshifumi NISHINAGA
This patch adds SDRAM support for stm32f746 discovery board.
This patch depends on previous patch.
This patch is based on STM32F4 and emcraft's[1].
[1]: https://github.com/EmcraftSystems/u-boot
Signed-off-by: Toshifumi NISHINAGA
---
arch/arm/cpu/armv7m/config.mk
Hi All!
I have stumbled upon the lack of support for storage devices in API's
ub_dev_write()/API_dev_write() functions. Currently the function
supports only the network devices.
I have implemented the support for the storage by adapting the code
from API_dev_read() function, and added the ub_dev_
From: Toshifumi NISHINAGA
This patch adds 200MHz clock configuration for stm32f746 discovery board.
This patch is based on STM32F4 and emcraft's[1].
[1]: https://github.com/EmcraftSystems/u-boot
Signed-off-by: Toshifumi NISHINAGA
---
arch/arm/include/asm/arch-stm32f7/stm32.h | 46 ++
ar
From: Toshifumi NISHINAGA
This patch adds SDRAM support to boot Linux kernel
for stm32f746 discovery board.
Toshifumi NISHINAGA (3):
stm32: clk: Add 200MHz clock configuration for stm32f746 discovery
board
stm32: Add SDRAM support for stm32f746 discovery board
stm32: Change USART port
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