This patch is doing the following:
1. Implementing the errata for LS2080.
2. Adding fixup for fdt for LS2080.
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
---
Changes in v2:
- Reworked for changes done in errata checking code.
.../include/asm/arch-fsl-layerscape/immap_lsch3.h |
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
---
Changes in v2:
- No update
arch/arm/cpu/armv8/fsl-layerscape/cpu.c| 7 +++
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 2 ++
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 3 +++
arch/arm/in
Performs code cleanup for device tree fixup for fsl usb controllers by
making functions to handle these similar errata checking code.
Signed-off-by: Rajesh Bhagat
Signed-off-by: Sriram Dash
---
Changes in v2:
- added patch description
- remove the MACRO and use fdt_fixup_erratum function ins
The patch-set does the following :
1. Adds support for ARM for USB Erratum Checking code for implementing the
USB Erratum for fsl.
2. Performs code cleanup to reduce redundancy when adding fsl device
tree fixup.
3. Implements Erratum A008751 for LS2 platform.
Sriram Dash (5):
arm64: fsl-layers
This patch does the following things:
1. Makes the errata checking code common for PPC and ARM
2. Moves all the static inline functions into a dedicated C file
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
---
Changes in v2:
- Moves all the static inline functions into a dedicated C
As part of Chain of Trust for Secure boot, the SPL U-Boot will validate
the next level U-boot image. Add a new function spl_validate_uboot to
perform the validation.
Enable hardware crypto operations in SPL using SEC block.
In case of Secure Boot, PAMU is not bypassed. For allowing SEC block
acces
For mpc85xx SoCs, the core begins execution from address 0xFFFC.
In non-secure boot scenario from NAND, this address will map to CPC
configured as SRAM. But in case of secure boot, this default address
always maps to IBR (Internal Boot ROM).
The IBR code requires that the bootloader(U-boot) mus
On 2.6.2016 07:42, Stefan Roese wrote:
> Hi Michal,
>
> On 02.06.2016 07:31, Michal Simek wrote:
>> On 1.6.2016 18:22, Nathan Rossi wrote:
>>> Commit a058052c "net: phy: do not read configuration register on reset",
>>> changes the behaviour of the phy_reset function such that the state of
>>> the
Hi Michal,
On 02.06.2016 07:31, Michal Simek wrote:
On 1.6.2016 18:22, Nathan Rossi wrote:
Commit a058052c "net: phy: do not read configuration register on reset",
changes the behaviour of the phy_reset function such that the state of
the BMCR register is not preserved during reset.
Reorder th
Hi Nathan,
On 1.6.2016 18:22, Nathan Rossi wrote:
> Commit a058052c "net: phy: do not read configuration register on reset",
> changes the behaviour of the phy_reset function such that the state of
> the BMCR register is not preserved during reset.
>
> Reorder the phy_reset and genphy_config_aneg
> -Original Message-
> From: Teddy Reed [mailto:teddy.r...@gmail.com]
> Sent: Tuesday, May 31, 2016 2:23 AM
> To: Sumit Garg
> Cc: s...@chromium.org; dannenb...@ti.com; u-boot@lists.denx.de; Ruchika
> Gupta ; Aneesh Bansal
> Subject: Re: [PATCH] verified-boot: Minimal support for booting
Hello Scott,
Am 02.06.2016 um 02:09 schrieb Scott Wood:
On Tue, 2016-05-31 at 14:08 +0200, Heiko Schocher wrote:
@@ -59,6 +64,9 @@ int nand_register(int devnum, struct mtd_info *mtd)
* via the mtdcore infrastructure (e.g. ubi).
*/
add_mtd_device(mtd);
+#ifdef CONFIG_MT
Implements the logic to calculate the optimal usb maximum trasfer blocks
instead of sending USB_MAX_XFER_BLK blocks which is 65535 and 20 in case
of EHCI and other USB protocols respectively.
It defines USB_MIN_XFER_BLK/USB_MAX_XFER_BLK trasfer blocks that should
be checked for success starting fr
Signed-off-by: Peter Howard
---
arch/arm/include/asm/ti-common/davinci_nand.h | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/arm/include/asm/ti-common/davinci_nand.h b/arch/arm/include/as
m/ti-common/davinci_nand.h
index 11407be..f343ac2 100644
--- a/arch/arm/
> -Original Message-
> From: Marek Vasut [mailto:ma...@denx.de]
> Sent: Thursday, June 02, 2016 1:38 AM
> To: Rajesh Bhagat ; u-boot@lists.denx.de
> Cc: york sun ; Sriram Dash
> Subject: Re: [PATCH] drivers: usb: fsl: Fix NULL terminating issue for usb
> controller
> name string
>
> On
On Tue, 2016-05-31 at 14:08 +0200, Heiko Schocher wrote:
> @@ -59,6 +64,9 @@ int nand_register(int devnum, struct mtd_info *mtd)
>* via the mtdcore infrastructure (e.g. ubi).
>*/
> add_mtd_device(mtd);
> +#ifdef CONFIG_MTD_CONCAT
> + nand_devices_found++;
> +#endif
> #end
Hi!
There's one more "funny" thing I see with SPI: SPL fails to boot if I
let it do full probing, or if I allow it to do reads in big chunks
(that may be explained by watchdog, I'll investigate it some more).
This makes SPL work for me, but I guess I'd like to understand why.
Ideas welcome.
Bes
When the CONFIG_BOOTP_SERVERIP option is set, we ignore all
dhcp values for the tftp server and use our own serverip and
file name instead.
This is usually not what we want and I doubt it's set for a
good reason on ZynqMP. It definitely hurts if we want to support
uEFI PXE boot on it. So just remo
On 06/01/2016 11:14 AM, Sylvain Lesne wrote:
> Before this patch, when booting from MMC (no filesystem), the SPL
> loaded U-Boot from a fixed offset.
> It will now load U-Boot from an offset of 256kB (which is 4 times the
> padded SPL image) in the third partition.
>
> This behaviour is similar to
On 06/01/2016 01:24 PM, Stefan Roese wrote:
> Somehow the sr1500 is missing this comma in the CONFIG_BOOTARGS
> definition. This patch adds it to.
>
> Signed-off-by: Stefan Roese
> Reported-by: Pavel Machek
> Cc: Pavel Machek
> Cc: Marek Vasut
Applied, thanks!
> ---
> include/configs/socfpg
On 06/01/2016 04:55 PM, Rajesh Bhagat wrote:
>
>
>> -Original Message-
>> From: Marek Vasut [mailto:ma...@denx.de]
>> Sent: Wednesday, June 01, 2016 6:51 PM
>> To: Rajesh Bhagat ; u-boot@lists.denx.de
>> Cc: york sun ; Sriram Dash
>> Subject: Re: [PATCH] drivers: usb: fsl: Fix NULL termi
Fixes:
=> ext2ls scsi 0:1
** Bad device scsi 0:1 **
for boards which use the scsi legacy driver (such as ls1043ardb).
Signed-off-by: Ed Swarthout
---
This looks like a typeo from 11f610edf01abc96ca10e82e1752648ee911705b
common/scsi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
On 04/26/2016 04:05 PM, Joe Hershberger wrote:
On Tue, Apr 26, 2016 at 4:29 PM, Stephen Warren wrote:
From: Stephen Warren
The rtl8169 driver uses a global variable to store the register address
of the adapter being operated upon. This is updated to point at the
correct adapter when sending o
The Parallella is a single board computer showcasing the Epiphany
multi-core processor from Adapteva. The board uses a Zynq-7000 SoC which
interconnects to the Epiphany. This patch adds support for booting on
the Zynq system of the board.
More information on this board is available at: https://par
Commit a058052c "net: phy: do not read configuration register on reset",
changes the behaviour of the phy_reset function such that the state of
the BMCR register is not preserved during reset.
Reorder the phy_reset and genphy_config_aneg calls for some of the
marvell phy drivers so that auto-negot
On 05/31/2016 10:12 PM, Shengzhou Liu wrote:
>> -Original Message-
>> From: York Sun [mailto:york@nxp.com]
>> Sent: Wednesday, June 01, 2016 12:04 AM
>> To: Shengzhou Liu ; u-boot@lists.denx.de
>> Shengzhou,
>>
>> If you have to use an odd number for clk_adj, we can go ahead to merge
>>
On Wed, Jun 01, 2016 at 02:34:41PM +0200, Daniel Schwierzeck wrote:
> Hi Tom,
>
> Am 01.06.2016 um 00:55 schrieb Tom Rini:
> > On Wed, Jun 01, 2016 at 12:00:02AM +0200, Marek Vasut wrote:
> >
> >> This fixes the last remaining libgcc warning, where the symbol was
> >> defined twice.
> >>
> >> Sig
> -Original Message-
> From: Marek Vasut [mailto:ma...@denx.de]
> Sent: Wednesday, June 01, 2016 6:51 PM
> To: Rajesh Bhagat ; u-boot@lists.denx.de
> Cc: york sun ; Sriram Dash
> Subject: Re: [PATCH] drivers: usb: fsl: Fix NULL terminating issue for usb
> controller
> name string
>
> O
On 01.06.16 16:21, Michal Simek wrote:
> On 1.6.2016 16:16, Alexander Graf wrote:
>>
>>
>> On 31.05.16 09:40, Michal Simek wrote:
>>> On 31.5.2016 08:39, Alexander Graf wrote:
> Am 31.05.2016 um 07:04 schrieb Michal Simek :
>
>> On 30.5.2016 21:36, Alexander Graf wrote:
On 01.06.16 16:20, Michal Simek wrote:
> On 1.6.2016 16:12, Alexander Graf wrote:
>>
>>
>> On 01.06.16 15:08, Michal Simek wrote:
>>> Nand and QSPI are not defined now but this will be extended.
>>> Based on selected bootmode boot_targets are rewritten.
>>> Patch also contains detection if variab
On 1.6.2016 16:16, Alexander Graf wrote:
>
>
> On 31.05.16 09:40, Michal Simek wrote:
>> On 31.5.2016 08:39, Alexander Graf wrote:
>>>
>>>
Am 31.05.2016 um 07:04 schrieb Michal Simek :
> On 30.5.2016 21:36, Alexander Graf wrote:
>
>
>> On 05/30/2016 04:11 PM, Michal Sime
On 1.6.2016 16:12, Alexander Graf wrote:
>
>
> On 01.06.16 15:08, Michal Simek wrote:
>> Nand and QSPI are not defined now but this will be extended.
>> Based on selected bootmode boot_targets are rewritten.
>> Patch also contains detection if variables are saved. If yes don't
>> rewrite boot_tar
On 01.06.16 15:08, Michal Simek wrote:
> Nand and QSPI are not defined now but this will be extended.
> Based on selected bootmode boot_targets are rewritten.
> Patch also contains detection if variables are saved. If yes don't
> rewrite boot_targets variable.
>
> Also move variable setup to the
On 31.05.16 09:40, Michal Simek wrote:
> On 31.5.2016 08:39, Alexander Graf wrote:
>>
>>
>>> Am 31.05.2016 um 07:04 schrieb Michal Simek :
>>>
On 30.5.2016 21:36, Alexander Graf wrote:
> On 05/30/2016 04:11 PM, Michal Simek wrote:
> Setup flag when default environment are u
On 06/01/2016 03:35 PM, Pavel Machek wrote:
> This adds support for IS1 board.
Detailed description of the board would help.
> Signed-off-by: Pavel Machek
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 92c7545..a397c69 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/ar
On 05/04/2016 04:49 PM, Vignesh R wrote:
>
> This series converts davinci_spi driver to adapt to driver model
> framework. And enables the driver on k2l, k2e, k2hk evms. Also,
> added support for davinci_spi on k2g evm.
>
> Tested on k2l, k2e, k2hk and k2g evms.
>
> Rebased on top of v2016.05-
This adds support for IS1 board.
Signed-off-by: Pavel Machek
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 92c7545..a397c69 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -102,6 +102,7 @@ dtb-$(CONFIG_THUNDERX) += thunderx-88xx.dtb
dtb-$(CONFIG_ARCH_SOCFP
Hi,
On Wed, Jun 01, 2016 at 03:35:07PM +0300, Siarhei Siamashka wrote:
> On Wed, 1 Jun 2016 13:23:24 +0200
> Boris Brezillon wrote:
>
> > NAND chips are supposed to expose their capabilities through advanced
> > mechanisms like READID, ONFI or JEDEC parameter tables. While those
> > methods are
On Wed, 1 Jun 2016 15:35:07 +0300
Siarhei Siamashka wrote:
> On Wed, 1 Jun 2016 13:23:24 +0200
> Boris Brezillon wrote:
>
> > NAND chips are supposed to expose their capabilities through advanced
> > mechanisms like READID, ONFI or JEDEC parameter tables. While those
> > methods are appropriat
On 06/01/2016 01:17 PM, Rajesh Bhagat wrote:
> Fixes NULL terminating issue for usb controller name string and
> performs code cleanup for intializing variables current_usb_controller
> and usb_phy.
>
> Signed-off-by: Rajesh Bhagat
> ---
> drivers/usb/host/ehci-fsl.c | 10 --
> 1 files
Nand and QSPI are not defined now but this will be extended.
Based on selected bootmode boot_targets are rewritten.
Patch also contains detection if variables are saved. If yes don't
rewrite boot_targets variable.
Also move variable setup to the end of file because SCSI needs to be
defined before
Simplify zcu102 board file by moving CONFIG_AHCI enabling to common
file.
Signed-off-by: Michal Simek
---
include/configs/xilinx_zynqmp.h| 3 ++-
include/configs/xilinx_zynqmp_zcu102.h | 1 -
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/configs/xilinx_zynqmp.h
On Wed, 1 Jun 2016 13:23:24 +0200
Boris Brezillon wrote:
> NAND chips are supposed to expose their capabilities through advanced
> mechanisms like READID, ONFI or JEDEC parameter tables. While those
> methods are appropriate for the bootloader itself, it's way to
> complicated and takes too much
Hi Tom,
Am 01.06.2016 um 00:55 schrieb Tom Rini:
> On Wed, Jun 01, 2016 at 12:00:02AM +0200, Marek Vasut wrote:
>
>> This fixes the last remaining libgcc warning, where the symbol was
>> defined twice.
>>
>> Signed-off-by: Marek Vasut
>> Cc: Simon Glass
>> Cc: Tom Rini
>
> Reviewed-by: Tom Ri
Fixes NULL terminating issue for usb controller name string and
performs code cleanup for intializing variables current_usb_controller
and usb_phy.
Signed-off-by: Rajesh Bhagat
---
drivers/usb/host/ehci-fsl.c | 10 --
1 files changed, 4 insertions(+), 6 deletions(-)
diff --git a/drive
Somehow the sr1500 is missing this comma in the CONFIG_BOOTARGS
definition. This patch adds it to.
Signed-off-by: Stefan Roese
Reported-by: Pavel Machek
Cc: Pavel Machek
Cc: Marek Vasut
---
include/configs/socfpga_sr1500.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/in
NAND chips are supposed to expose their capabilities through advanced
mechanisms like READID, ONFI or JEDEC parameter tables. While those
methods are appropriate for the bootloader itself, it's way to
complicated and takes too much space to fit in the SPL.
Replace those mechanisms by a dumb 'trial
Split the 'load page' and 'read page' logic in 2 different functions so
we can later load the page and test different ECC configs without the
penalty of reloading the same page in the NAND cache.
We also move common setup to a dedicated function (nand_apply_config()) to
avoid rewriting the same va
check_value_xxx() helpers are using a 1ms delay between each test, which
can be quite long for some operations (like a page read on an SLC NAND).
Since we don't have anything to do but to poll this register, reduce the
delay between each test to 1us.
While we're at it, rename the max_number_of_ret
The SYS_NAND_U_BOOT_OFFS is quite generic, but the Kconfig entry is forced
to explicitly depend on platforms that are not already defining it in their
include/configs/.h header.
Rename this Kconfig option into SPL_NAND_U_BOOT_OFFS, remove the dependency
on NAND_SUNXI and make it dependent on SPL s
Use CONFIG_SPL_NAND_U_BOOT_OFFS_REDUND value instead of trying to guess
where the redundant u-boot image is based on simple (and most of the time
erroneous) heuristics.
Signed-off-by: Boris Brezillon
Acked-by: Hans de Goede
---
drivers/mtd/nand/sunxi_nand_spl.c | 20
1 file
On modern NAND it's more than recommended to have a backup copy of the
u-boot binary to recover from corruption: bitflips are quite common on
MLC NANDs, and the read-disturbance will corrupt your u-boot partitition
more quickly than what you would see on an SLC NAND.
Add an extra Kconfig option to
The sunxi SPL NAND controller driver supports use 'BootROM'-like configs,
that is, configs where the ECC bytes and real data are interleaved in the
page instead of putting ECC bytes in the OOB area.
Doing that has several drawbacks:
- since you're interleaving data and ECC bytes you can't use the
Hello,
This patch series aims at adding support for NAND auto-detection to
the sunxi SPL NAND driver.
As explained in patch 7, this auto-detection is nothing more than a
dumb "trial and error" logic, but it allows one to use the same
SPL binary for all kind of sunxi boards booting from NAND.
Of c
Hi!
It seems include/configs/socfpga_sr1500.h is missing a ","...
-#define CONFIG_BOOTARGS "console=ttyS0" __stringify(CONFIG_BAUDRATE)
+#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
Best regards,
> -Original Message-
> From: Felipe Balbi [mailto:felipe.ba...@linux.intel.com]
> Sent: Wednesday, June 01, 2016 12:07 PM
> To: Rajesh Bhagat ; Marek Vasut ;
> Rajat Srivastava ; u-boot@lists.denx.de
> Cc: l.majew...@samsung.com; s...@chromium.org; albert.u.b...@aribaud.net;
> prabha...@f
On Wed, Jun 01, 2016 at 10:28:31AM +0530, Lokesh Vutla wrote:
> When loading fit header, it should be loaded to a previous address
> aligned to ARCH_DMA_MINALIGN and not 8. Fixing the same.
>
> Signed-off-by: Lokesh Vutla
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: D
Hi,
Rajesh Bhagat writes:
>> Marek Vasut writes:
>> >> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index
>> >> 85cc96a..5eeb71d 100644
>> >> --- a/drivers/usb/dwc3/core.c
>> >> +++ b/drivers/usb/dwc3/core.c
>> >> @@ -690,6 +690,18 @@ int dwc3_uboot_init(struct dwc3_device *dw
DT binding documentation for atmel i2c driver.
Signed-off-by: Songjun Wu
---
Changes in v2:
- Add phandles to input clocks
doc/device-tree-bindings/i2c/i2c-at91.txt | 26 ++
1 file changed, 26 insertions(+)
create mode 100644 doc/device-tree-bindings/i2c/i2c-at91.txt
Add i2c driver.
Signed-off-by: Songjun Wu
---
Changes in v2:
- Add code to get and enable clock.
drivers/i2c/Kconfig| 10 ++
drivers/i2c/Makefile | 1 +
drivers/i2c/at91_i2c.c | 345 +
drivers/i2c/at91_i2c.h | 77 +++
4 files ch
The i2c driver includes two parts.
1) Driver code to implement the i2c function.
2) Device tree binding documentation, it describes how to add
the i2c in device tree.
Changes in v2:
- Add code to get and enable clock.
- Add phandles to input clocks
Songjun Wu (2):
i2c: atmel: add i2c driver
> -Original Message-
> From: Marek Vasut [mailto:ma...@denx.de]
> Sent: Tuesday, May 31, 2016 5:27 PM
> To: Rajesh Bhagat ; u-boot@lists.denx.de
> Cc: s...@chromium.org; york sun ; Sriram Dash
>
> Subject: Re: [PATCH 1/2] common: usb_storage : Implement logic to calculate
> optimal usb m
> -Original Message-
> From: Felipe Balbi [mailto:felipe.ba...@linux.intel.com]
> Sent: Tuesday, May 31, 2016 5:40 PM
> To: Marek Vasut ; Rajat Srivastava ;
> u-boot@lists.denx.de
> Cc: l.majew...@samsung.com; s...@chromium.org; albert.u.b...@aribaud.net;
> prabha...@freescale.com; york s
> -Original Message-
> From: Lukasz Majewski [mailto:l.majew...@samsung.com]
> Sent: Tuesday, May 31, 2016 8:22 PM
> To: Rajat Srivastava
> Cc: u-boot@lists.denx.de; s...@chromium.org; ma...@denx.de;
> albert.u.b...@aribaud.net; prabha...@freescale.com; york sun
> ; Mingkai Hu ; Rajesh B
On Fri, 20 May 2016 15:55:51 +0200
Boris Brezillon wrote:
> NAND chips are supposed to expose their capabilities through advanced
> mechanisms like READID, ONFI or JEDEC parameter tables. While those
> methods are appropriate for the bootloader itself, it's way to
> complicated and takes too much
On Tue, 31 May 2016, Masahiro Yamada wrote:
... lengthy explanation snipped ...
thanks for that explanation; clearly, i had no idea what i was getting
into here and, again, i apologize for submitting a patch that was not
even remotely close to correct.
le *sigh*.
rday
--
Before this patch, when booting from MMC (no filesystem), the SPL
loaded U-Boot from a fixed offset.
It will now load U-Boot from an offset of 256kB (which is 4 times the
padded SPL image) in the third partition.
This behaviour is similar to what the vendor SPL (based on
U-Boot 2013.01) does, and
Hi Eran,
On Mon, May 30, 2016 at 07:07:17PM +0300, Eran Matityahu wrote:
[...]
> diff --git a/include/splash.h b/include/splash.h
> index f0755ca..617b514 100644
> --- a/include/splash.h
> +++ b/include/splash.h
> @@ -1,22 +1,7 @@
> /*
> * Copyright (C) 2013, Boundary Devices
> *
> - * See
Enable support for RAM based FIT images read by SPL.
Empty function for now to keep compiler happy.
Signed-off-by: Michal Simek
---
configs/xilinx_zynqmp_ep_defconfig | 1 +
configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 1 +
configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig |
On Fri, May 20, 2016 at 06:05:56PM -0700, Steve Rae wrote:
> - update fastboot_okay() and fastboot_fail()
>
> This file originally came from upstream code.
>
> While retaining the storage abstraction feature, this is the second
> set of the changes required to resync with the
> cmd_flash_mmc_sp
Hi,
On 05/31/2016 11:12 PM, Marek Vasut wrote:
> Add a simple version of this function for SPL. It does not check the buffer
> size as this would add to the code size.
>
> Signed-off-by: Marek Vasut
> Cc: Simon Glass
> Cc: Stefan Roese
> Cc: Tom Rini
> Cc: le...@alse-fr.com
This is how I wou
Hi Steve,
On Fri, May 20, 2016 at 06:05:55PM -0700, Steve Rae wrote:
> This file originally came from upstream code.
Which upstream?
> While retaining the storage abstraction feature, this is the first
> set of the changes required to resync with the
> cmd_flash_mmc_sparse_img()
> in the file
72 matches
Mail list logo
