Hi all,
Excuse my question if it was solved somewhere in forum, but I didn't
found an answer yet (maybe I can't find the right keywords).
I am building the uboot with yocto for imx6 board. I have started with
some freescale defaults,
edited environment for my needs, saved environment etc ...
Hello U-Boot Crew,
i want to boot a little kernel on ARM Cortex a9.
But the kernel crushes pretty early with the following u-boot output:
## Starting application at 0x0100 ...
## Application terminated, rc = 0x1
Since i have no clue where (and how) to start debugging, my first
question
On 09/03/2015 08:18 AM, Lukasz Majewski wrote:
> Hi Lukasz,
>
>> Hi Tom,
>>
>>> On Thu, Sep 03, 2015 at 02:21:39PM +0200, Lukasz Majewski wrote:
>>>
It is very common that FAT code is using following pattern:
if (disk_{read|write}() < 0)
return -1;
Up till now the
From: Fabio Estevam
Add DFU support.
Tested by flashing SPL and u-boot.img into SPI NOR flash with the
following commands:
=> setenv dfu_alt_info ${dfu_alt_info_spl}
=> run dfuspi
On the host PC:
$ sudo dfu-util -D SPL -a spl
On the target:
CTRL+C
=> setenv dfu_alt_info ${dfu_alt_info_img}
From: Fabio Estevam
The dfu_alt_info_spl variable allows passing a starting point
for the binary to be flashed in the SPI NOR.
For example, if we have 'dfu_alt_info_spl=spl raw 0x400', this means
that we want to flash the binary starting at address 0x400.
In order to do so we need to erase the
Hi,
On Wed, 2015-09-23 at 11:13 +0800, Chin Liang See wrote:
>
> From: ma...@denx.de
> Sent: Thursday, September 10, 2015 7:52 PM
> To: Chin Liang See
> Cc: ZY - u-boot; Dinh Nguyen; Dinh Nguyen; ZY - sr; Vikas Manocha; Jagannadh
> Teki; ZY - pavel
> Subject: Re: [PATCH v3 1/5] spi: cadence_qsp
Some i.MXes use __NA_ or 0 to avoid setting mux_mode, but the following patch
only take i.MX6/7 into consideration.
"c3c8a5748897b24f18618047804317167a531dd3 imx-common: fix iomux settings"
Use is_soc_type(MXC_CPU_MX7) to avoid breaking other i.MXes when
setting mux_mode.
In this patch, switch t
Hi,
> From: ma...@denx.de
> Sent: Friday, September 11, 2015 8:45 AM
> To: Simon Glass
> Cc: Chin Liang See; ZY - u-boot; Dinh Nguyen; Dinh Nguyen; ZY - sr; Vikas
> Manocha; Jagannadh Teki; ZY - pavel
> Subject: Re: [PATCH v3 5/5] common: Enable fdt_support in SPL build
>
> On Friday, September
On Tue, 2015-09-22 at 17:01 -0500, dingu...@opensource.altera.com wrote:
> From: Dinh Nguyen
>
> commit "arm: socfpga: rename socfpga_cyclone5 and socfpga_arria5 config files"
> renames the configs files, so we should update the MAINTAINERS' entry. At
> the same time, update the email for Dinh Ng
On Tue, 2015-09-22 at 17:01 -0500, dingu...@opensource.altera.com wrote:
> From: Dinh Nguyen
>
> Rename the socfpga_cyclone5.h to socfpga_cyclone5_socdk.h, and
> socfpga_arria.h to socfpga_arria5_socdk.h. This matches the other SoCFPGA
> board config files.
>
> Suggested-by: Marek Vasut
> Signe
Hi Benoît,
On Tue, Sep 22, 2015 at 09:06:06PM +0200, Benoît Thébaudeau wrote:
>Hi Peng,
>
>On Mon, Sep 21, 2015 at 11:08 AM, Peng Fan wrote:
>> Some i.MXes use __NA_ or 0 to avoid setting mux_mode, but the following patch
>> only take i.MX6/7 into consideration.
>>
>> "c3c8a5748897b24f18618047804
Hi, here are some minor SoCFPGA fixes:
The following changes since commit 8a5f6129d1450f5ff92a55cfcfd7b96ee019e303:
pinctrl: move dm_scan_fdt_node() out of pinctrl uclass (2015-09-19 15:42:15
-0600)
are available in the git repository at:
git://git.denx.de/u-boot-socfpga.git
for you to f
On Wednesday, September 23, 2015 at 12:01:34 AM, dingu...@opensource.altera.com
wrote:
> From: Dinh Nguyen
>
> Enable the able to save the environment variables when SD/MMC is used.
>
> Signed-off-by: Dinh Nguyen
> ---
> v2: Move this option to be on a per-board basis
> Add config for socf
Hi Joe,
On Tue, Sep 22, 2015 at 11:23 PM, Joe Hershberger
wrote:
> Hi Bin,
>
> On Mon, Sep 21, 2015 at 10:44 PM, Bin Meng wrote:
>> Hi Joe,
>>
>> On Tue, Sep 15, 2015 at 10:46 AM, Bin Meng wrote:
>>> Hi Joe,
>>>
>>> On Sat, Sep 12, 2015 at 3:44 AM, Joe Hershberger
>>> wrote:
Hi Bin,
From: Stephen Warren
The size allocation for SPL is increased in all cases to match the
already-expanded value used on Tegra124. This is both for general
consistency, and because the seaboard build trips over the limit already
when using one of the ARM compilers packaged with 14.04. For the recor
From: Dinh Nguyen
commit "arm: socfpga: rename socfpga_cyclone5 and socfpga_arria5 config files"
renames the configs files, so we should update the MAINTAINERS' entry. At
the same time, update the email for Dinh Nguyen.
Signed-off-by: Dinh Nguyen
---
board/altera/arria5-socdk/MAINTAINERS | 4
From: Dinh Nguyen
Enable the able to save the environment variables when SD/MMC is used.
Signed-off-by: Dinh Nguyen
---
v2: Move this option to be on a per-board basis
Add config for socfpga_cyclone5 and socfpga_arria5
---
include/configs/socfpga_arria5_socdk.h | 4
include/configs/
From: Dinh Nguyen
Rename the socfpga_cyclone5.h to socfpga_cyclone5_socdk.h, and
socfpga_arria.h to socfpga_arria5_socdk.h. This matches the other SoCFPGA
board config files.
Suggested-by: Marek Vasut
Signed-off-by: Dinh Nguyen
---
arch/arm/mach-socfpga/Kconfig
On Tue, Sep 22, 2015 at 4:11 PM, Jagan Teki wrote:
> On 12 September 2015 at 19:27, Otavio Salvador
> wrote:
>> +static void spinor_protect(void)
>> +{
>> + struct spi_flash *spi;
>> +
>> + spi = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
>> +
Hi Fabio,
Le Tue, 22 Sep 2015 16:01:05 -0300, Fabio Estevam
a écrit :
> Hi,
>
> On a mx6q (armv7) board when I disable and enable the Data Cache the
> following issue is observed:
>
> => dcache
> Data (writethrough) Cache is ON
> => dcache off
> => dcache on
> data abort
> pc : [<4ff3d340>]
On 12 September 2015 at 19:27, Otavio Salvador wrote:
> The last 16 KiB of the SPI NOR contain some manufacturing information, which
> should not be erased/overwritten.
>
> Configure the protection bits BP2, BP1 and BP0 so that this region is
> protected.
>
> Signed-off-by: Otavio Salvador
> ---
Hi Peng,
On Mon, Sep 21, 2015 at 11:08 AM, Peng Fan wrote:
> Some i.MXes use __NA_ or 0 to avoid setting mux_mode, but the following patch
> only take i.MX6/7 into consideration.
>
> "c3c8a5748897b24f18618047804317167a531dd3 imx-common: fix iomux settings"
>
> Use is_soc_type(MXC_CPU_MX7) to avoi
Hi,
On a mx6q (armv7) board when I disable and enable the Data Cache the
following issue is observed:
=> dcache
Data (writethrough) Cache is ON
=> dcache off
=> dcache on
data abort
pc : [<4ff3d340>] lr : [<4ff3b598>]
reloc pc : [<17802340>]lr : [<17800598>]
sp : 4f538d50 ip : 0
Le mardi 22 septembre 2015 à 09:06 -0400, Tom Rini a écrit :
> On Sun, Sep 20, 2015 at 12:42:26PM +0200, Paul Kocialkowski wrote:
> > Hi,
> >
> > Le vendredi 04 septembre 2015 à 14:14 -0400, Tom Rini a écrit :
> > > On Thu, Aug 27, 2015 at 07:37:08PM +0200, Paul Kocialkowski wrote:
> > >
> > > >
On 09/22/2015 08:32 AM, Scott Wood wrote:
> On Tue, 2015-09-22 at 07:49 -0700, York Sun wrote:
>> On 09/21/2015 07:59 PM, Gong Qianyu-B52263 wrote:
>>>
-Original Message-
From: Sun York-R58495
Sent: Tuesday, September 22, 2015 1:27 AM
To: Gong Qianyu-B52263; u-boot@lis
On Tue, 2015-09-22 at 07:49 -0700, York Sun wrote:
> On 09/21/2015 07:59 PM, Gong Qianyu-B52263 wrote:
> >
> > > -Original Message-
> > > From: Sun York-R58495
> > > Sent: Tuesday, September 22, 2015 1:27 AM
> > > To: Gong Qianyu-B52263; u-boot@lists.denx.de
> > > Cc: Hu Mingkai-B21284; Su
Hi Bin,
On Mon, Sep 21, 2015 at 10:44 PM, Bin Meng wrote:
> Hi Joe,
>
> On Tue, Sep 15, 2015 at 10:46 AM, Bin Meng wrote:
>> Hi Joe,
>>
>> On Sat, Sep 12, 2015 at 3:44 AM, Joe Hershberger
>> wrote:
>>> Hi Bin,
>>>
>>> On Fri, Sep 4, 2015 at 6:56 AM, Bin Meng wrote:
In get_phy_device_by_ma
A few debug function calls that should be macro'd out in the
U-Boot build were still in. They are impossible to reach, as
they are in an "if (0)" block. The optimizer figures this
out, so the build succeeds with -O2. However, with -O0, the
symbols remain and the link fails, because the definitio
Tom,
The following changes since commit 1fb8d7933924aa5deb7e722d64c1d9fc7f0b2b82:
Merge git://git.denx.de/u-boot-x86 (2015-09-17 17:00:08 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-fsl-qoriq.git master
for you to fetch changes up to a857d5f835c53f7b66de61b1912
On 07/24/2015 06:52 AM, Codrin Ciubotariu wrote:
> This patch set adds several features for VSC9953 L2 Switch:
> - VLAN configuration;
> - port statistics;
> - FDB table operations;
> - enable/disable HW learning;
> - private/shared VLAN learning.
>
> Also, the pars
On 09/21/2015 07:59 PM, Gong Qianyu-B52263 wrote:
>
>> -Original Message-
>> From: Sun York-R58495
>> Sent: Tuesday, September 22, 2015 1:27 AM
>> To: Gong Qianyu-B52263; u-boot@lists.denx.de
>> Cc: Hu Mingkai-B21284; Sun York-R58495; Hou Zhiqiang-B48286; Xie Shaohui-
>> B21989; Song Wen
+Masahiro,
Hi,
On 22 September 2015 at 08:01, Tom Rini wrote:
> On Tue, Sep 22, 2015 at 01:12:56PM +0800, Bin Meng wrote:
>
>> Hi,
>>
>> I was using buildman to get toolchains from kernel.org to build U-Boot
>> for as many boards as possible. But I still see some boards do not
>> build. Are thes
On Tue, Sep 22, 2015 at 01:12:56PM +0800, Bin Meng wrote:
> Hi,
>
> I was using buildman to get toolchains from kernel.org to build U-Boot
> for as many boards as possible. But I still see some boards do not
> build. Are these build failures a known issue? Error log below:
>
> blackfin: + c
On Tuesday 22 September 2015 07:20 PM, Tom Rini wrote:
> On Tue, Sep 15, 2015 at 07:41:48PM +0530, Mugunthan V N wrote:
>
>> adopt omap_hsmmc driver to device driver model
>>
>> Signed-off-by: Mugunthan V N
> [snip]
>> +static const struct udevice_id omap_hsmmc_ids[] = {
>> +{ .compatible = "
On Tue, Sep 15, 2015 at 07:41:50PM +0530, Mugunthan V N wrote:
> enable mmc driver model for am335x gp_evm as omap_hsmmc
> supports driver model
>
> Signed-off-by: Mugunthan V N
Aside from subject mis-match:
Reviewed-by: Tom Rini
--
Tom
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Description: Digital signature
On Tue, Sep 22, 2015 at 06:45:12PM +0530, Mugunthan V N wrote:
> Import various DT files for dra7-evm from Linux Kernel v4.2
> Add config file for this board, enable DM and DM_GPIO
>
> Signed-off-by: Mugunthan V N
Reviewed-by: Tom Rini
--
Tom
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Description: Digital signature
__
On Tue, Sep 15, 2015 at 07:41:49PM +0530, Mugunthan V N wrote:
> enable mmc driver model for am335x bbb as omap_hsmmc
> supports driver model
>
> Signed-off-by: Mugunthan V N
Aside from subject mis-match:
Reviewed-by: Tom Rini
--
Tom
signature.asc
Description: Digital signature
___
On Tue, Sep 15, 2015 at 07:41:47PM +0530, Mugunthan V N wrote:
> Since spl doesn't support DM currently, do not define DM_MMC
> for spl build.
>
> Signed-off-by: Mugunthan V N
Reviewed-by: Tom Rini
--
Tom
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Description: Digital signature
On Mon, Sep 07, 2015 at 02:22:23PM +0530, Mugunthan V N wrote:
> enable ethernet driver model for am335x gp evm as cpsw supports
> driver model
>
> Signed-off-by: Mugunthan V N
Reviewed-by: Tom Rini
--
Tom
signature.asc
Description: Digital signature
___
On Tue, Sep 15, 2015 at 07:41:48PM +0530, Mugunthan V N wrote:
> adopt omap_hsmmc driver to device driver model
>
> Signed-off-by: Mugunthan V N
[snip]
> +static const struct udevice_id omap_hsmmc_ids[] = {
> + { .compatible = "ti,omap4-hsmmc" },
I think we can safely include ti,omap3-hsmmc
On Tue, Sep 15, 2015 at 07:41:46PM +0530, Mugunthan V N wrote:
> Existing driver gets the actual omap hammc base address + 0x100
> bytes as the first 0x100 bytes is not used by the driver. But
> with DM conversion the base address from DT is different, to
> accommodate the offset adding res0[0x100
Import various DT files for dra7-evm from Linux Kernel v4.2
Add config file for this board, enable DM and DM_GPIO
Signed-off-by: Mugunthan V N
---
Tested the patch on dra7-evm logs [1] and pushed a branch [2]
[1]: http://pastebin.ubuntu.com/12520984/
[2]: git://git.ti.com/~mugunthanvnm/ti-u-boo
On Sun, Sep 20, 2015 at 12:42:26PM +0200, Paul Kocialkowski wrote:
> Hi,
>
> Le vendredi 04 septembre 2015 à 14:14 -0400, Tom Rini a écrit :
> > On Thu, Aug 27, 2015 at 07:37:08PM +0200, Paul Kocialkowski wrote:
> >
> > > This introduces a common definition for omap_die_id, that aims at
> > > pr
On Mon, Sep 21, 2015 at 07:35:59PM -0600, Simon Glass wrote:
> Hi Tom.
>
> This doesn't break anything and makes the pinctrl behaviour correct, so it
> is good to get it into this release.
>
>
> The following changes since commit 1fb8d7933924aa5deb7e722d64c1d9fc7f0b2b82:
>
> Merge git://git.
Hi Dinh, Hi Marek,
any updates on this issue?
Best regards,
Jian Luo
On 04.09.2015 16:32, Marek Vasut wrote:
> On Friday, September 04, 2015 at 04:26:46 PM, Simon Glass wrote:
>> On 4 September 2015 at 08:25, Marek Vasut wrote:
>>> On Friday, September 04, 2015 at 04:16:21 PM, Simon Glass wr
On Tue, Sep 22, 2015 at 10:20:20AM +0100, Ian Campbell wrote:
> On Tue, 2015-09-22 at 11:17 +0200, Maxime Ripard wrote:
> > Hi Ian,
> >
> > On Fri, Sep 18, 2015 at 04:08:21PM +0100, Ian Campbell wrote:
> > > On Fri, 2015-09-18 at 14:06 +0200, Maxime Ripard wrote:
> > > > The R8 is very close to th
malloc_simple uses a part of the stack as heap, initially it uses
SYS_MALLOC_F_LEN bytes which typically is quite small as the initial
stacks sits in SRAM and we do not have that much SRAM to work with.
When DRAM becomes available we may switch the stack from SRAM to DRAM
to give use more room. Th
common/dlmalloc.c is quite big, both in .text and .data usage, therefor
on some boards the SPL is build to use only malloc_simple.c and not the
dlmalloc.c code. This is done in various include/configs/foo.h with the
following construct:
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_MALLOC_SIMPLE
#
Hi,
Thanks for all the reviews.
On 22-09-15 06:00, Simon Glass wrote:
Hi Hans,
On 13 September 2015 at 09:42, Hans de Goede wrote:
malloc_simple uses a part of the stack as heap, initially it uses
SYS_MALLOC_F_LEN bytes which typically is quite small as the initial
stacks sits in SRAM and we
Hi,
On 22-09-15 06:00, Simon Glass wrote:
Hi Hans,
On 13 September 2015 at 09:42, Hans de Goede wrote:
common/dlmalloc.c is quite big, both in .text and .data usage, therefor
on some boards the SPL is build to use only malloc_simple.c and not the
dlmalloc.c code. This is done in various inclu
On Sat, Sep 19, 2015 at 07:13:27AM -0400, Tom Rini wrote:
> On Sat, Sep 19, 2015 at 09:31:52AM +1000, Julian Calaby wrote:
> > Hi,
> >
> > On Sat, Sep 19, 2015 at 1:39 AM, Hans de Goede wrote:
> > > Hi,
> > >
> > > On 09/18/2015 11:39 AM, Tom Rini wrote:
> > >>
> > >> On Fri, Sep 18, 2015 at 11:1
On Tue, 2015-09-22 at 11:17 +0200, Maxime Ripard wrote:
> Hi Ian,
>
> On Fri, Sep 18, 2015 at 04:08:21PM +0100, Ian Campbell wrote:
> > On Fri, 2015-09-18 at 14:06 +0200, Maxime Ripard wrote:
> > > The R8 is very close to the A13, but it still has a few differences,
> > > notably a composite outpu
Hi Ian,
On Fri, Sep 18, 2015 at 04:08:21PM +0100, Ian Campbell wrote:
> On Fri, 2015-09-18 at 14:06 +0200, Maxime Ripard wrote:
> > The R8 is very close to the A13, but it still has a few differences,
> > notably a composite output, which the A13 lacks.
> >
> > Add a DTSI based on the A13's to ho
On Fri, Sep 18, 2015 at 11:02:27AM -0400, Tom Rini wrote:
> On Fri, Sep 18, 2015 at 02:06:15PM +0200, Maxime Ripard wrote:
>
> > Some devices don't have any MMC devices, so it doesn't really make sense to
> > enable the MMC related functions and options for them.
> >
> > Add an option to disable
Hi Hans,
On Fri, Sep 18, 2015 at 10:52:37AM -0400, Hans de Goede wrote:
> Hi,
>
> First if all, thanks for the patches for this. I've a couple
> of comments on a few of them (including this one) I'll reply to the one
> I've comments on. no reply means I think it is fine :)
>
> On 09/18/2015 08:0
Hi Hans,
On Fri, Sep 18, 2015 at 10:53:51AM -0400, Hans de Goede wrote:
> Hi,
>
> On 09/18/2015 08:06 AM, Maxime Ripard wrote:
> >The current fastboot support assumes that CONFIG_FASTBOOT_FLASH implies
> >that we have an MMC in our system, which might not be the case if we have
> >some other stor
Hi Tom,
On Fri, Sep 18, 2015 at 11:02:32AM -0400, Tom Rini wrote:
> On Fri, Sep 18, 2015 at 02:06:16PM +0200, Maxime Ripard wrote:
>
> > The current fastboot support assumes that CONFIG_FASTBOOT_FLASH implies
> > that we have an MMC in our system, which might not be the case if we have
> > some o
On Tuesday, September 22, 2015 at 09:41:21 AM, Thomas Chou wrote:
> Some cores, such as Altera SPI and QuadSPI, can not change
> speed and mode at runtime. Ignore the operation which is
> not available.
>
> Signed-off-by: Thomas Chou
Acked-by: Marek Vasut
Thanks!
Best regards,
Marek Vasut
___
On Tuesday, September 22, 2015 at 09:45:22 AM, Thomas Chou wrote:
> Hi Marek,
Hi!
> On 09/22/2015 12:13 PM, Marek Vasut wrote:
> > I'm expecting that EPCQ Wundercontroller to have the same problem (see
> > [1] section 42, Altera GQSPI). Altera tried to push this into mainline
> > Linux even [2],
The board supports following features:
- Boot media support: SD card/e.MMC/SPI flash,
- Support LCD display (optional, disabled by default),
- Support ethernet,
- Support USB mass storage.
Signed-off-by: Wenyou Yang
---
The patch is based on the following patches sent in mailing list.
On 16/09/2015 18:50, Nikita Kiryanov wrote:
> On Wed, Sep 16, 2015 at 01:10:45PM +0300, Igor Grinberg wrote:
>> Hi Stefano,
>>
>> On 09/13/15 11:36, Stefano Babic wrote:
>>>
>>>
>>> On 06/09/2015 10:48, Nikita Kiryanov wrote:
This series provides a fix necessary for early models of Utilite, a
Hi Fabio,
> From: Fabio Estevam
>
> SPI NOR flashes need to erase the entire sector size and we cannot
> pass any arbitrary length for the erase operation.
>
> To illustrate the problem:
>
> Copying data from PC to DFU device
> Download[=] 100% 478208 bytes
>
The SDHCI is introduced by sama5d2, named as Secure Digital Multimedia
Card Controller(SDMMC). It supports the embedded MultiMedia Card (e.MMC)
Specification V4.41, the SD Memory Card Specification V3.0, and the SDIO
V3.0 specification. It is compliant with the SD Host Controller Standard
V3.0 spec
Hi Marek,
On 09/22/2015 12:13 PM, Marek Vasut wrote:
I'm expecting that EPCQ Wundercontroller to have the same problem (see [1]
section 42, Altera GQSPI). Altera tried to push this into mainline Linux
even [2], without much success, in particular because they duplicated half
of the spi-nor stack
Some cores, such as Altera SPI and QuadSPI, can not change
speed and mode at runtime. Ignore the operation which is
not available.
Signed-off-by: Thomas Chou
---
drivers/spi/spi-uclass.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/spi/spi-uclass.c b/drivers/s
Hi Fabio,
> On Tue, Sep 22, 2015 at 12:23 AM, Stephen Warren
> wrote:
>
> > Oh good:-)
Nice to hear, that the bug is fixed.
> >
> > I was going to give you my dfu_alt_info, but it's at work right
> > now, so I was waiting until tomorrow. I did try to repro this, but
> > I was having a lot of t
Hi Pantelis,
> -Original Message-
> From: Pantelis Antoniou [mailto:pa...@antoniou-consulting.com]
> Sent: 2015年9月21日 23:36
> To: Yang, Wenyou
> Cc: U-Boot Mailing List
> Subject: Re: [PATCH] mmc: sdhci: Fix the SD clock stop sequence
>
> Hi Wenyou,
>
> > On Sep 16, 2015, at 11:22 , Weny
According to the SDHC specification, stopping the SD Clock is by setting
the SD Clock Enable bit in the Clock Control register at 0, instead of
setting all bits at 0.
Before stopping the SD clock, we need to make sure all SD transactions
to complete, so add checking the CMD and DAT bits in the Pre
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