On 13/11/14 17:59, Albert ARIBAUD wrote:
Commit 3ff46cc4 fixed exception vectors setting in
the general ARM case, by either copying the exception
and indirect vector tables to normal (0x) or
high (0x) vectors address, or setting VBAR to
U-Boot's base if applicable.
i.MX27 SoC is
Hi Simon,
On Fri, 14 Nov 2014 20:56:34 -0700
Simon Glass wrote:
> Add a very simple driver which uses vesa to discover the video mode and
> then provides a frame buffer for use by U-Boot.
>
> Signed-off-by: Simon Glass
> ---
>
> drivers/video/Makefile | 1 +
> drivers/video/x86_fb.c | 37 ++
On 11/15/2014 10:56 AM, Victor Ascroft wrote:
> On 11/15/2014 07:26 AM, Simon Glass wrote:
>> Hi Albert,
>>
>> On 14 November 2014 08:26, Albert ARIBAUD wrote:
>>> Hello Simon,
>>>
>>> On Fri, 14 Nov 2014 07:01:59 -0700, Simon Glass
>>> wrote:
Hi Victor,
On 13 November 2014 09:29,
On 11/15/2014 07:26 AM, Simon Glass wrote:
> Hi Albert,
>
> On 14 November 2014 08:26, Albert ARIBAUD wrote:
>> Hello Simon,
>>
>> On Fri, 14 Nov 2014 07:01:59 -0700, Simon Glass
>> wrote:
>>> Hi Victor,
>>>
>>> On 13 November 2014 09:29, Victor Ascroft wrote:
Hello,
I am working
Hi Simon,
On Sat, Nov 15, 2014 at 9:18 AM, Simon Glass wrote:
> Add code to set up the Local Advanced Peripheral Interrupt Controller.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2:
> - Remove use of __PRE_RAM__ define
> - Use existing lapic_setup() code instead of duplicating it
>
> a
Hi Bin,
On 14 November 2014 21:36, Bin Meng wrote:
> Hi Simon,
>
> On Sat, Nov 15, 2014 at 12:30 PM, Simon Glass wrote:
>> Hi Bin,
>>
>> On 14 November 2014 21:01, Bin Meng wrote:
>>> Hi Simon,
>>>
>>> On Sat, Nov 15, 2014 at 9:18 AM, Simon Glass wrote:
Add code to set up the Local Advanc
Hi Simon,
On Sat, Nov 15, 2014 at 12:30 PM, Simon Glass wrote:
> Hi Bin,
>
> On 14 November 2014 21:01, Bin Meng wrote:
>> Hi Simon,
>>
>> On Sat, Nov 15, 2014 at 9:18 AM, Simon Glass wrote:
>>> Add code to set up the Local Advanced Peripheral Interrupt Controller.
>>>
>>> Signed-off-by: Simon
Hi Bin,
On 14 November 2014 21:01, Bin Meng wrote:
> Hi Simon,
>
> On Sat, Nov 15, 2014 at 9:18 AM, Simon Glass wrote:
>> Add code to set up the Local Advanced Peripheral Interrupt Controller.
>>
>> Signed-off-by: Simon Glass
>> ---
>>
>> Changes in v2:
>> - Remove use of __PRE_RAM__ define
>>
There is an implicit assumption that x86 machines want to use raw I/O in the
BIOS emulator, but this should be selectable. Add an CONFIG_X86EMU_RAW_IO
option to control it instead.
Also fix a few bugs which cause warnings on x86 and adjust the Makefile to
remove the assumption that only PowerPC us
Now that we have the required drivers, enable video support with a suitable
option ROM.
Signed-off-by: Simon Glass
---
include/configs/chromebook_link.h | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/include/configs/chromebook_link.h
b/include/configs/chromebook
Hi Simon,
On Sat, Nov 15, 2014 at 9:18 AM, Simon Glass wrote:
> Add code to set up the Local Advanced Peripheral Interrupt Controller.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2:
> - Remove use of __PRE_RAM__ define
> - Use existing lapic_setup() code instead of duplicating it
>
> a
On Sat, Nov 15, 2014 at 9:18 AM, Simon Glass wrote:
> Add this additional init in case it is needed by the OS.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2:
> - Remove i8259 patch and just update the existing interrupt code
>
> arch/x86/include/asm/interrupt.h | 11 +++
> arch/
Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range
of video devices. Add code to set up the hardware on ivybridge. Part of the
init happens in native code, part of it happens in a 16-bit option ROM for
those nostalgic for the 1970s.
Signed-off-by: Simon Glass
---
arch/x
At present there are DEBUG options spread around the place. If you enable
one and not another you can end up with an emulator that does not work,
since each file can have a different view of what the registers look like.
To fix this, create a global CONFIG_X86EMU_DEBUG option that keeps
everything
This is a rare event and should not happen. When it does it is confusing to
work out why. At least we should print a message.
Adjust the emulator to always print decode errors to the console.
Signed-off-by: Simon Glass
---
drivers/bios_emulator/include/x86emu/debug.h | 6 +-
drivers/bios_
As well as locating the ROM on the PCI bus, allow the ROM to be supplied to
the emulator. Split the init up a little so that callers can supply their
own interrupt routines. Also allow a vesa mode to be provided, to be
selected once the BIOS run is complete.
Signed-off-by: Simon Glass
---
drive
Enable the Chrome OS EC so that it can be used from U-Boot.
Signed-off-by: Simon Glass
---
board/google/chromebook_link/link.c | 4
include/configs/chromebook_link.h | 5 +
2 files changed, 9 insertions(+)
diff --git a/board/google/chromebook_link/link.c
b/board/google/chromebook_l
Enable this so that it can be used instead of native execution if desired.
Signed-off-by: Simon Glass
---
include/configs/chromebook_link.h | 4
1 file changed, 4 insertions(+)
diff --git a/include/configs/chromebook_link.h
b/include/configs/chromebook_link.h
index c098c6c..48ae81e 10064
On x86 machines we can use an emulator to run option ROMS as with other
architectures. But with some additional effort (mostly due to the 16-bit
nature of option ROMs) we can run them natively. Add support for this.
Signed-off-by: Simon Glass
---
arch/x86/lib/Makefile | 3 +
arch/x86
Add a very simple driver which uses vesa to discover the video mode and
then provides a frame buffer for use by U-Boot.
Signed-off-by: Simon Glass
---
drivers/video/Makefile | 1 +
drivers/video/x86_fb.c | 37 +
include/video_fb.h | 2 +-
3 files change
This is needed to permit calling C from assembler without too much pain.
Add a definition for x86.
Signed-off-by: Simon Glass
---
include/common.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/common.h b/include/common.h
index 28fba79..d02e42b 100644
--- a/include/common.h
+++
Add Kconfig options to allow selection of a vesa mode on x86 machines.
Signed-off-by: Simon Glass
---
arch/x86/Kconfig | 149 +++
1 file changed, 149 insertions(+)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 6e29868..4f5ce38 100644
Sometime we want to provide an interrupt handler for the ROM, Add a
function to allow this.
Signed-off-by: Simon Glass
---
drivers/bios_emulator/include/x86emu.h | 1 +
drivers/bios_emulator/x86emu/sys.c | 5 +
2 files changed, 6 insertions(+)
diff --git a/drivers/bios_emulator/include
This provides panel timing information needed by the video driver.
Signed-off-by: Simon Glass
---
arch/x86/dts/link.dts | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/x86/dts/link.dts b/arch/x86/dts/link.dts
index d3c94e0..592af16 100644
--- a/arch/x86/dts/link.dts
+++
Option ROMs require a few additional descriptors. Add these, and remove the
enum since we now have to access several descriptors from assembler.
Signed-off-by: Simon Glass
---
arch/x86/cpu/cpu.c | 9 ++---
arch/x86/include/asm/processor.h | 31 ---
Some platforms don't have native code for dealing with their video
hardware. In some cases they use a binary blob to set it up and perform
required actions like setting the video mode. This approach is a hangover
from the old PC days where a ROM was provided and executed during startup.
Even now,
Some x86 machines require a binary blob containing 16-bit initialisation
code for their video hardware. Allow this to be built into the x86 ROM so
that it is accessible during boot.
Signed-off-by: Simon Glass
---
Makefile | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Makefile b/Makefil
We should have a public header so that users can avoid defining functions
themselves.
Signed-off-by: Simon Glass
---
drivers/bios_emulator/include/biosemu.h | 53 ++---
drivers/video/ati_radeon_fb.c | 2 +-
include/bios_emul.h | 43
This series adds a graphics driver and support for execution of the VGA
option ROM. This option ROM is required on ivybridge for the graphics to
work, at least until someone creates the equivalent source code.
Option ROMs can be run using U-Boot's BIOS emulator, but on x86 it is also
possible to r
For option ROMs we can use these extensions to request a particular video
mode. Add a header file which defines the binary interface.
Signed-off-by: Simon Glass
---
include/vbe.h | 103 ++
1 file changed, 103 insertions(+)
create mode 100
On Sat, Nov 15, 2014 at 9:18 AM, Simon Glass wrote:
> Some PCI functions cannot be auto-configured. Add a function to set up a
> fixed BAR which can be used in these situations. Also add a function to read
> the current address of a BAR.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2:
> -
On Sat, Nov 15, 2014 at 9:18 AM, Simon Glass wrote:
> Provide a function to set up the RTC ready for use.
>
> Signed-off-by: Simon Glass
>
> ---
>
> Changes in v2:
> - Drop the part of the commit message that talks about using build date
> - Move CLEAR_CMOS up to the top, indicated to be manually
On Sat, Nov 15, 2014 at 9:18 AM, Simon Glass wrote:
> Define the reset base in config.mk so that it does not need to be calculated
> twice in the link script. Also tidy up the START_16 and RESET_VEC_LOC values
> to fit with this new approach.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2
On Sat, Nov 15, 2014 at 9:18 AM, Simon Glass wrote:
> Some toolchains put the relocation data into separate sections. Adjust the
> linker script to catch this case. Without relocation data, U-Boot will not
> boot.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2:
> - Use .rel* instead of .r
Hi Albert,
On 14 November 2014 08:26, Albert ARIBAUD wrote:
> Hello Simon,
>
> On Fri, 14 Nov 2014 07:01:59 -0700, Simon Glass
> wrote:
>> Hi Victor,
>>
>> On 13 November 2014 09:29, Victor Ascroft wrote:
>> > Hello,
>> >
>> > I am working with a Cortex A5 Freescale Vybrid Processor. Since a th
Hi Albert,
On 14 November 2014 01:00, Albert ARIBAUD wrote:
> Hello Simon,
>
> I've actually applied v2 of this patch and PRed it to u-boot/master)
> and accidentally not acked it.
>
> Apologies.
No problem, I think it will be fine. Thanks for letting me know.
- Simon
>
> On Wed, 12 Nov 2014 1
Add this additional init in case it is needed by the OS.
Signed-off-by: Simon Glass
---
Changes in v2:
- Remove i8259 patch and just update the existing interrupt code
arch/x86/include/asm/interrupt.h | 11 +++
arch/x86/lib/pcat_interrupts.c | 38 +
Some PCI functions cannot be auto-configured. Add a function to set up a
fixed BAR which can be used in these situations. Also add a function to read
the current address of a BAR.
Signed-off-by: Simon Glass
---
Changes in v2:
- Rename functions to pci_read_bar32() and pci_write_bar32()
drivers
This was taken from Linux 3.18 with some additional IDs from Chrome OS
Coreboot commit 688ef385.
Signed-off-by: Simon Glass
---
Changes in v2: None
include/pci_ids.h | 187 --
1 file changed, 181 insertions(+), 6 deletions(-)
diff --git a/in
Add the setup code for the CPU so that it can be used at full speed.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/x86/cpu/ivybridge/Makefile | 1 +
arch/x86/cpu/ivybridge/bd82x6x.c | 6 +
arch/x86/cpu/ivybridge/model_206ax.c | 514
These are not available in U-Boot as yet, so drop them.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/x86/include/asm/msr.h | 11 ---
1 file changed, 11 deletions(-)
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index df43983..1955a75 100644
--- a/arch
Add init for the northbridge, another part of the platform controller hub.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/x86/cpu/ivybridge/Makefile | 1 +
arch/x86/cpu/ivybridge/bd82x6x.c | 2 +
arch/x86/cpu/ivybridge/northbridge.c
Enable this option so that we can configure the available PCI devices. Also
make sure that PCI is available early after relocation as we use it for
several other subsystems.
Signed-off-by: Simon Glass
---
Changes in v2: None
include/configs/chromebook_link.h | 3 +++
1 file changed, 3 insertio
Some toolchains put the relocation data into separate sections. Adjust the
linker script to catch this case. Without relocation data, U-Boot will not
boot.
Signed-off-by: Simon Glass
---
Changes in v2:
- Use .rel* instead of .rel.* to catch more cases
arch/x86/cpu/u-boot.lds | 4 +++-
1 file c
Enable USB support on link - there are two EHCI ports available.
Signed-off-by: Simon Glass
---
Changes in v2: None
include/configs/chromebook_link.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/configs/chromebook_link.h
b/include/configs/chromebook_link.h
index e9efd7c..86429
Enable SPI so that the SPI flash can be used.
Signed-off-by: Simon Glass
---
Changes in v2: None
include/configs/chromebook_link.h | 4
1 file changed, 4 deletions(-)
diff --git a/include/configs/chromebook_link.h
b/include/configs/chromebook_link.h
index 86429cf..6b57b28 100644
--- a/i
These peripherals should not be at the top level, since they exist inside
the PCI bus. We don't have a full device tree node for pci yet, but we
should at least put it at the right level.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/x86/dts/link.dts | 28 +++-
Add code to set up the SATA interfaces on boot.
Signed-off-by: Simon Glass
---
Changes in v2:
- Move common SATA init to a function to reduce duplication
- Use pci_write_bar32() to write to BARs
arch/x86/cpu/ivybridge/Makefile | 1 +
arch/x86/cpu/ivybridge/bd82x6x.c
Add definitions for the I/O Advanced Peripheral Interrupt Controller.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/x86/include/asm/ioapic.h | 38 ++
1 file changed, 38 insertions(+)
create mode 100644 arch/x86/include/asm/ioapic.h
diff --git a/a
Add init for EHCI so that USB can be used.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/x86/cpu/ivybridge/Makefile | 1 +
arch/x86/cpu/ivybridge/bd82x6x.c | 2 ++
arch/x86/cpu/ivybridge/usb_ehci.c | 29 +++
arch/x86/in
Set up all the remaining pieces of the LPC (low-pin-count) peripheral in
PCH (Peripheral Controller Hub).
Signed-off-by: Simon Glass
---
Changes in v2:
- Adjust rtc_init() call to remove the parameter
- Remove ISA DMA init which isn't needed in U-Boot
- Use i8259 init in pcat_interrupts.c
- Use
Add code to set up the Local Advanced Peripheral Interrupt Controller.
Signed-off-by: Simon Glass
---
Changes in v2:
- Remove use of __PRE_RAM__ define
- Use existing lapic_setup() code instead of duplicating it
arch/x86/cpu/Makefile| 1 +
arch/x86/cpu/lapic.c | 62 +
We don't use many features yet, so this only has a few declarations.
It will be expanded as needed.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/x86/include/asm/acpi.h | 24
1 file changed, 24 insertions(+)
create mode 100644 arch/x86/include/asm/acpi.h
di
Add basic setup for the PCH.
Signed-off-by: Simon Glass
---
Changes in v2:
- Use pci_write_bar32() to write to BARs
arch/x86/cpu/ivybridge/Makefile | 1 +
arch/x86/cpu/ivybridge/bd82x6x.c | 99 +++
arch/x86/cpu/ivybridge/pci.c
Add the requires settings to enable SATA on link.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/x86/dts/link.dts | 7 +++
include/configs/chromebook_link.h | 1 -
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/x86/dts/link.dts b/arch/x86/dts/link.d
Add some settings required to set up the LPC correctly.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/x86/dts/link.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/x86/dts/link.dts b/arch/x86/dts/link.dts
index 4520db5..28cef07 100644
--- a/arch/x86/dts/link.dts
+
Add required init for the Intel Platform Controller Hub in ivybridge.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/x86/cpu/ivybridge/Makefile | 1 +
arch/x86/cpu/ivybridge/pch.c | 123 ++
arch/x86/include/asm/arch-ivybridge/pch.h
Provide a function to set up the RTC ready for use.
Signed-off-by: Simon Glass
---
Changes in v2:
- Drop the part of the commit message that talks about using build date
- Move CLEAR_CMOS up to the top, indicated to be manually changed
- Remove the parameter from rtc_init() and simplify the cod
Some boards will want to do some setup before and after a PCI hose
is scanned.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2: None
arch/x86/cpu/pci.c | 12
arch/x86/include/asm/pci.h | 3 +++
2 files changed, 15 insertions(+)
diff --git a/arch/x86/c
Intel chips have a turbo mode where they can run faster for a short period
until they reach thermal limits. Add code to adjust and query this feature.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/x86/cpu/Makefile| 1 +
arch/x86/cpu/turbo.c | 98 +
Add init for XHCI so that high-speed USB can be used.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/x86/cpu/ivybridge/Makefile | 1 +
arch/x86/cpu/ivybridge/usb_xhci.c | 32 +++
arch/x86/include/asm/arch-ivybridge/bd82x6x.h | 1 +
3
This function is not needed. Remove it to improve the generic init sequence
slightly.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2: None
arch/x86/cpu/coreboot/coreboot.c| 11 ---
board/google/chromebook_link/link.c | 5 -
common/board_r.c
Define the reset base in config.mk so that it does not need to be calculated
twice in the link script. Also tidy up the START_16 and RESET_VEC_LOC values
to fit with this new approach.
Signed-off-by: Simon Glass
---
Changes in v2:
- Drop WIP commit for u-boot.srec as it is not needed now
- Fix '
We have an ALIGN() macro - add a comment as to what this does. Also add a
new ALIGN_DOWN() macro, which aligns a value to the next smallest multiple.
Signed-off-by: Simon Glass
---
Changes in v2: None
include/common.h | 15 +++
1 file changed, 15 insertions(+)
diff --git a/include
Device trees must be aligned to a 4-byte boundary. This was dropped in the
Kbuild conversion. Bring it back, and use 16-byte alignment for good
measure.
Signed-off-by: Simon Glass
---
Changes in v2: None
scripts/Makefile.lib | 2 ++
1 file changed, 2 insertions(+)
diff --git a/scripts/Makefil
This normally indicates a problem which will prevent relocation from
functioning, resulting in a hang. Panic in this case to make it easier
to debug.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2:
- Change 'not' to 'no' since it reads better
arch/x86/lib/relocate.c | 3 ++
This series adds full support for the LPC (Low Pin Count) bridge, the
PCH (Platform Controller Hub), PCI devices like USB and SATA and more
CPU init support (turbo mode, etc.)
With this series, chromebook_link can use SATA and USB at the command
line.
Changes in v2:
- Adjust rtc_init() call to re
Some UDIMMs have faulty SPD with wrong mapping for DQ[36-39].
Using raw card spec in case this error is detected.
Signed-off-by: York Sun
---
Change log
v2: Fix typo in commit subject
drivers/ddr/fsl/ddr4_dimm_params.c | 22 ++
1 file changed, 22 insertions(+)
diff --git
Some UDIMMs have faulty SPD with wrong mapping for DQ[36-39].
Using raw card spec in case this error is detected.
Signed-off-by: York Sun
---
drivers/ddr/fsl/ddr4_dimm_params.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/ddr/fsl/ddr4_dimm_params.c
b/dri
If I set CONFIG_SYS_TEXT_BASE to start of RAM then I get no boot. Is there
some kind of vector setup at the beginning of RAM?
Have a good weekend everybody.
Cheers,
Dave
--
View this message in context:
http://u-boot.10912.n7.nabble.com/Memory-test-post-relocation-tp196088p196254.html
Sent f
On Fri, 14 Nov 2014 17:54:47 +0100
Hans de Goede wrote:
...
> diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
> index 532fdb7..d7d8571 100644
> --- a/include/configs/sunxi-common.h
> +++ b/include/configs/sunxi-common.h
> @@ -204,6 +204,9 @@
> */
> #define CONFIG_SU
On 10/15/2014 07:58 PM, Yangbo Lu wrote:
> Enable these boards mtdparts for nor flash:
> p1020rdb-pd, p1021rdb-pc, p1022ds, p1025twr, and p2020rdb-pc.
>
> Signed-off-by: Xie Xiaobo
> Signed-off-by: Yangbo Lu
> Cc: York Sun
> Cc: Scott Wood
> ---
> Changes for v2:
> - changed commit messa
On 10/03/2014 02:45 AM, Valentin Longchamp wrote:
> This converts all the Keymile powerpc boards to the generic board
> initialization.
>
> This includes the 3 Keymile powerpc subsystems: km82xx, km83xx,
> and kmp204x.
>
> Signed-off-by: Valentin Longchamp
> ---
Applied to u-boot-mpc85xx maste
On 10/03/2014 02:45 AM, Valentin Longchamp wrote:
> The argument boot_flags of board_init_f() is not used at all in the
> powerpc specific board.c init sequence. Now with the generic init
> sequence, this boot_flags arg is used by board_init_f().
>
> This patch sets the r3 register that is used to
On 10/07/2014 05:32 AM, Ashish Kumar wrote:
> * fdt_fixup_mtdparts is called from ft_board_setup
> * Run "mtdparts default" to create NAND partition on uboot
> * Use mtdparts to create partitions dynamically rather
> than using static partitions in device tree
>
> Signed-off-by: Ashish Kuma
On 10/06/2014 05:54 AM, Ashish Kumar wrote:
> * fdt_fixup_mtdparts is called from ft_board_setup
> * run "mtdparts default" to create NAND, NOR partition on uboot
> * Use mtdparts to create partitions dynamically rather
> than using static partitions in device tree
>
> Signed-off-by: Ashish
On 09/22/2014 10:27 PM, Prabhakar Kushwaha wrote:
> IFC registers can be of type Little Endian or big Endian depending upon
> Freescale SoC. Here SoC defines the register type of IFC IP.
>
> So use IFC acessor functions instead of in_be32().
>
> Signed-off-by: Prabhakar Kushwaha
> ---
Applied
On 09/17/2014 03:27 AM, Priyanka Jain wrote:
> -A_007662 states that for x1 link width, PCIe2 controller trains in
> Gen1 speed while configured for Gen2 speed.
> Workaround:Set the width to x1 and speed to Gen2 by writing to
> CCSR registers in PBI phase
>
> -A_008007 states that PVR register
On 09/11/2014 11:47 PM, Chunhe Lan wrote:
> This support of CPLD includes
>
> - Files and register definitions
> - Command to switch alternate bank
> - Command to switch default bank
>
> Signed-off-by: Chunhe Lan
> ---
Applied to u-boot-mpc85xx master. Thanks.
York
__
On 08/21/2014 05:22 AM, Ramneek Mehresh wrote:
> LIODN entry for B4860/B4420 mentions USB controller as "mph"
> insread of "dr". This results in PAMU not permitting bus
> transactions for USB DR controller on B4860 resulting in
> USB function failure. Replacing "fsl-usb2-mph" with
> "fsl-usb2-dr" a
On 08/14/2014 07:42 AM, Paul Gortmaker wrote:
> Tested on the following baseline (note "dirty" since I enabled
> ALT_BOOT in the config in order to use the alternate boot bank.)
>
> Everything seems to work fine with no additional changes. The
> banner warning message is now gone.
>
> ---
Appl
On 08/13/2014 03:38 AM, shh@gmail.com wrote:
> From: Shaohui Xie
>
> NEG bit default is '1' for external MDIOs as per FMAN-v3 RM, but on some
> platforms, e.g. T2080QDS, this bit is '0', which leads to MDIO failure
> on XAUI PHY, so set this bit definitely to align with the RM.
>
> Signed-of
On 08/13/2014 03:32 AM, shh@gmail.com wrote:
> From: Shaohui Xie
>
> 1. use Payload length check disable when enable MAC;
> 2. add XGMII support for setting MAC interface mode;
> 3. only enable auto negotiation for Non-XGMII mode;
> 4. return 0x if clause 22 is used to read 10G phy_id;
>
On 10/24/2014 01:11 AM, Valentin Longchamp wrote:
> Until now this defined to be 512KB and the total binary size actually
> was on the edge of this limit. Most of the powerpc boards have thus
> moved to 768KB.
>
> Since on the current kmp204x boards there is 1MB reserved for u-boot on
> the SPI bo
Tom,
The following changes since commit 0d485b9095328cdc81b2ee94ff59b988c69b9127:
Merge branch 'master' of git://git.denx.de/u-boot-sunxi (2014-11-13 10:35:13
-0500)
are available in the git repository at:
git://git.denx.de/u-boot-mpc85xx.git master
for you to fetch changes up to 94b383e7
On Fri, Nov 14, 2014 at 11:24 AM, Stefano Babic wrote:
> Hi Albert,
>
> On 14/11/2014 13:10, Albert ARIBAUD wrote:
>>> I'll have a look at the i.MX25, i.MX31 and i.MX35 reference manuals,
>>> but at most that will only tell me if they have the same problem as
>>> i.MX27 has about ROM/RAM and low/h
On Tue, Nov 11, 2014 at 4:58 PM, Simon Glass wrote:
> On 10 November 2014 13:17, Suriyan Ramasami wrote:
>> Test size/read/write commands in a sandbox environment.
>>
>> Signed-off-by: Suriyan Ramasami
>>
>>
>> ---
>>
>> Changes in v7:
>> * Simon
>> - take care of fat/vfat in mkfs
>> - fs/nonf
On Tue, Nov 11, 2014 at 4:55 PM, Simon Glass wrote:
> On 10 November 2014 13:17, Suriyan Ramasami wrote:
>> The sandbox/ext4/fat/generic fs commands do not gracefully deal with file
>> greater than 2GB. Negative values are returned in such cases.
>>
>> To handle this, the fs functions have been m
On Tue, Nov 11, 2014 at 4:50 PM, Simon Glass wrote:
> On 10 November 2014 13:17, Suriyan Ramasami wrote:
>> Change the internal ext4 functions to use loff_t for offsets.
>>
>> Signed-off-by: Suriyan Ramasami
>
> Acked-by: Simon Glass
>
> (BTW you could be more consistent with size, sz, file_siz
Hello Simon,
On Tue, Nov 11, 2014 at 4:27 PM, Simon Glass wrote:
> Hi,
>
> On 10 November 2014 13:17, Suriyan Ramasami wrote:
>> Change the internal fat functions to use loff_t for offsets.
>>
>> Signed-off-by: Suriyan Ramasami
>>
>> ---
>>
>> Changes in v7:
>> * Split it so that its bisectable
From: Nitin Garg
Add api to check and enable pll3 as required
for thermal sensor driver.
Signed-off-by: Nitin Garg
---
arch/arm/cpu/armv7/mx6/clock.c| 25 +
arch/arm/include/asm/arch-mx6/clock.h |1 +
2 files changed, 26 insertions(+)
diff --git a/arch/ar
From: Nitin Garg
Add CONFIG_IMX6_THERMAL to mx6sabre_common.h file. Since
thermal driver depends on ocotp, make sure to enable
CONFIG_MXC_OCOTP when CONFIG_IMX6_THERMAL is slected.
Signed-off-by: Nitin Garg
---
include/configs/mx6sabre_common.h |3 ++-
1 file changed, 2 insertions(+), 1 de
From: Nitin Garg
read cpu temperature using the onchip thermal
sensor.
Signed-off-by: Nitin Garg
---
arch/arm/imx-common/cpu.c |6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
index 09fc227..441c484 100644
--- a/arch/arm/imx-com
From: Nitin Garg
This patch set adds i.MX6 thermal sensor driver
and enables it for mx6sabre boards. Also adds
various anadig bit definitions as required for
upcoming drivers.
Changes in v6:
-Aligned imx thermal driver macro defines with kernel
Changes in v5:
-Don't modify the copyright of cpu.
From: Nitin Garg
i.MX6 SoC has onchip temperature sensor. Add driver
for this sensor.
Signed-off-by: Nitin Garg
---
drivers/Makefile |1 +
drivers/thermal/Makefile |8 +++
drivers/thermal/imx_thermal.c | 144 +
include/imx_ther
Old u-boot was u-boot-2009.08.
I guess the main source of frustration the last 3 weeks could be attributed
to my lack of experience with u-boot and the fact that we were working with
an old Freescale version of u-boot. Not to mention 5 years worth of changes
between the versions. Most of the init
On Fri, 14 Nov 2014 21:17:39 +0100
Anatolij Gustschin wrote:
...
> this patch looks good, only a few minor comments below.
I forgot to mention that with these comments addressed,
you can add
Acked-by: Anatolij Gustschin
___
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On Fri, 14 Nov 2014 17:54:46 +0100
Hans de Goede wrote:
> Signed-off-by: Hans de Goede
> ---
> drivers/video/sunxi_display.c | 31 +++
> 1 file changed, 31 insertions(+)
Acked-by: Anatolij Gustschin
Thanks,
Anatolij
___
On Thursday, November 13, 2014 at 06:23:41 PM, dingu...@opensource.altera.com
wrote:
> From: Dinh Nguyen
>
> Set the PHY skew settings for the ethernet phy on the SOCFPGA Cyclone5
> hardware.
>
> Signed-off-by: Dinh Nguyen
> Cc: Vince Bridgers
> Cc: Pavel Machek
> Cc: Marek Vasut
> Cc: Tom
On Friday, November 14, 2014 at 12:37:01 PM, Fabio Estevam wrote:
> From: Fabio Estevam
>
> mx6sabresd_spl.cfg configures CCM registers, GPR registers and CCM_CCOSR.
>
> Move the configuration to the spl code.
>
> CCM_CCOSR setting is no longer required to get audio functionality in the
> kerne
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