Hi Simon, On Sat, Nov 15, 2014 at 12:30 PM, Simon Glass <s...@chromium.org> wrote: > Hi Bin, > > On 14 November 2014 21:01, Bin Meng <bmeng...@gmail.com> wrote: >> Hi Simon, >> >> On Sat, Nov 15, 2014 at 9:18 AM, Simon Glass <s...@chromium.org> wrote: >>> Add code to set up the Local Advanced Peripheral Interrupt Controller. >>> >>> Signed-off-by: Simon Glass <s...@chromium.org> >>> --- >>> >>> Changes in v2: >>> - Remove use of __PRE_RAM__ define >>> - Use existing lapic_setup() code instead of duplicating it >>> >>> arch/x86/cpu/Makefile | 1 + >>> arch/x86/cpu/lapic.c | 62 +++++++++++++++++++++ >>> arch/x86/include/asm/lapic.h | 125 >>> +++++++++++++++++++++++++++++++++++++++++-- >>> arch/x86/include/asm/post.h | 1 + >>> 4 files changed, 186 insertions(+), 3 deletions(-) >>> create mode 100644 arch/x86/cpu/lapic.c >>> >>> diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile >>> index 1327f08..adfd258 100644 >>> --- a/arch/x86/cpu/Makefile >>> +++ b/arch/x86/cpu/Makefile >>> @@ -11,5 +11,6 @@ >>> extra-y = start.o >>> obj-$(CONFIG_X86_RESET_VECTOR) += resetvec.o start16.o >>> obj-y += interrupts.o cpu.o call64.o >>> +obj-y += lapic.o >>> obj-$(CONFIG_PCI) += pci.o >>> obj-y += turbo.o >>> diff --git a/arch/x86/cpu/lapic.c b/arch/x86/cpu/lapic.c >>> new file mode 100644 >>> index 0000000..4d14a8d >>> --- /dev/null >>> +++ b/arch/x86/cpu/lapic.c >>> @@ -0,0 +1,62 @@ >>> +/* >>> + * From coreboot file of same name >>> + * >>> + * Copyright (C) 2008-2009 coresystems GmbH >>> + * Copyright (C) 2014 Google, Inc >>> + * >>> + * SPDX-License-Identifier: GPL-2.0 >>> + */ >>> + >>> +#include <common.h> >>> +#include <asm/msr.h> >>> +#include <asm/io.h> >>> +#include <asm/lapic.h> >>> +#include <asm/post.h> >>> + >>> +void lapic_setup(void) >>> +{ >>> +#if NEED_LAPIC == 1 >>> + /* Only Pentium Pro and later have those MSR stuff */ >>> + debug("Setting up local apic: "); >>> + >>> + /* Enable the local apic */ >>> + enable_lapic(); >>> + >>> + /* >>> + * Set Task Priority to 'accept all'. >>> + */ >>> + lapic_write_around(LAPIC_TASKPRI, >>> + lapic_read_around(LAPIC_TASKPRI) & >>> ~LAPIC_TPRI_MASK); >>> + >>> + /* Put the local apic in virtual wire mode */ >>> + lapic_write_around(LAPIC_SPIV, (lapic_read_around(LAPIC_SPIV) & >>> + ~(LAPIC_VECTOR_MASK)) | LAPIC_SPIV_ENABLE); >>> + lapic_write_around(LAPIC_LVT0, (lapic_read_around(LAPIC_LVT0) & >>> + ~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER | >>> + LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY | >>> + LAPIC_SEND_PENDING | LAPIC_LVT_RESERVED_1 | >>> + LAPIC_DELIVERY_MODE_MASK)) | >>> + (LAPIC_LVT_REMOTE_IRR | LAPIC_SEND_PENDING | >>> + LAPIC_DELIVERY_MODE_EXTINT)); >>> + lapic_write_around(LAPIC_LVT1, (lapic_read_around(LAPIC_LVT1) & >>> + ~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER | >>> + LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY | >>> + LAPIC_SEND_PENDING | LAPIC_LVT_RESERVED_1 | >>> + LAPIC_DELIVERY_MODE_MASK)) | >>> + (LAPIC_LVT_REMOTE_IRR | LAPIC_SEND_PENDING | >>> + LAPIC_DELIVERY_MODE_NMI)); >>> + >>> + debug("apic_id: 0x%02lx, ", lapicid()); >>> +#else /* !NEED_LLAPIC */ >>> + /* Only Pentium Pro and later have those MSR stuff */ >>> + msr_t msr; >>> + >>> + debug("Disabling local apic:"); >>> + >>> + msr = msr_read(LAPIC_BASE_MSR); >>> + msr.lo &= ~LAPIC_BASE_MSR_ENABLE; >>> + msr_write(LAPIC_BASE_MSR, msr); >> >> Seems you missed my previous comments about replacing above with >> disable_lapic() which is defined in lapic.h. > > No, it is there. This function calls enable_lapic() then does some > other things too.
Where is it? You are saying enable_lapic()? But here is the disable_lapic(). Regards, Bin _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot