mkimage -T mxs now support new flag in config file:
DISPLAYPROGRESS - makes boot process print HTLLC characters for each BootROM
instruction.
Signed-off-by: Alexey Ignatov
---
arch/arm/cpu/arm926ejs/mxs/mxsimage-signed.cfg | 1 +
arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg | 1 +
arch/arm/c
On 12/10/2014 05:04, Fabio Estevam wrote:
> On Sat, Oct 11, 2014 at 11:21 AM, Sean Cross wrote:
>
>>> Ok, understood. Just curious: which Ethernet PHY is used on the novena
>>> board?
>> It's the same Micrel PHY used on the Sabrelite, the KSZ9021.
> nitrogen/sabrelite holds Ethernet PHY reset low
On Sat, Oct 11, 2014 at 11:58 PM, Ian Campbell wrote:
> On Tue, 2014-10-07 at 15:11 +0800, Chen-Yu Tsai wrote:
>> The basic blocks of the A23 are similar to the A31 (sun6i). Re-use
>> sun6i code for initial clock, gpio, and uart setup.
>
> Do I take it that sun8i is also in the same position wrt D
On Sat, Oct 11, 2014 at 11:33 PM, Ian Campbell wrote:
> On Sat, 2014-10-04 at 20:37 +0800, Chen-Yu Tsai wrote:
>> +#else /* CONFIG_SUN6I || CONFIG_SUN8I || .. */
>> + static const struct sunxi_wdog *wdog =
>> + ((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog;
>> +
>> + /* S
On Saturday, October 11, 2014 at 11:43:30 PM, Alexey Ignatov wrote:
> mkimage -T mxs now support new flag in config file:
> DISPLAYPROGRESS - makes boot process print HTLLC characters for each
> BootROM instruction.
>
> Signed-off-by: Alexey Ignatov
Acked-by: Marek Vasut
Best regards,
Marek Va
Hi Andreas,
On Fri, 10 Oct 2014 22:00:31 +0200, Andreas Bießmann
wrote:
> Dear Albert Aribaud,
>
> please pull these changes into u-boot-arm/master. They are two generic board
> conversions which are trivial and a fix for gigabit ethernet on sama5d3xek.
>
> The following changes since commit e
The patch below failed to define the variable, so define it
to make it consistent with M53EVK.
commit a428ac914b2b6db851c1feac98622f2d9844db45
Author: Lothar Rubusch
Date: Thu Jun 26 11:01:29 2014 +0200
ARM: m28evk: Update default environment
Signed-off-by: Marek Vasut
Cc: Tom Rini
Cc:
On Sat, Oct 11, 2014 at 11:21 AM, Sean Cross wrote:
>> Ok, understood. Just curious: which Ethernet PHY is used on the novena board?
> It's the same Micrel PHY used on the Sabrelite, the KSZ9021.
nitrogen/sabrelite holds Ethernet PHY reset low for 10ms, which is in
accordance with ksz9021 datash
On Sat, Oct 11, 2014 at 3:43 PM, Marek Vasut wrote:
> Are you positive it is possible to completely fix the PCI on MX6 ? What is the
I don't see the hang with that patch applied. Do you?
Regards,
Fabio Estevam
___
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U-Boot@lists.den
Hi Masahiro,
On Sun, 12 Oct 2014 02:04:36 +0900, Masahiro YAMADA
wrote:
> Hi Albert,
>
> 2014-10-11 17:56 GMT+09:00 Albert ARIBAUD :
> > Hi Masahiro,
> >
> > On Thu, 25 Sep 2014 18:19:07 +0900, Masahiro Yamada
> > wrote:
> >
> >> CONFIG_TPL should not be enabled for boards that do not have TPL
On Saturday, October 11, 2014 at 03:44:06 AM, Fabio Estevam wrote:
> On Fri, Oct 10, 2014 at 10:14 PM, Marek Vasut wrote:
> > +/* PCI express */
> > +#undef CONFIG_CMD_PCI /* Disable to prevent Linux from hanging on MX6
> > */
>
> This has been fixed recently by this commit:
>
> https://git.ker
On Saturday, October 11, 2014 at 01:36:53 AM, Albert ARIBAUD wrote:
> Hi Marek,
Hi Albert,
> On Sat, 11 Oct 2014 01:11:46 +0200, Marek Vasut wrote:
> > The following changes since commit db67801bf92f7fae6131dbc0d387131698fb9490:
> > Merge branch 'master' of git://git.denx.de/u-boot-nand-flash
Hi Jagan,
On 11 October 2014 12:06, Jagan Teki wrote:
> Hi Simon,
>
> On 11 October 2014 23:13, Simon Glass wrote:
>> Hi Jagan,
>>
>> On 11 October 2014 11:33, Jagan Teki wrote:
>>> Hi Simon,
>>>
>>> On 11 October 2014 04:56, Simon Glass wrote:
Hi Jagan,
On 10 October 2014 12:37
On 30 September 2014 01:04, Simon Glass wrote:
> Up until now driver model has not been used for any type of bus. Buses
> have some unique properties and needs, so we cannot claim that driver
> model can cover all the common cases unless we have converted a bus over
> to driver model.
>
> SPI is a
Hi Marek,
2014-10-07 21:45 GMT+09:00 Marek Vasut :
> Hey,
>
> given that we now have most of the u-boot socfpga stuff in mainline, I decided
> it would be a good idea to list what we're still missing and we should also
> decide how to move on now.
Can you refactor
arch/arm/include/asm/spl.h and
Hi Simon,
On 11 October 2014 23:13, Simon Glass wrote:
> Hi Jagan,
>
> On 11 October 2014 11:33, Jagan Teki wrote:
>> Hi Simon,
>>
>> On 11 October 2014 04:56, Simon Glass wrote:
>>> Hi Jagan,
>>>
>>> On 10 October 2014 12:37, Jagan Teki wrote:
Hi Simon,
On 10 October 2014 23:35
Hi Jagan,
On 11 October 2014 11:33, Jagan Teki wrote:
> Hi Simon,
>
> On 11 October 2014 04:56, Simon Glass wrote:
>> Hi Jagan,
>>
>> On 10 October 2014 12:37, Jagan Teki wrote:
>>> Hi Simon,
>>>
>>> On 10 October 2014 23:35, Simon Glass wrote:
Hi Jagan,
On 10 October 2014 11:31
Hi Simon,
On 11 October 2014 04:56, Simon Glass wrote:
> Hi Jagan,
>
> On 10 October 2014 12:37, Jagan Teki wrote:
>> Hi Simon,
>>
>> On 10 October 2014 23:35, Simon Glass wrote:
>>> Hi Jagan,
>>>
>>> On 10 October 2014 11:31, Jagan Teki wrote:
Hi Simon,
Can you please see my co
Hi Albert,
2014-10-11 17:56 GMT+09:00 Albert ARIBAUD :
> Hi Masahiro,
>
> On Thu, 25 Sep 2014 18:19:07 +0900, Masahiro Yamada
> wrote:
>
>> CONFIG_TPL should not be enabled for boards that do not have TPL.
>> CONFIG_SUPPORT_TPL introduced by this commit should be "select"ed
>> by boards with TPL
Add buffer reading code, should make the IO a little faster.
Signed-off-by: Marek Vasut
Cc: Kyungmin Park
Cc: Lukasz Majewski
Cc: Minkyu Kang
Cc: Scott Wood
Cc: Vladimir Zapolskiy
---
drivers/mtd/nand/s3c2410_nand.c | 37 +
1 file changed, 37 insertions(+
Merge struct s3c2410_nand and struct s3c2440_nand into one unified
struct s3c24x0_nand. While at it, fix up and rename the functions
to retrieve the NAND base address and fix up the s3c NAND driver to
reflect this change.
Signed-off-by: Marek Vasut
Cc: Kyungmin Park
Cc: Lukasz Majewski
Cc: Mink
Add support for S3C2440 into the NAND driver by filling in the
S3C2440 bits and differences.
Signed-off-by: Marek Vasut
Cc: Kyungmin Park
Cc: Lukasz Majewski
Cc: Minkyu Kang
Cc: Scott Wood
Cc: Vladimir Zapolskiy
---
drivers/mtd/nand/s3c2410_nand.c | 55 --
Implant a missing ECC correction implementation and select_chip
implementation from Linux.
Signed-off-by: Marek Vasut
Cc: Kyungmin Park
Cc: Lukasz Majewski
Cc: Minkyu Kang
Cc: Scott Wood
Cc: Vladimir Zapolskiy
---
drivers/mtd/nand/s3c2410_nand.c | 89 ++--
Make sure to keep the MAC address programmed in the SMC911x ADDRH
and ADDRL registers. Linux can read those registers to determine
the MAC address on EEPROM-less configurations.
Signed-off-by: Marek Vasut
Cc: Joe Hershberger
Cc: Tom Rini
---
drivers/net/smc911x.c | 1 +
1 file changed, 1 inser
The GPIO driver didn't correctly compute the bank offset
from the GPIO number and caused random writes into the
GPIO block address space. Fix the driver so it actually
does the writes correctly. While at it, make use of the
clrsetbits_le32() mechanisms.
Signed-off-by: Marek Vasut
Cc: Kyungmin Par
The correct name of this symbol is CONFIG_S3C2410_NAND_HWECC , the
_SYS is redundant.
Signed-off-by: Marek Vasut
Cc: Kyungmin Park
Cc: Lukasz Majewski
Cc: Minkyu Kang
Cc: Scott Wood
Cc: Vladimir Zapolskiy
---
include/configs/VCMA9.h| 2 +-
include/configs/smdk2410.h | 2 +-
2 files chan
This is a matter of simple additional ifdefery to cater
for the different register layout of the S3C2440 chip.
Signed-off-by: Marek Vasut
Cc: Heiko Schocher
Cc: Kyungmin Park
Cc: Lukasz Majewski
Cc: Minkyu Kang
Cc: Vladimir Zapolskiy
---
drivers/i2c/s3c24x0_i2c.c | 10 +-
1 file cha
Add basic framebuffer driver for the S3C24xx family of CPUs.
Signed-off-by: Marek Vasut
Cc: Anatolij Gustschin
Cc: Kyungmin Park
Cc: Lukasz Majewski
Cc: Minkyu Kang
Cc: Vladimir Zapolskiy
V2: Keep the Makefile sorted.
---
drivers/video/Makefile | 1 +
drivers/video/cfb_console.c |
Printing u32 with %02x is just a bad idea, fix it.
Signed-off-by: Marek Vasut
Cc: Kyungmin Park
Cc: Lukasz Majewski
Cc: Minkyu Kang
Cc: Scott Wood
Cc: Vladimir Zapolskiy
---
drivers/mtd/nand/s3c2410_nand.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/
On Friday, October 10, 2014 at 11:16:05 PM, Maxime Hadjinlian wrote:
> Hi all,
Hi!
[...]
> >> +CC Altera guys, they might help too.
> >
> > Hmmm quite strange to write for sector aligned.
> > Wonder the write related to filesystem access?
> >
> > Within Cadence QSPI controller, read and wr
On 2014-10-11 12:27, Albert ARIBAUD wrote:
Hi Albert,
On Fri, 19 Sep 2014 18:04:14 +0200, Albert ARIBAUD
wrote:
Hi Marc,
On Thu, 18 Sep 2014 16:28:52 +0100, Marc Zyngier
wrote:
> On Thu, Sep 18 2014 at 10:12:17 AM, Albert ARIBAUD
wrote:
> > Hi Arnab,
> >
> > On Thu, 28 Aug 2014 01:59:
On Tue, 2014-10-07 at 15:11 +0800, Chen-Yu Tsai wrote:
> Ippo q8h is a series of A23 tablet boards. This defconfig
> is for v5 of these boards, though for u-boot purposes they
> are mostly the same.
Any differences worth mentioning?
> See: http://linux-sunxi.org/Ippo_q8h
BTW, this says "The port
On Tue, 2014-10-07 at 15:11 +0800, Chen-Yu Tsai wrote:
> The A23 only has UART0 muxed with MMC0. Some of the boards we
> encountered expose R_UART as a set of pads.
>
> Add support for R_UART so we can have a console while using mmc.
I suppose R_UART is the h/w doc name. UARTR would fit the code
On Sat, 2014-10-11 at 17:11 +0100, Ian Campbell wrote:
> On Tue, 2014-10-07 at 15:11 +0800, Chen-Yu Tsai wrote:
> > The prcm apb0 controls multiple modules. Allow specifying which
> > modules to enable clocks and de-assert resets so the function
> > can be reused.
>
> How come this isn't actually
On Tue, 2014-10-07 at 15:11 +0800, Chen-Yu Tsai wrote:
> The prcm apb0 controls multiple modules. Allow specifying which
> modules to enable clocks and de-assert resets so the function
> can be reused.
How come this isn't actually called on sun6i?
(naughty of me not to notice this when it was sub
On Tue, 2014-10-07 at 15:11 +0800, Chen-Yu Tsai wrote:
> From: Hans de Goede
>
> The A31, A23 and later SoCs have an extra pin controller, called CPUs_PIO
> or R_PIO, which handles pin banks L and beyond.
Does it also have enough space for 9 banks? Since you overlay a struct
sunxi_gpio_reg on it
On Tue, 2014-10-07 at 15:11 +0800, Chen-Yu Tsai wrote:
> The basic blocks of the A23 are similar to the A31 (sun6i). Re-use
> sun6i code for initial clock, gpio, and uart setup.
Do I take it that sun8i is also in the same position wrt DRAM bring up
code not existing yet and there therefore being n
On Tue, 2014-10-07 at 15:11 +0800, Chen-Yu Tsai wrote:
> The Allwinner A23 SoC has reset controls like the A31 (sun6i).
> The FIFO address is also the same as sun6i.
>
> Re-use code added for sun6i.
>
> Signed-off-by: Chen-Yu Tsai
Acked-by: Ian Campbell
> ---
> arch/arm/include/asm/arch-sunx
On Tue, 2014-10-07 at 15:11 +0800, Chen-Yu Tsai wrote:
> Allwinner SoCs provide uart0 muxed with mmc0, which can then be used
> with a micro SD breakout board. On the A23, this is the only way to
> use uart0.
>
> Signed-off-by: Chen-Yu Tsai
Acked-by: Ian Campbell
> ---
> arch/arm/cpu/armv7/su
On Tue, 2014-10-07 at 15:11 +0800, Chen-Yu Tsai wrote:
> UART0 pin muxes on the A23 have a different function value.
>
> Signed-off-by: Chen-Yu Tsai
Sigh, why can't silicon folks resist fiddling with stuff ;-)
Acked-by: Ian Campbell
> ---
> arch/arm/include/asm/arch-sunxi/gpio.h | 6 ++
>
On Tue, 2014-10-07 at 15:11 +0800, Chen-Yu Tsai wrote:
> BOOT_TARGET_DEVICES includes MMC unconditionally. This breaks when
> CONFIG_CMD_MMC is not defined. Use a secondary macro to conditionally
> include it when CONFIG_MMC is enabled, as we do for CONFIG_AHCI.
>
> This is used when we want to us
On Mon, 2014-10-06 at 19:57 +0200, Hans de Goede wrote:
> Enable the second sdcard slot found on some boards. Note that we do not
> set CONFIG_MMC_SUNXI_SLOT_EXTRA for the SPL, as having it there is not useful,
>
> Except for on the Mele-M3 where the second sdcard is an eMMC, from which the
> devi
On Mon, 2014-10-06 at 19:57 +0200, Hans de Goede wrote:
> None of the known sunxi devices actually use mmc1 routed through PH, where
> as some devices do actually use mmc1 routed through PG, so change the routing
> of mmc1 to PG. If in the future we encounter devices with mmc1 routed through
> PH,
On Mon, 2014-10-06 at 19:57 +0200, Hans de Goede wrote:
> @@ -108,11 +109,31 @@ static void mmc_pinmux_setup(int sdc)
>
> int board_mmc_init(bd_t *bis)
> {
> + __maybe_unused struct mmc *mmc0, *mmc1;
> + __maybe_unused char buf[512];
> +
> mmc_pinmux_setup(CONFIG_MMC_SUNXI_SLOT);
On Mon, 2014-10-06 at 19:57 +0200, Hans de Goede wrote:
> Note we also drop the SPL check for initializing the 2nd mmc slot, the SPL
> check is not necessary with Kconfig, because only options explicitly marked
> as also being for the SPL get set during SPL builds.
>
> Signed-off-by: Hans de Goede
On Mon, 2014-10-06 at 19:57 +0200, Hans de Goede wrote:
> Signed-off-by: Hans de Goede
I presume that adding GPIO support to SPL isn't a problem size wise?
> ---
> board/sunxi/Kconfig| 26 ++
> drivers/mmc/sunxi_mmc.c| 21 +
> incl
On Sat, 2014-10-04 at 20:37 +0800, Chen-Yu Tsai wrote:
> +#else /* CONFIG_SUN6I || CONFIG_SUN8I || .. */
> + static const struct sunxi_wdog *wdog =
> + ((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog;
> +
> + /* Set the watchdog for its shortest interval (.5s) and wait */
>
On Sat, 2014-10-04 at 20:37 +0800, Chen-Yu Tsai wrote:
> The RTC hardware has been moved out of the timer block on sun6i/sun8i.
> In addition, there are more watchdogs available.
>
> Also note that the timer block definition is not completely accurate
> for sun5i/sun7i. Various blocks are missing
On Sat, 2014-10-04 at 20:37 +0800, Chen-Yu Tsai wrote:
> On later Allwinner SoCs, the watchdog hardware is by all means a
> separate hardware block, with its own address range and interrupt
> line.
>
> Move the register definitions to a separate file to facilitate
> supporting newer SoCs.
>
> Sig
Dear Jeroen,
In message <20141011150346.150c0383...@gemini.denx.de> i wrote:
>
> Which is "better"? A is obviously much shorter and more elegant; but
> B is much more robust - A will happily crash your system when you try
> to print a string like "s%s%s%s%s%s%s%s%s%s%s" (not to mention that
> th
Dear Jeroen,
In message <54384450.3000...@myspectrum.nl> you wrote:
>
> If you ask to disable it, it is good if it does so, don't see a problem
> with that. Anyway, it is not an u-boot issue, anything below -O2 is not
> supported anyway.
I'm not sure what you mean here. Gcc certainly does this
Dear Jeroen,
In message <5437e778.3050...@myspectrum.nl> you wrote:
>
> calling printf("%s\n", "string") gets translated into puts by the
> compiler. There should be no difference in the binary.
Interesting, I didn't know that. Is this somewhere documented?
Is there any comprehensive list of s
On 11/10/2014 21:56, Fabio Estevam wrote:
> Hi Nikolay,
>
> On Sat, Oct 11, 2014 at 2:01 AM, Nikolay Dimitrov wrote:
>
>> We had some discussions about the PHY reset sequence and timing, but still
>> not a common opinion, so I suggested to leave this fix for a consequent
>> patch.
> Ok, understood
Hi Nikolay,
On Sat, Oct 11, 2014 at 2:01 AM, Nikolay Dimitrov wrote:
> We had some discussions about the PHY reset sequence and timing, but still
> not a common opinion, so I suggested to leave this fix for a consequent
> patch.
Ok, understood. Just curious: which Ethernet PHY is used on the no
On Sat, Oct 11, 2014 at 02:38:24AM +0200, Albert ARIBAUD wrote:
> Hi Tom,
>
> The following changes since commit
> db67801bf92f7fae6131dbc0d387131698fb9490:
>
> Merge branch 'master' of git://git.denx.de/u-boot-nand-flash
> (2014-10-10 09:45:16 -0400)
>
> are available in the git repository
On Tue, Oct 07, 2014 at 10:42:27PM +0200, Jeroen Hofstee wrote:
> Commit 832472 "tools: socfpga: Add socfpga preloader signing
> to mkimage" added tools/socfpga.c which relies on htole32,
> le32toh and friends. While compiler.h includes these protypes
> for linux from endian.h, it doesn't do so fo
Hi Huan,
On Wed, 8 Oct 2014 09:53:03 +, Huan Wang
wrote:
> Hi, Albert,
>
> > On Thu, 25 Sep 2014 06:45:00 +, Huan Wang
> > wrote:
> >
> > > Hi, Albert,
> > >
> > > > On Mon, 22 Sep 2014 06:46:20 +, Huan Wang
> > > > wrote:
> > > >
> > > > > Hi, Albert,
> > > > >
> > > > > > > On
Hi Albert,
On Fri, 19 Sep 2014 18:04:14 +0200, Albert ARIBAUD
wrote:
> Hi Marc,
>
> On Thu, 18 Sep 2014 16:28:52 +0100, Marc Zyngier
> wrote:
>
> > On Thu, Sep 18 2014 at 10:12:17 AM, Albert ARIBAUD
> > wrote:
> > > Hi Arnab,
> > >
> > > On Thu, 28 Aug 2014 01:59:57 +0530, Arnab Basu
> > >
Hi Eric,
On Tue, 30 Sep 2014 15:40:01 -0700, Eric Nelson
wrote:
> Without preceding declarations, "make C=1" generates
> "Should it be static?" warnings for symbols
> do_bootm_linux,
> boot_prep_vxworks, and
> boot_jump_vxworks
>
> Include of bootm.h also identified a signatur
Hi Georges,
On Sat, 27 Sep 2014 21:48:10 +0200, Georges Savoundararadj
wrote:
> This commit relocates the exception vectors.
> As ARM1176 and ARMv7 have the security extensions, it uses VBAR. For
> the other ARM processors, it copies the relocated exception vectors to
> the correct address: 0x0
Hi Masahiro,
On Thu, 25 Sep 2014 18:19:07 +0900, Masahiro Yamada
wrote:
> CONFIG_TPL should not be enabled for boards that do not have TPL.
> CONFIG_SUPPORT_TPL introduced by this commit should be "select"ed
> by boards with TPL support and CONFIG_TPL should depend on it.
Actually, I see no CON
Hi Marek,
On Sat, 11 Oct 2014 01:11:46 +0200, Marek Vasut wrote:
> The following changes since commit db67801bf92f7fae6131dbc0d387131698fb9490:
>
> Merge branch 'master' of git://git.denx.de/u-boot-nand-flash (2014-10-10
> 09:45:16 -0400)
>
> are available in the git repository at:
>
>
>
Enter 3 Byte address mode at first, because it may change to 4 Byte
address mode in kernel driver and not reset to 3 Byte address mode
after reboot.
Add clear flag status register operation that some Micron SPI flash
chips required after reading the flag status register to check some
operations co
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