Hello Tom,
please pull from u-boot-i2c.git, thanks!
The following changes since commit 8854070784450f7ade382c5792b2721fbe27315a:
Merge branch 'master' of git://www.denx.de/git/u-boot-arc (2014-04-25
15:08:43 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-i2c.git
Hi,
On 04/29/14 07:14, Eric Nelson wrote:
> Hi Tim,
>
> On 04/28/2014 01:17 PM, Tim Harvey wrote:
>> Add a common header which can hopefully be shared amon imx6 SPL users
>>
>> Signed-off-by: Tim Harvey
>> ---
>> v2:
>> - adjust CONFIG_SPL_TEXT_BASE, CONFIG_SPL_STACK and CONFIG_SPL_MAX_SIZE
>>
Hello Andrey,
Am 27.04.2014 03:14, schrieb Andrey Danin:
Signed-off-by: Andrey Danin
CC: Stephen Warren
CC: Marc Dietrich
CC: Julian Andres Klode
CC: ac...@lists.launchpad.net
---
Changes for v2:
- NVEC driver was reworked to use tegra-i2c
arch/arm/include/asm/arch-tegra/tegra_nvec.
Hello Andrey,
Am 27.04.2014 03:14, schrieb Andrey Danin:
Signed-off-by: Andrey Danin
CC: Stephen Warren
CC: Marc Dietrich
CC: Julian Andres Klode
CC: ac...@lists.launchpad.net
---
arch/arm/include/asm/arch-tegra/tegra_i2c.h |6 +
drivers/i2c/tegra_i2c.c | 199
Hello Andrey,
Am 27.04.2014 03:14, schrieb Andrey Danin:
Signed-off-by: Andrey Danin
CC: Stephen Warren
CC: Marc Dietrich
CC: Julian Andres Klode
CC: ac...@lists.launchpad.net
---
drivers/i2c/i2c_core.c | 13 +
include/i2c.h | 30 +-
2 fil
From: Fabio Estevam
Currently we get the following failure when trying to build a uImage for
extensa:
$ ./tools/mkimage -A xtensa
Invalid CPU Type - valid names are: alpha, arm, x86, ia64, m68k, microblaze,
mips, mips64, nios2, powerpc, ppc, s390, sh, sparc, sparc64, blackfin, avr32,
nds32, or
Hi Tim,
On 04/28/2014 01:17 PM, Tim Harvey wrote:
Add a common spl.c file to support boot device functions needed for SPL
such as detecting the boot device.
>
diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c
new file mode 100644
index 000..5c1667c
--- /dev/null
+++ b/ar
Hi Tim,
On 04/28/2014 01:17 PM, Tim Harvey wrote:
Add a common header which can hopefully be shared amon imx6 SPL users
Signed-off-by: Tim Harvey
---
v2:
- adjust CONFIG_SPL_TEXT_BASE, CONFIG_SPL_STACK and CONFIG_SPL_MAX_SIZE
to accomodate the IMX6SOLO/DUALLITE which have half the iRAM of t
Dear, All.
Did you have any comment?
Best Regards,
Jaehoon Chung
On 04/11/2014 02:55 PM, Jaehoon Chung wrote:
> If card and host are supported DDR mode, then it can be used the DDR mode.
> This patch-set has dependency about beomho's patch-set.
> (Based-on u-boot-samsung repository)
>
> It's r
On Mon, Apr 28, 2014 at 9:27 PM, Otavio Salvador
wrote:
> On Mon, Apr 28, 2014 at 9:14 PM, Fabio Estevam wrote:
>> On Mon, Apr 28, 2014 at 8:40 PM, Otavio Salvador
>> wrote:
#define PAD_CTL_HYS(1 << 16)
+#define PAD_CTL_LVE(1 << 17)
+#define PAD_CTL_LVE_BI
On Mon, Apr 28, 2014 at 9:14 PM, Fabio Estevam wrote:
> On Mon, Apr 28, 2014 at 8:40 PM, Otavio Salvador
> wrote:
>>> #define PAD_CTL_HYS(1 << 16)
>>> +#define PAD_CTL_LVE(1 << 17)
>>> +#define PAD_CTL_LVE_BIT(1 << 22)
>>
>> This conflicts with:
>>
>> #def
On Mon, Apr 28, 2014 at 8:40 PM, Otavio Salvador
wrote:
>> #define PAD_CTL_HYS(1 << 16)
>> +#define PAD_CTL_LVE(1 << 17)
>> +#define PAD_CTL_LVE_BIT(1 << 22)
>
> This conflicts with:
>
> #define NO_PAD_CTRL (1 << 17)
Correct, I missed the NO_PAD_CTRL defin
On Mon, Apr 28, 2014 at 8:11 PM, Fabio Estevam wrote:
> From: Fabio Estevam
>
> On mx6sl there is a LVE (Low Voltage Enable) in the IOMUXC_SW_PAD_CTL
> register.
>
> LVE is bit 22 of IOMUXC_SW_PAD_CTL register, but in order to make the
> calculation easier we can define it as bit 17 as this bit
On 04/26/2014 07:14 PM, Andrey Danin wrote:
> Signed-off-by: Andrey Danin
> CC: Stephen Warren
> CC: Marc Dietrich
> CC: Julian Andres Klode
> CC: ac...@lists.launchpad.net
> ---
> Changes for v2:
> - fixed incorrect keys handling in nvec-keyboard driver
No patch description?
Something
From: Fabio Estevam
On mx6sl there is a LVE (Low Voltage Enable) in the IOMUXC_SW_PAD_CTL register.
LVE is bit 22 of IOMUXC_SW_PAD_CTL register, but in order to make the
calculation easier we can define it as bit 17 as this bit is unused and fits the
current MUX_PAD_CTRL_MASK mask.
Add support
On 04/26/2014 07:14 PM, Andrey Danin wrote:
> Signed-off-by: Andrey Danin
> CC: Stephen Warren
> CC: Marc Dietrich
> CC: Julian Andres Klode
> CC: ac...@lists.launchpad.net
Don't you want to CC the I2C maintainer, Heiko Schocher , on
this series?
___
On 04/26/2014 07:14 PM, Andrey Danin wrote:
This patch isn't adding DT bindings for NVEC, but rather add DT nodes.
The binding is the schema, not the content.
We need a DT binding document that's been reviewed by the DT binding
maintainers. Can you please first submit a patch to the Linux kernel
The return value has not been checked by its caller, until recent change
of using generic board architecture. The error of this function is not
critical enough to hang the system. Printing the warning message is enough
to catch user's attention. U-boot should continue to boot to give user
a chance
This patch converts the following boards to use generic board: MPC8536DS,
MPC8572DS, MPC8641HPCN, p1_p2_rdb_pc, corenet_ds, t4qds, B4860QDS. It has
been tested on NOR boot on MPC8536DS, MPC8572DS, P1021RDB, P4080DS,
P5020DS, P5040DS, P3041DS, T4240QDS, B4860QDS.
Signed-off-by: York Sun
CC: Ying Z
The pointer of device tree comes from r3 for QEMU. This is not the case
for normal SoCs out of reset. Having gd->fdt_blob as 0 is important for
other functions to detect the non-existence of device tree.
Signed-off-by: York Sun
CC: Alexander Graf
---
arch/powerpc/cpu/mpc85xx/cpu_init_early.c |
baord_init_f takes one argument. It has not been used for powerpc, until
recently changing to use generic board architecture.
Signed-off-by: York Sun
---
arch/powerpc/cpu/mpc85xx/start.S |1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mp
For powerpc SoCs, the initial gd is in INIT_RAM, in most cases, resideing
in locked D-cache. At the time the function baord_inti_f() runs, no other
RAM is available as a stack. This technique has been used in
arch/powerpc/lib/board.c and should be added to generic board for powerpc.
Signed-off-by:
DRAM size should use 64-bit variable when the size could be more than 4GB.
Caught and verified on P4080DS with 4GB DDR.
Signed-off-by: York Sun
---
common/board_f.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/common/board_f.c b/common/board_f.c
index 3a00b92..954605b 1
On Monday, April 28, 2014 at 09:55:46 PM, Ian Campbell wrote:
> On Sat, 2014-04-26 at 20:27 +0200, Marek Vasut wrote:
> > On Saturday, April 19, 2014 at 03:30:14 PM, Ian Campbell wrote:
> > > On Sun, 2014-04-13 at 23:45 -0400, Shixin Zeng wrote:
> > > > Hi,
> > > >
> > > > I compiled the current u
From: Stephen Warren
Allow ci_udc.o to be built when using the new(?) USB gadget framework,
as enabled by CONFIG_USB_GADGET.
Note that this duplicates the Makefile entry for ci_udc.o, since it's
also included inside #ifdef CONFIG_USB_ETHER. I'm not sure what that
define means; perhaps an old sty
On 04/28/2014 02:27 PM, Alexander Graf wrote:
>> I am thinking to add back "#ifdef CONFIG_QEMU_E500" you had for your v3 and
>> earlier version for the above change. Do you have any concerns?
>>
>> The reason I am proposing this is to use generic board architecture.
>> gd->fdt_blob is used by some
> Am 28.04.2014 um 20:40 schrieb York Sun :
>
>> On 02/20/2014 04:52 AM, Alexander Graf wrote:
>> For KVM we have a special PV machine type called "ppce500". This machine
>> is inspired by the MPC8544DS board, but implements a lot less features
>> than that one.
>>
>> It also provides more PCI
Hi,
>>> On 29/4/2014 at 05:01 AM, "Jean-Pierre TOSONI" wrote:
> Hello Chris,
>
> I am looking for IPv6 support in U-Boot. I saw that you made some work
> about it last year.
>
> Did you obtain a working IPv6 ? Is it available somewhere ?
>
I've got it to a point where it is possible to proce
From: Masahiro Yamada
arch/arm/include/asm/spl.h requires all SoCs to have
arch/arm/include/asm/arch-*/spl.h.
But many of them just define BOOT_DEVICE_* macros.
Those macros are used in the "switch (boot_device) { ... }"
statement in common/spl/spl.c.
So they should not be archtecture specific
Dear Masahiro,
In message <20140428185854.b2b8.aa925...@jp.panasonic.com> you wrote:
>
> Before I send Kconfig series v2,
> please let me cofirm our approach of maintainers info.
Thanks for all your patience when dealing with all these apparently
simple things that nevertheless take so much time
Hi Marek,
On Mon, 2014-04-28 at 07:55 +0200, Marek Vasut wrote:
> On Monday, April 28, 2014 at 07:51:49 AM, Chen-Yu Tsai wrote:
> > On Mon, Apr 28, 2014 at 2:08 AM, Marek Vasut wrote:
> > > On Sunday, April 27, 2014 at 05:29:29 PM, Chen-Yu Tsai wrote:
> > >> On Sun, Apr 27, 2014 at 11:25 PM, Ian
Switch to an SPL image. The SPL for Ventana does the following:
- setup i2c and read the factory programmed EEPROM to obtain DRAM config
and model for board-specific calibration data
- configure DRAM per CPU/size/layout/devices/calibration
- load u-boot.img from NAND or MTD depending on boot
Add new function that can take an array of iomux configs, an index, and
a stride to allow a multi-dimentional array of pinmux values to be used
to define pinmux values per cpu-type.
This takes a different approach to previously proposed solutions which used
multiple arrays of pad lists. The goal i
use the new iomux function and a macros to create a multi-dimensional array
of iomux values without duplicating the defintions.
Signed-off-by: Tim Harvey
---
v2:
- use macros that have been moved to iomux-v3.h
---
board/gateworks/gw_ventana/gw_ventana.c | 493
1
Split the read_eeprom function out so that it can be shared (ie with SPL)
Signed-off-by: Tim Harvey
---
board/gateworks/gw_ventana/Makefile | 2 +-
board/gateworks/gw_ventana/eeprom.c | 89 +
board/gateworks/gw_ventana/gw_ventana.c | 89 +-
Add functions for configuring MMDC iomux and configuration based on
board-specific configurations.
Signed-off-by: Tim Harvey
---
v2:
- split out mmdc and iomux structs into separate patch
---
arch/arm/cpu/armv7/mx6/Makefile | 1 +
arch/arm/cpu/armv7/mx6/ddr.c| 469
Add a common spl.c file to support boot device functions needed for SPL
such as detecting the boot device.
Signed-off-by: Tim Harvey
---
v2:
- re-base on top of Masahiro Yamada's consolidation patch:
http://patchwork.ozlabs.org/patch/341817/
- moved spl_boot_device() and get_boot_mode() into ow
Add comment block for the imx_ddr_size function and remove the extra unused
fields from struct esd_mmdc_regs which are also not common between IMX53 and
IMX6. There are no functional changes here.
Signed-off-by: Tim Harvey
---
arch/arm/imx-common/cpu.c | 16 +++-
1 file changed, 7 in
Add memory-mapped structures for MMDC iomux and configuration. Note that while
the MMDC configuration registers are common between the IMX6DQ
(IMX6DUAL/IMX6QUAD) and IMX6SDL (IMX6SOLO/IMX6DUALLITE) types the iomux
registers differ. This requires two sets of structures.
Add structures to describe D
Add a common header which can hopefully be shared amon imx6 SPL users
Signed-off-by: Tim Harvey
---
v2:
- adjust CONFIG_SPL_TEXT_BASE, CONFIG_SPL_STACK and CONFIG_SPL_MAX_SIZE
to accomodate the IMX6SOLO/DUALLITE which have half the iRAM of the
IMX6DUAL/IMX6QUAD
---
include/configs/imx6_spl.h
This utilizes existing mxs_nand support layer to provide a method to load an
image off nand for SPL. The flash device will be detected in order to support
multiple flash devices instead of having layout hard coded at build time.
Cc: Scott Wood
Signed-off-by: Tim Harvey
---
v2:
- remove dependenc
We only need to read in the size of struct image_header and thus don't
need to know the page size of the nand device.
Cc: Scott Wood
Signed-off-by: Tim Harvey
Acked-by: Stefano Babic
Acked-by: Scott Wood
---
v2:
- cc Scott Wood on this
- Acked-by: Stefano Babic
- Acked-by: Scott Wood
---
This series adds some necessary framework for IMX6 SPL support. The series
includes support for NAND SPL and has been tested with MMC as well. I have
tested this on five differing Ventana baseboards with a variety of memory
(32bit 512MB, 32bit 1024MB, 64bit 1024MB) and CPU configurations (IMX6Q,
IM
On Sat, 2014-04-26 at 20:27 +0200, Marek Vasut wrote:
> On Saturday, April 19, 2014 at 03:30:14 PM, Ian Campbell wrote:
> > On Sun, 2014-04-13 at 23:45 -0400, Shixin Zeng wrote:
> > > Hi,
> > >
> > > I compiled the current u-boot from
> > > https://github.com/jwrdegoede/u-boot-sunxi.git for cubieb
This is required at least on ARM.
When sending instead of simply invalidating the entire descriptor, flush
as little as possible while still respecting ARCH_DMA_MINALIGN, as
requested by Alexey.
Signed-off-by: Ian Campbell
Cc: Alexey Brodkin
---
v2: - collapsed "net/designware: align cache inva
struct dw_eth_dev contains fields which are accessed via DMA, so make sure it
is aligned to a dma boundary. Without this I see:
ERROR: v7_dcache_inval_range - start address is not aligned - 0x7fb677e0
Signed-off-by: Ian Campbell
Reviewed-by: Alexey Brodkin
Acked-by: Marek Vasut
---
v2: Sign
On Mon, 2014-04-28 at 12:05 +, Alexey Brodkin wrote:
> And in this situation IMHO the only safe solution could be in proper
> design of data layout. In other words we need to keep independent data
> blocks aligned to cache line.
>
> And as you may see from "designware.h" buffer descriptor str
This sets up the linkage from the phydev back to the ethernet device. This
symptom of not doing this which I noticed was:
Waiting for PHY auto negotiation to complete
rather than:
dwmac.1c5 Waiting for PHY auto negotiation to complete
Signed-off-by: Ian Campbell
Cc: Alexey Br
Proper adjustment for supporting DFU at GONI target has been made.
The s5p_goni.h file has been updated. Moreover the code for low level
USB initialization has been added to GONI board code.
The malloc pool has been enlarged in order to support larger buffer
sizes needed by DFU implementation.
Si
Future patches will make DFU too large to fit in this board's SPL build.
Signed-off-by: Mateusz Zalega
Acked-by: Tom Rini
Reviewed-by: Lukasz Majewski
---
Changes since v2:
- none
---
include/configs/am335x_evm.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/configs/am335x_evm.
Previously offsets handled by dfu_fill_entity_mmc(), defined in boards'
CONFIG_DFU_ALT were treated as hexadecimal regardless of their prefix,
which sometimes led to confusion. This patch forces usage of explicit
numerical base prefixes.
Signed-off-by: Mateusz Zalega
Cc: Lukasz Majewski
Cc: Tom
When user attempted to perform a raw write using DFU (vide
dfu_fill_entity_mmc) with MMC interface not initialized before,
get_mmc_blk_size() reported invalid (zero) block size - it wasn't
possible to write ie. a new u-boot image.
This commit fixes that by initializing MMC device before use in
dfu
UMS-related defines were added to Samsung Goni config header.
Signed-off-by: Mateusz Zalega
Cc: Minkyu Kang
---
Changes since v1:
- reordered
---
include/configs/s5p_goni.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index c52a00
In cases when MMC hadn't been initialized before, ie. by the user or other
subsystem, it was still uninitialized while UMS media capacity check,
leading to broken ums command.
UMS has to initialize resources it uses.
Tested on Samsung Goni.
Signed-off-by: Mateusz Zalega
Tested-by: Mateusz Zaleg
Signed-off-by: Mateusz Zalega
Cc: Minkyu Kang
---
Changes since v1:
- reordered
---
include/configs/s5p_goni.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index f97b52d..c52a00a 100644
--- a/include/configs/s5p_goni.h
+++ b/inc
Configuration file for GONI has been updated to support FAT file system,
new mmc partitioning scheme and read linux kernel from eMMC instead of
OneNAND.
Signed-off-by: Arkadiusz Wlodarczyk
Signed-off-by: Kyungmin Park
Signed-off-by: Mateusz Zalega
Tested-by: Arkadiusz Wlodarczyk
Tested-by: Mat
Former usb_cable_connected() patch broke compilation of boards which do
not support this feature.
I've renamed usb_cable_connected() to g_dnl_usb_cable_connected() and added
its default implementation to gadget downloader driver code. There's
only one driver of this kind and it's unlikely there'll
Patchset contains fixes for:
* DFU write issues
* USB cable detection
* ums command
* U-Boot's base framework (headers)
* fixed base DFU offsets
and features:
* convenient USB Gadget registration
* Samsung Goni DFU, UMS, GPT bringup
also:
* am335x will no longer support DFU in SPL builds
There _ar
Preprocessor definitions and hardcoded implementation selection in
g_dnl core were replaced by a linker list made of (usb_function_name,
bind_callback) pairs.
Signed-off-by: Mateusz Zalega
Acked-by: Lukasz Majewski
Acked-by: Marek Vasut
---
Changes since v1:
- reordered
since v2:
- fixed coding
Structure definition used type block_dev_desc_t, defined in part.h, which
wasn't included in mmc.h. It worked only in circumstances when common.h,
or another header using part.h was incuded in implementation files.
Signed-off-by: Mateusz Zalega
Cc: Minkyu Kang
Cc: Pantelis Antoniou
---
Changes
Implementation made use of types defined in common.h, even though it
wasn't #included. It worked in circumstances when .c files included
every needed header (all).
Signed-off-by: Mateusz Zalega
Cc: Tom Rini
Cc: Minkyu Kang
---
Changes since v1:
- none
---
include/part.h | 1 +
1 file changed,
On 02/20/2014 04:52 AM, Alexander Graf wrote:
> For KVM we have a special PV machine type called "ppce500". This machine
> is inspired by the MPC8544DS board, but implements a lot less features
> than that one.
>
> It also provides more PCI slots and is supposed to be enumerated by
> device tree o
Hi Akshay,
On 04/28/2014 03:59 PM, Akshay Saraswat wrote:
Used a script to recheck/verify pin mapping and existing mapping
appears to be fine, returning correct bank and pin values.
Did ./MAKEALL -a arm and found all Exynos/S5P related boards
compiled successfully.
Couldn't test booting over all
On 04/28/2014 03:39 AM, Masahiro Yamada wrote:
> On Thu, 24 Apr 2014 14:36:33 -0600
> Stephen Warren wrote:
>>> diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig
>>> new file mode 100644
>>> index 000..88819b9
>>> --- /dev/null
>>> +++ b/configs/seaboard_defconfig
>>> @@ -0
On 23 April 2014 23:04, Masahiro Yamada wrote:
> CONFIG_SPL and CONFIG_TPL are defined in Kconfig.
>
> Remove the redundant definition in config headers.
>
> Signed-off-by: Masahiro Yamada
Reviewed-by: Simon Glass
___
U-Boot mailing list
U-Boot@lists.
On 23 April 2014 23:04, Masahiro Yamada wrote:
> mkconfig is no longer used in Kconfig.
>
> Signed-off-by: Masahiro Yamada
Reviewed-by: Simon Glass
___
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On 23 April 2014 23:04, Masahiro Yamada wrote:
> CONFIG_${ARCH} is defined by Kconfig.
>
> Signed-off-by: Masahiro Yamada
Reviewed-by: Simon Glass
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Hi Masahiro,
On 23 April 2014 20:14, Masahiro Yamada wrote:
> Hi Simon,
>
> On Wed, 23 Apr 2014 09:04:20 -0600
> Simon Glass wrote:
>
>> Hi Masahiro,
>>
>> On 21 April 2014 19:00, Masahiro Yamada wrote:
>> > Hi Simon,
>> >
>> >
>> > On Mon, 21 Apr 2014 15:02:20 -0600
>> > Simon Glass wrote:
>>
On 23 April 2014 23:04, Masahiro Yamada wrote:
> This commit enables Kconfig.
> Going forward, we use Kconfig for board configuration.
> mkconfig will never be used. Nor will include/config.mk be generated.
>
> Kconfig must be adjusted for U-Boot because our situation is
> a little more complicate
On 23 April 2014 23:04, Masahiro Yamada wrote:
> We are about to switch to Kconfig in the next commit.
> But there are something to get done beforehand.
>
> In Kconfig, include/generated/autoconf.h defines boolean
> CONFIG macros as 1.
>
> CONFIG_SPL and CONFIG_TPL, if defined, must be defined as
HI Masahiro,
On 23 April 2014 23:04, Masahiro Yamada wrote:
> This commit adds more Kconfig files, which were written by hand.
>
> Signed-off-by: Masahiro Yamada
> ---
>
> Kconfig | 47 +++
> arch/Kconfig | 66
> +
Before dfu write and flush operations separation,
dfu write data was flushed by host download request
with len of zero size.
Since above change manually calling dfu write with zero
size has non sense (e.g. in THOR). This should be done by
flush operation.
So now dfu_write_buffer_drain() is called
In thor's download_tail() function, dfu_get_entity() is called
before each dfu_write() call and the returned entity pointers
are the same. So dfu_get_entity() can be called just once and
this patch changes this.
Signed-off-by: Przemyslaw Marczak
Cc: Lukasz Majewski
Cc: Marek Vasut
Cc: Heiko Sch
Since dfu read/write operations needs to be flushed manually,
writing to filesystem on MMC by thor was broken. MMC raw write
actually is working fine because current dfu_flush() function
writes filesystem only. This commit adds dfu_flush() to f_thor
and now filesystem write is working.
This change
On Mon, 2014-04-28 at 15:44 +0200, Gerhard Sittig wrote:
>
> [ ... ] What you
> need is some kind of "trigger" where you notice that the line
> levels are changing, and a delayed fetch of the lines' values
> after they have settled. Without the first condition, you always
> have the risk of samp
Enabling configs for GPIO CMD, EXYNOS4 family and replacing
exynos_gpio_get with new linear GPIO pin number required
because of the new function asking only 2 arguments (pin
and value) instead of 3 (bank, pin and value).
Signed-off-by: Akshay Saraswat
---
include/configs/exynos5-dt.h| 2
Used a script to recheck/verify pin mapping and existing mapping
appears to be fine, returning correct bank and pin values.
Did ./MAKEALL -a arm and found all Exynos/S5P related boards
compiled successfully.
Couldn't test booting over all of them.
Tested U-Boot bootup over SMDK5420, SMDK5250, Snow.
Adding two configs:
* CONFIG_FIT - Enable FIT image support.
* CONFIG_FIT_BEST_MATCH - Enable fetching correct DTB from
FIT image by comparing compatibles.
Change in V2:
- Added "Acked-by".
Signed-off-by: Akshay Saraswat
Acked-by: Simon Glass
---
include/confi
On Fri, 2014-04-25 at 12:20 +0200, Przemyslaw Marczak wrote:
>
> This change prevents gpio keys bouncing by adding 50 ms delay
> when key pressed condition met.
>
> [ ... ]
> @@ -105,6 +105,10 @@ static int check_keys(void)
> if (key_pressed(KEY_VOLUMEDOWN))
> keys += KEY_VOLU
Dear Ian,
On Sun, 2014-04-27 at 19:47 +0100, Ian Campbell wrote:
> This is the driver for one particular ARM cache controller and not the
> one used for the SoC. In any case it does "proper" start/end handling
> only for cache flush operations, not cache invalidate.
>
> Cache invalidate is a pot
On 11/04/2014 22:43, Fabio Estevam wrote:
> From: Fabio Estevam
>
> ECSPI chipselect (MX6_PAD_EIM_D19__GPIO3_IO19) is used with GPIO
> functionality,
> so it does not make sense to set its pad as SPI pin.
>
> Signed-off-by: Fabio Estevam
> ---
Near Eric's Acked and Tested-by, I see Troy agree
On 11/04/2014 13:39, Fabio Estevam wrote:
> From: Fabio Estevam
>
> mx6slevk has a m25p32 SPI NOR flash connected to ESCSPI port.
>
> Add support for it.
>
> Signed-off-by: Fabio Estevam
> ---
Applied to u-boot-imx, thaanks !
Best regards,
Stefano Babic
--
===
On 04/04/2014 00:41, Marek Vasut wrote:
> Signed-off-by: Marek Vasut
> ---
> include/configs/m28evk.h | 1 -
> include/configs/mxs.h| 1 +
> 2 files changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h
> index bb1fa44..3e387c4 100644
> -
OMAP3 used GPMC_NAND_ECC_LP_x8_LAYOUT and GPMC_NAND_ECC_LP_x16_LAYOUT macros
to configure GPMC controller for x7 or x8 bit device connected to its interface.
Now this information is encoded in CONFIG_SYS_NAND_DEVICE_WIDTH macro, so above
macros can be completely removed.
Signed-off-by: Pekon Gupta
From: Brian Norris
Porting below commit from linux-tree, preserving original authorship & commit
log
commit bd9c6e99b58255b9de1982711ac9487c9a2f18be
Author: Brian Norris
mtd: nand: don't use read_buf for 8-bit ONFI transfers
Use a repeated read_byte() instead of read_buf(), since for x16
This patch introduces CONFIG_SYS_NAND_DEVICE_WIDTH to specify bus-width of NAND
device
CONFIG_SYS_NAND_DEVICE_WIDTH == 16: NAND device with x16 bus-width
CONFIG_SYS_NAND_DEVICE_WIDTH == 8: NAND device with x8 bus-width
Need for a separate CONFIG_SYS_NAND_xx arise from following requirements:
From: David Mosberger
As per following Sections in ONFI Spec, GET_FEATURES and SET_FEATURES also need
byte-addressing on 16-bit devices.
*Section: Target Initialization"
"The Read ID and Read Parameter Page commands only use the lower 8-bits of the
data bus. The host shall not issue commands th
*changes v3 -> v4*
[PATCH 1/5]
[PATCH 2/5] mtd: nand: force NAND_CMD_READID onto 8-bit bus
[PATCH 3/5] mtd: nand: fix GET/SET_FEATURES address on 16-bit devices
[PATCH 4/5] same as [PATCH v2 2/3] rebased over
http://lists.denx.de/pipermail/u-boot/2014-April/177323.html
[PATCH 5/5]
*changes
From: Brian Norris
As per following Sections in ONFI Spec, NAND_CMD_READID should use only
lower 8-bit for transfering command, address and data even on x16 NAND device.
*Section: Target Initialization"
"The Read ID and Read Parameter Page commands only use the lower 8-bits of the
data bus. The
Hi Marek,
On Mon, 2014-04-28 at 11:56 +0200, Marek Vasut wrote:
> Add missing aes.c placeholder which includes lib/aes.c . Without this
> one, tools/env/ will fail to build.
>
> Signed-off-by: Marek Vasut
> Cc: Alexey Brodkin
> Cc: Masahiro Yamada
> ---
> tools/env/aes.c | 1 +
> 1 file chang
Hi.
Before I send Kconfig series v2,
please let me cofirm our approach of maintainers info.
When I posted the RFC series in March, I put
maintainers info and board status
into defconfig of each board.
But this idea was rejected.
Instead, MAINTAINERS file as in Linux Kernel was proposed.
(And th
On Monday, April 28, 2014 at 11:40:05 AM, Alexey Brodkin wrote:
> Hi Marek,
>
> I noticed you recently committed support of AES encryption in U-Boot
> tools here -
> http://git.denx.de/?p=u-boot.git;a=commit;h=a8a752c084031905940129f8a6ba303
> 925e0fac9
>
> And now I cannot build env tools.
>
>
Add missing aes.c placeholder which includes lib/aes.c . Without this
one, tools/env/ will fail to build.
Signed-off-by: Marek Vasut
Cc: Alexey Brodkin
Cc: Masahiro Yamada
---
tools/env/aes.c | 1 +
1 file changed, 1 insertion(+)
create mode 100644 tools/env/aes.c
diff --git a/tools/env/aes.
Hi again,
On 04/25/2014 05:32 PM, Akshay Saraswat wrote:
Hi Przemyslaw Marczak,
Hi,
On 04/21/2014 04:25 PM, Akshay Saraswat wrote:
This patch includes following changes :
* Adds gpio pin numbering support for EXYNOS SOCs.
To have consistent 0..n-1 GPIO numbering the banks are divided
Hello Akshay,
On 04/25/2014 05:31 PM, Akshay Saraswat wrote:
Hi Przemyslaw Marczak,
Hello,
On 04/21/2014 04:25 PM, Akshay Saraswat wrote:
Used a script to recheck/verify pin mapping and existing mapping
appears to be fine, returning correct bank and pin values.
Did ./MAKEALL -a arm and found
Hi Marek,
I noticed you recently committed support of AES encryption in U-Boot
tools here -
http://git.denx.de/?p=u-boot.git;a=commit;h=a8a752c084031905940129f8a6ba303925e0fac9
And now I cannot build env tools.
Here's how to reproduce my experience:
===
$ make yourboard_config
$ make
Hi Stephen,
On Thu, 24 Apr 2014 14:36:33 -0600
Stephen Warren wrote:
> On 04/23/2014 11:04 PM, Masahiro Yamada wrote:
> > This commit adds
> > - arch/*/Kconfig: provide a menu to select target boards
> > - board/*/Kconfig: set CONFIG macros to the appropriate values
> > for each board
On Mon, 2014-04-28 at 01:58 +0200, Marek Vasut wrote:
> On Sunday, April 27, 2014 at 09:29:02 PM, Ian Campbell wrote:
> > On Sun, 2014-04-27 at 21:15 +0200, Marek Vasut wrote:
> > > On Sunday, April 27, 2014 at 08:38:52 PM, Ian Campbell wrote:
> > > > On Sun, 2014-04-27 at 20:07 +0200, Marek Vasut
On 28/04/2014 07:05, Marek Vasut wrote:
> On Saturday, April 26, 2014 at 01:15:46 AM, Eric Nelson wrote:
>
> You should learn to write sensible commit messages ;-)
>
Well, the current main issue is the warning, but the subject already
says what is the change. IMHO the patch is ok. I will add mys
Hi Fabio,
On 22/04/2014 20:34, Fabio Estevam wrote:
> Enable CONFIG_SYS_GENERIC_BOARD, so that we get rid of the following warning
> on
> boot:
>
> "Warning: Your board does not use generic board. Please read
>
> doc/README.generic-board and take action. Boards not
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