Add support of 2 stage NAND boot loader using SPL framework.
here, PBL initialise the internal SRAM and copy SPL(96K). This further
initialise DDR using SPD and environment and copy u-boot(512 kb) from NAND to
DDR.
Finally SPL transer control to u-boot.
Initialise/create followings required for S
nand_spl_load_image() can also be used for non TPL framework.
Signed-off-by: Prabhakar Kushwaha
---
Changes for v2: Sending as it is
Changes for v3: Sending as it is
Changes for v4: Sending as it is
drivers/mtd/nand/fsl_ifc_spl.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
dif
Objective of this target to have concatenate binary having
- SPL binary in PBL command format
- U-boot binary
Signed-off-by: Prabhakar Kushwaha
---
Changes for v2: Updated target
Changes for v3: Sending as it is
Changes for v4: Updated Makefile with latest build format
Makefile | 19
SPL linker has fix location of bootpg and reset vector with respect to text
base.
It is not necessary to have fixed locations.
Avoid such hardcoding.
Signed-off-by: Prabhakar Kushwaha
---
Changes for v2: Sending as it is
Changes for v3: Sending as it is
Changes for v4: Sending as it is
arc
Current SPL code base has BSS section placed after reset_vector. This means
they have to relocate to use the global variables. This put an implicit
requirement of having SPL size = Memory/2.
To avoid relocation:
- Move bss_section within SPL range
- Modify relocate_code()
Signed-o
LAW_EN is only defined if CONFIG_SYS_CCSRBAR_DEFAULT is not equal to
CONFIG_SYS_CCSRBAR_PHYS. in SPL framework CCSRBAR is not relocated hence
both are same. This cause compilation error.
So LAW_EN define outside of configs
Signed-off-by: Prabhakar Kushwaha
---
Changes for v2: Sending as it is
It is not necessary for SPL to define all required LAW of the system.
Re-parse LAW table again during non SPL boot.
Signed-off-by: Prabhakar Kushwaha
---
Changes for v2: Sending as it is
Changes for v3: Sending as it is
Changes for v4: Sending as it is
arch/powerpc/cpu/mpc8xxx/law.c |9 -
Signed-off-by: Prabhakar Kushwaha
---
Changes for v2: Updated Makefile
Changes for v3:
- Updated B4860QDS.h config file to support B4420QDS NAND boot
- Fix B4860QDS_SPIFLASH B4420QDS_SPIFLASH build issue
Changes for v4:
- Updated Makefile with latest build format
Add support of 2 stage NAN
+Charles for HOSTCC comments
Hi Heiko,
On 3 March 2014 04:19, Heiko Schocher wrote:
> add host tool "fit_check_sign" which verifies, if a fit image is
> signed correct.
>
> Signed-off-by: Heiko Schocher
> Cc: Simon Glass
Looks good - a few nits and the crash I mentioned.
It's interesting tha
Hi Heiko,
On 3 March 2014 04:19, Heiko Schocher wrote:
> add fit_info command to the host tools. This command prints
> the name, offset and the len from a property from a node in
> a fit file. This info can be used to extract a properties
property's I think?
> data with linux tools, for example
Hi Heiko,
On 3 March 2014 04:19, Heiko Schocher wrote:
> based on patch from andr...@oetken.name:
>
> http://patchwork.ozlabs.org/patch/294318/
> commit message:
> I currently need support for rsa-sha256 signatures in u-boot and found out
> that
> the code for signatures is not very generic. Thu
Hi Charles,
On 20 February 2014 12:50, Charles Manning wrote:
>
> I am in the throes of extending mkimage to add socfpga support. This is my
> first time in mkimage, so please forgive me being on a learning curve.
>
> It seems that the most "normal" path for mkimage signers is to append some
> s
Hi Gerhard,
On 2014-03-06 20:49, Gerhard Sittig wrote:
In general U-Boot tries to get away from the multitude of ifdefs
where possible. I'm afraid adding a new one needs a very good
reason to get perceived as welcome.
By the way i've found a passage within README, which tells to do so as
id id
On Sat, Mar 08, 2014 at 19:14 +0100, Hannes Petermaier wrote:
>
> Hi Gerhard,
>
> On 2014-03-08 18:38, Gerhard Sittig wrote:
> >On Fri, Mar 07, 2014 at 18:56 +0100, Hannes Petermaier wrote:
> >>- fix: return-value of 'i2c_set_bus_speed' was interpreted wrong
> >>
> >>Signed-off-by: Hannes Peterma
On Saturday, March 08, 2014 at 07:46:15 PM, Gerhard Sittig wrote:
> adjust the harmony and omap3_beagle board configs to make
> their CONFIG_USB_ETHER_* items appear in alphabetical order
>
> Signed-off-by: Gerhard Sittig
> Acked-by: Simon Glass
Acked-by: Marek Vasut
Best regards,
Marek Vasut
On Saturday, March 08, 2014 at 07:46:14 PM, Gerhard Sittig wrote:
> introduce an 'mcs7830' driver for Moschip MCS7830 based (7730/7830/7832)
> USB 2.0 Ethernet Devices
>
> see "MCS7830 -- USB 2.0 to 10/100M Fast Ethernet Controller" at
> http://www.asix.com.tw/products.php?op=pItemdetail&PItemID=1
On Saturday, March 08, 2014 at 07:46:18 PM, Gerhard Sittig wrote:
> - extend the discussion of USB network related config options such that
> all available adapter drivers are listed, and that the 'usb' command
> for the interactive prompt and scripting becomes available
> - suggest to *not* pu
On Saturday, March 08, 2014 at 07:46:16 PM, Gerhard Sittig wrote:
> enable support for the Moschip USB ethernet adapter for those boards
> which previously had support for "all other" USB ethernet adapters
> (that's Asix _and_ SMSC) enabled -- which applies to harmony, m53evk,
> mx53loco, nitrogen6
On Saturday, March 08, 2014 at 07:46:13 PM, Gerhard Sittig wrote:
> while compilation of implemented routines and references from calling
> sites may be optional, declarations in header files should not be
>
> unconditionally declare the Asix and SMSC related public USB ethernet
> driver routines
On Sat, Mar 08, 2014 at 19:46 +0100, Gerhard Sittig wrote:
>
> this series
> - adds a new USB ethernet driver for adapters that are based on the
> MCS7730/7830/7832 chips
> - enables the driver for those boards which previously had support for
> "all other" USB ethernet adapters
> - updates th
On Sat, Mar 08, 2014 at 19:46 +0100, Gerhard Sittig wrote:
>
> this series
> - adds a new USB ethernet driver for adapters that are based on the
> MCS7730/7830/7832 chips
> [ ... ]
I'm sorry. I feel that I have to apologies for the excessive Cc:
list. Not for the cover letter, but for individ
enable support for the Moschip USB ethernet adapter for those boards
which previously had support for "all other" USB ethernet adapters
(that's Asix _and_ SMSC) enabled -- which applies to harmony, m53evk,
mx53loco, nitrogen6x, omap3_beagle
Signed-off-by: Gerhard Sittig
---
Changes in v4: None
enabling CONFIG_MACB makes other locations in the stamp config file
enable network related commands (actually prevents disabling them)
enable USB ethernet support by activating generic support as well as
Asix and Moschip ethernet adapters
Signed-off-by: Gerhard Sittig
---
Changes in v4: None
C
- extend the discussion of USB network related config options such that
all available adapter drivers are listed, and that the 'usb' command
for the interactive prompt and scripting becomes available
- suggest to *not* put individual IP configuration parameters into the
exectuable, but instea
adjust the harmony and omap3_beagle board configs to make
their CONFIG_USB_ETHER_* items appear in alphabetical order
Signed-off-by: Gerhard Sittig
Acked-by: Simon Glass
---
Changes in v4: None
Changes in v3:
- pick up Simon's ACKs for individual patches
Changes in v2:
- introduce the patch t
introduce an 'mcs7830' driver for Moschip MCS7830 based (7730/7830/7832)
USB 2.0 Ethernet Devices
see "MCS7830 -- USB 2.0 to 10/100M Fast Ethernet Controller" at
http://www.asix.com.tw/products.php?op=pItemdetail&PItemID=109;74;109
the driver was implemented based on the U-Boot Asix driver with
a
while compilation of implemented routines and references from calling
sites may be optional, declarations in header files should not be
unconditionally declare the Asix and SMSC related public USB ethernet
driver routines in the usb_ether.h header file
Signed-off-by: Gerhard Sittig
Acked-by: Sim
this series
- adds a new USB ethernet driver for adapters that are based on the
MCS7730/7830/7832 chips
- enables the driver for those boards which previously had support for
"all other" USB ethernet adapters
- updates the README.usb documentation file to list all available
drivers for USB e
Hi Gerhard,
On 2014-03-08 18:38, Gerhard Sittig wrote:
On Fri, Mar 07, 2014 at 18:56 +0100, Hannes Petermaier wrote:
- fix: return-value of 'i2c_set_bus_speed' was interpreted wrong
Signed-off-by: Hannes Petermaier
---
board/BuR/kwb/board.c |4 ++--
1 file changed, 2 insertions(+), 2 d
- fix: return-value of 'i2c_set_bus_speed' was interpreted wrong
Signed-off-by: Hannes Petermaier
---
Changes for v2:
- fixed up Yoda programming style at testing return value of
i2c_set_bus_speed :-)
---
board/BuR/kwb/board.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
On Fri, Mar 07, 2014 at 18:56 +0100, Hannes Petermaier wrote:
>
> - fix: return-value of 'i2c_set_bus_speed' was interpreted wrong
>
> Signed-off-by: Hannes Petermaier
> ---
> board/BuR/kwb/board.c |4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/board/BuR/kwb/bo
On Thu, Mar 06, 2014 at 12:33 -0800, John de la Garza wrote:
>
> Signed-off-by: John de la Garza
Assuming that you fix something which isn't obvious, the commit
message is incredibly short (it's empty).
virtually yours
Gerhard Sittig
--
DENX Software Engineering GmbH, MD: Wolfgang Denk &
Dear Masahiro Yamada,
I noticed a wrongly generated version_autogenerated.h with my default
workflow:
---8<---
andreas@andreas-pc % PATH=$AVR32_PATH:$PATH BUILD_NCPUS=2
BUILD_NBUILDS=6 CROSS_COMPILE=avr32-linux-
MAKEALL_LOGDIR=/tmp/makeall_logs BUILD_DIR=/tmp/makeall_buildavr32
./MAKEALL gr
On Thu, Mar 06, 2014 at 15:40 +1300, Charles Manning wrote:
>
> [ ... ]
> Unfortunately the CRC used in this boot ROM is not the same as the
> Adler CRC in lib/crc32.c. Indeed the Adler code is not technically a
> CRC but is more correctly described as a checksum.
I don't quite get why you say th
.bmp files contain 32-bit integers aligned at offsets of +2, +6,
et cetera within the bmp_header structure (see include/bmp_layout.h).
Support for gzip-compressed .bmp files is present in the cfb_console
display subsystem by uncompressing them prior to use.
This patch forces the in-memory header
On Friday, March 07, 2014 at 11:27:37 PM, Tom Rini wrote:
> On Thu, Feb 27, 2014 at 01:27:02PM -0700, Stephen Warren wrote:
> > From: Stephen Warren
> >
> > For Ethernet/USB RX packets, the ASIX HW pads odd-sized packets so that
> > they have an even size. Currently, asix_recv() does remove this
On Fri, Mar 07, 2014 at 18:02 +0900, Masahiro Yamada wrote:
>
> --- a/README
> +++ b/README
> @@ -132,6 +132,10 @@ Directory Hierarchy:
>
>
> /archArchitecture specific files
> + /arc Files generic to ARC architecture
> +/
LAW_EN is only defined if CONFIG_SYS_CCSRBAR_DEFAULT is not equal to
CONFIG_SYS_CCSRBAR_PHYS. in SPL framework CCSRBAR is not relocated hence
both are same. This cause compilation error.
So LAW_EN define outside of configs
Signed-off-by: Prabhakar Kushwaha
---
Changes for v2: Sending as it is
Add support of 2 stage NAND boot loader using SPL framework.
here, PBL initialise the internal SRAM and copy SPL(96K). This further
initialise DDR using SPD and environment and copy u-boot(512 kb) from NAND to
DDR.
Finally SPL transer control to u-boot.
Initialise/create followings required for S
LAW_EN is only defined if CONFIG_SYS_CCSRBAR_DEFAULT is not equal to
CONFIG_SYS_CCSRBAR_PHYS. in SPL framework CCSRBAR is not relocated hence
both are same. This cause compilation error.
So LAW_EN define outside of configs
Signed-off-by: Prabhakar Kushwaha
---
Changes for v2: Sending as it is
T1040RDB and T1042RDB_PI has CPLD. Here CPLD controls board mux/features.
This support of CPLD includes
- files and register defintion
- Commands to swtich alternate bank and default bank
Signed-off-by: Prabhakar Kushwaha
---
Changes for v2:
- Updated the cpld command
Changes for v3:
It is not necessary for SPL to define all required LAW of the system.
Re-parse LAW table again during non SPL boot.
Signed-off-by: Prabhakar Kushwaha
---
Changes for v2: Sending as it is
Changes for v3: Sending as it is
arch/powerpc/cpu/mpc8xxx/law.c |9 -
1 file changed, 9 delet
Objective of this target to have concatenate binary having
- SPL binary in PBL command format
- U-boot binary
Signed-off-by: Prabhakar Kushwaha
---
Changes for v2: Updated target
Changes for v3: Sending as it is
Makefile | 12
README |4
2 files chan
nand_spl_load_image() can also be used for non TPL framework.
Signed-off-by: Prabhakar Kushwaha
---
Changes for v2: Sending as it is
Changes for v3: Sending as it is
drivers/mtd/nand/fsl_ifc_spl.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/fsl_if
SPL linker has fix location of bootpg and reset vector with respect to text
base.
It is not necessary to have fixed locations.
Avoid such hardcoding.
Signed-off-by: Prabhakar Kushwaha
---
Changes for v2: Sending as it is
Changes for v3: Sending as it is
arch/powerpc/cpu/mpc85xx/u-boot-spl.l
Current SPL code base has BSS section placed after reset_vector. This means
they have to relocate to use the global variables. This put an implicit
requirement of having SPL size = Memory/2.
To avoid relocation:
- Move bss_section within SPL range
- Modify relocate_code()
Signed-o
The MDC generate by default value of MDIO_CLK_DIV is too high i.e. higher
than 2.5 MHZ. It violates the IEEE specs.
So Slow MDC clock to comply IEEE specs
Signed-off-by: Prabhakar Kushwaha
---
Changes for v2: Update commit message
board/freescale/b4860qds/b4_pbi.cfg |3 +++
1 file changed
Signed-off-by: Prabhakar Kushwaha
---
Changes for v2: Updated Makefile
Changes for v3:
- Updated B4860QDS.h config file to support B4420QDS NAND boot
- Fix B4860QDS_SPIFLASH B4420QDS_SPIFLASH build issue
Add support of 2 stage NAND boot loader in cornet platforms using SPL framework.
In cu
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