(sorry for jumping in so late in this discussion)
On 05/21/2013 09:14 PM, Scott Wood wrote:
>> This is Tom's words:
>>
>> a3m071 relies on SPL always building cmd_nvedit.o and env_common.o and
>> duplicated CONFIG_ENV_IS_IN_FLASH in the SPL section.
>>
>> CONFIG_SPL_NET_SUPPORT relies on the same
Hi, Benoit,
On Tuesday, May 21, 2013 11:02:56 AM, Alison Wang wrote:
[...]
> diff --git a/arch/arm/include/asm/arch-mvf600/mvf_pins.h
> b/arch/arm/include/asm/arch-mvf600/mvf_pins.h
> new file mode 100644
> index 000..0fd89af
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-mvf600/mvf_pins.
Hi, Benoit,
On Tuesday, May 21, 2013 11:03:01 AM, Alison Wang wrote:
> MVF600TWR is a board based on Vybrid MVF600 SoC.
>
> This patch adds basic support for Vybrid MVF600TWR board.
>
> Signed-off-by: Alison Wang
> Signed-off-by: Jason Jin
> Signed-off-by: TsiChung Liew
[...]
> diff --git a/i
Hi, Benoit,
On Tuesday, May 21, 2013 11:02:57 AM, Alison Wang wrote:
> This patch adds the IOMUX support for Vybrid MVF600 platform.
>
> There is a little difference for IOMUXC module between MVF600 and i.MX
> platform, the muxmode and pad configuration share one 32bit register on
> MVF600, but
cpu_init_crit() can be skipped, but the code is still enabled requiring a
platform to supply lowlevel_init().
Signed-off-by: Axel Lin
Tested-by: Stephen Warren
---
arch/arm/cpu/arm720t/start.S | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm7
Then we can get rid of the #ifdef CONFIG_TEGRA guard in cpu_init_crit.
Signed-off-by: Axel Lin
Tested-by: Stephen Warren
---
arch/arm/cpu/arm720t/start.S| 2 --
include/configs/tegra-common-post.h | 2 ++
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/arm720
Hi, Benoit,
On Tuesday, May 21, 2013 11:02:56 AM, Alison Wang wrote:
> This patch adds generic codes to support Freescale's Vybrid MVF600 CPU.
>
> It aligns Vybrid MVF600 platform with i.MX platform. As there are
> some differences between MVF600 and i.MX platforms, the specific
> codes are in the
Hi, Benoit,
On Tuesday, May 21, 2013 11:02:55 AM, Alison Wang wrote:
> This series contain the support for Freescale Vybrid MVF600 CPU and MVF600TWR
> board.
>
> Vybird devices are built on an asymmetrical-multiprocessing architecture
> using ARM cores. The families in the Vybrid portfolio span en
Hi
On 05/21/2013 10:51 PM, Jagan Teki wrote:
> Hi,
>
> On Tue, May 21, 2013 at 6:24 PM, Rajeshwari Birje
> wrote:
>> Hi All,
>>
>> I use the DWMMC driver in u-boot mainline on exynos board and face the
>> following issue.
>>
>> I do a mmc rescan 3 times, then fourth time I get a DATA ERROR, whic
Hi, Fabio,
> -Original Message-
> From: Estevam Fabio-R49496
> Sent: Tuesday, May 21, 2013 9:48 PM
> To: Wang Huan-B18965
> Cc: sba...@denx.de; u-boot@lists.denx.de; Liu Hui-R64343; Estevam Fabio-
> R49496
> Subject: Re: [PATCH v3 1/6] arm: mvf600: Add Vybrid MVF600 CPU support
>
> On 05/
> diff --git a/include/configs/MPC8313ERDB.h
> b/include/configs/MPC8313ERDB.h
> index c28dfe0..a2bdcff 100644
> --- a/include/configs/MPC8313ERDB.h
> +++ b/include/configs/MPC8313ERDB.h
> @@ -40,7 +40,9 @@
> #define CONFIG_SPL_INIT_MINIMAL
> #define CONFIG_SPL_SERIAL_SUPPORT
> #define CONFIG_
-Original Message-
From: Wood Scott-B07421
Sent: Wednesday, May 22, 2013 3:38 AM
To: Zhang Ying-B40530
Cc: u-boot@lists.denx.de; aflem...@gmail.com; Xie Xiaobo-R63061; Zhang
Ying-B40530
Subject: Re: [PATCH 2/6] powerpc/mpc85xx: modify the functionality clear_bss
and the end address of
-Original Message-
From: Wood Scott-B07421
Sent: Wednesday, May 22, 2013 3:15 AM
To: Zhang Ying-B40530
Cc: Wood Scott-B07421; u-boot@lists.denx.de; aflem...@gmail.com; Xie
Xiaobo-R63061; tom.r...@gmail.com
Subject: Re: [PATCH] common/Makefile: Add new symbol CONFIG_SPL_ENV_SUPPORT for
2013/5/22 Jagan Teki :
> Hi,
>
> I have a simple question like these parts are legacy flashes i guess.
> Could you please tell me on which boards these were used?
>
It's used on Faraday A369 evaluation board.
However the u-boot source codes for A369 is still waiting for approval.
Here is the link
Hi Wolfgang,
On Tue, May 21, 2013 at 6:24 PM, Wolfgang Denk wrote:
> Can we _please_ remove all this code? A _runtime_ check for a _build_
> _time_ _detectable_ situation makes no sense to me.
>
> For such a misconfiguration, the build should fail.
>
> Handling this at runtime is the wrong appr
On Mon, 6 May 2013 15:02:39 +0200
Holger Brunck wrote:
> Errata Fix: 1.9V Output from Internal 1.8V Regulator, acc.
> MV-S300889-00D.pdf , clause 4.5
>
> Signed-off-by: Holger Brunck
> ---
patches 1-2 applied to mpc83xx/next.
Thanks,
Kim
___
U-Boo
From: Rob Herring
libata already has similar functions as implemented in the ahci code.
Refactor the code to use the libata variants and remove the dependency on
ata.h. Convert some defines to use the version from libata.h. Also, remove
some unnecessary memset's of bss data.
This is a step towar
From: Rob Herring
Based on Linux libata code, most drives are less than 10 sec, but some
need up to 20 sec.
Signed-off-by: Rob Herring
---
drivers/block/ahci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index 5ffdf95..ac60891
From: Rob Herring
Some Intel SSDs can send a COMINIT after the initial COMRESET. This causes
the link to go down and we need to re-initialize the link.
Signed-off-by: Rob Herring
---
drivers/block/ahci.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/block/ahci.c b/dr
From: Rob Herring
This fixes a memory leak when scsi inquiry fails.
Signed-off-by: Rob Herring
---
drivers/block/ahci.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index 3cb37e7..a2aa433 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/a
From: Rob Herring
Move the link bring-up handling to a separate weak function in order to
allow platforms to override it. This is needed on highbank platform which
needs special phy handling.
Signed-off-by: Rob Herring
---
drivers/block/ahci.c | 39 +--
1 fi
From: Rob Herring
gcc 4.7 will generate unaligned accesses to local char arrays, so make
them static to avoid that.
Signed-off-by: Rob Herring
---
drivers/block/ahci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index b89be06.
From: Richard Gibbs
The AHCI driver was incorrectly using the Capabilities register NP (number
of ports) field to determine which ports to activate. This commit changes
it to correctly use the PORTS_IMPL register as a port map.
Signed-off-by: Richard Gibbs
---
drivers/block/ahci.c | 4
1
On 04/28/2013 01:17:34 AM, Haijun.Zhang wrote:
From: "Haijun.Zhang"
Add platform support for p1020rdb-pd
Explain what is different about "-pd" and why this new revision
requires a separate compile-time target.
If it's due to raw DDR config, say so in the changelog. Is there any
way we
On 04/26/2013 03:11:36 AM, Dirk Eibach wrote:
From: Dirk Eibach
If CONFIG_RELEASE_CORE0_ONLY is set, all cores except core0 are kept
in
holdoff mode.
Signed-off-by: Dirk Eibach
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/powerpc/cpu/mpc85xx/mp.c |8 ++--
On 05/10/2013 07:06:47 AM, Tom Rini wrote:
On Sun, Apr 28, 2013 at 04:53:08PM -, Kuo-Jung Su wrote:
> From: Kuo-Jung Su
>
> With MMU/D-Cache enabled, data might be retained at d-cache
> rather than at DRAM when we execute 'go' command, and some
> of the bare-metal softwares would always inv
On 04/25/2013 09:27:03 AM, du zhenhuan wrote:
Hello,
I'm a newbie using U-boot and met several problems
with a customized board based on MPC8315E-RDB board.
On the new board, I have changed the Ethernet PHY to TI's DP83848
and NAND FLASH to 64Mbit (from old 32Mbit).
During U-boot form NOR FL
tis 2013-05-21 klockan 14:26 +0200 skrev Wolfgang Denk:
> > but imho the user shouldn't really need to care for these and is why I
> > hooked into the go command.
>
> In this case you should use the common C API.
Unfortunately the go command do now know what range(s) it needs to
flush.
> No. b
From: Rob Herring
interrupt_init also sets up the abort stack, but is not setup before
relocation. So any aborts during relocation will hang and not print out
any useful information. Fix this by moving the interrupt_init to after
the stack setup in board_init_f.
Signed-off-by: Rob Herring
---
From: Rob Herring
Various changes to highbank config:
Enable EFI partitions
Enable ext4 and FAT filesystems
Enable bootz command and raw initrd
Increase cmd and print buffer size to 1K
Change serial baudrate to 115200
Enable hush shell
Signed-off-by: Rob Herring
---
include/configs/highbank.h
Dear Sergey Yanovich,
> Dear Marek Vasut,
>
> On Tue, 2013-05-21 at 22:07 +0200, Marek Vasut wrote:
> > The OneNAND has 1kbyte limit on code it will directly address when
> > booting from it, you can't even make generate the MMU table there.
>
> Do you mean there is no space left inside that 1K
From: Rob Herring
Compile misc_init_r only if CONFIG_MISC_INIT_R is enabled.
Signed-off-by: Rob Herring
---
board/highbank/highbank.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/board/highbank/highbank.c b/board/highbank/highbank.c
index b224aae..b0c20fe 100644
--- a/board/highbank/h
From: Rob Herring
Accessing powered down peripherals will hang the bus, so check power
domain status before initializing SATA and fixup the FDT to disable
unused peripherals.
Signed-off-by: Rob Herring
---
board/highbank/highbank.c | 31 +--
include/configs/highban
Dear Fabio Estevam,
In message <1369157542-25734-1-git-send-email-fabio.este...@freescale.com> you
wrote:
> When the SDHC port number index is invalid we should return an error code
> immediately.
>
> Currently we return 'status', which has a value of zero, causing
> board_mmc_init() to incor
From: Stephen Warren
A negative value of CONFIG_ENV_OFFSET is treated as a backwards offset
from the end of the eMMC device/partition, rather than a forwards offset
from the start.
This is useful when a single board may be stuffed with different eMMC
devices, each of which has a different capaci
From: Stephen Warren
Enhance the MMC core to calculate the size of each MMC partition, and
update mmc->capacity whenever a partition is selected. This causes:
mmc dev 0 1 ; mmcinfo
... to report the size of the currently selected partition, rather than
always reporting the size of the user part
From: Stephen Warren
Use a negative value of CONFIG_ENV_OFFSET for all NVIDIA reference boards
that store the U-Boot environment in the 2nd eMMC boot partition. This
makes U-Boot agnostic to the size of the eMMC boot partition, which can
vary depending on which eMMC device was actually stuffed in
Dear Marek Vasut,
On Tue, 2013-05-21 at 22:07 +0200, Marek Vasut wrote:
> The OneNAND has 1kbyte limit on code it will directly address when booting
> from
> it, you can't even make generate the MMU table there.
Do you mean there is no space left inside that 1K for
lock_cache_for_stack()?
> >
Hi,
I am trying to get U-Boot to work on hardware very similar to the SBC8347 dev
board. The main differences are:
SBC8347: My HW:
/CS0 8M Flash 64M Flash
/CS1 8K EEPROM 128M SDRAM
/CS[2:3] 128M SDRAM
MCS[0:1] 256M DDR 1G DDR
And the significant chan
Dear Kuo-Jung Su,
Works fine, thanks!
Best regards,
Marek Vasut
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Dear Sergey Yanovich,
> Dear Marek Vasut,
>
> On Tue, 2013-05-21 at 21:58 +0200, Marek Vasut wrote:
> > OK, applied. Thanks
>
> Thanks for your time, too.
hey, thanks for the patch ;-)
Best regards,
Marek Vasut
___
U-Boot mailing list
U-Boot@lists.de
Dear Sergey Yanovich,
> Dear Marek Vasut,
>
> On Tue, 2013-05-21 at 21:24 +0200, Marek Vasut wrote:
> > I'd love to have a uniform way to do this cache thing, really ...
>
> Requoting the spec 'The PXA27x processor cache configuration is
> identical to that of the PXA255 processor'. It looks saf
Dear Marek Vasut,
On Tue, 2013-05-21 at 21:58 +0200, Marek Vasut wrote:
> OK, applied. Thanks
Thanks for your time, too.
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Dear Sergey Yanovich,
> PXA270 CPU has turbo mode. The mode is 2.5 times faster than the
> default run mode. Activating the mode early significantly speeds
> up boot process.
>
> Signed-off-by: Sergey Yanovich
OK, applied. Thanks
Best regards,
Marek Vasut
__
PXA270 CPU has turbo mode. The mode is 2.5 times faster than the
default run mode. Activating the mode early significantly speeds
up boot process.
Signed-off-by: Sergey Yanovich
---
Changes for v3:
- make the change unconditional
Changes for v2:
- activate turbo mode and fast bus by def
Dear Marek Vasut,
On Tue, 2013-05-21 at 21:25 +0200, wrote:
> So why not just make this patch into
>
> -(2)
> +(0xb)
>
> instead of adding new (and undocumented ...) macro?
Point taken. Looks like I am too careful in this case.
___
U-Boot mailing li
Dear Marek Vasut,
On Tue, 2013-05-21 at 21:24 +0200, Marek Vasut wrote:
> I'd love to have a uniform way to do this cache thing, really ...
Requoting the spec 'The PXA27x processor cache configuration is
identical to that of the PXA255 processor'. It looks safe to configure
all PXA2XX chipsets th
Please change the title and the rest of the changelog to describe what
functionality you're adding and why.
On 05/20/2013 01:07:27 AM, ying.zh...@freescale.com wrote:
diff --git a/common/env_common.c b/common/env_common.c
index 906b41f..8cb81e9 100644
--- a/common/env_common.c
+++ b/common/env
On 05/20/2013 01:07:24 AM, ying.zh...@freescale.com wrote:
From: Ying Zhang
There will clear the BSS in the function clear_bss(), the reset
address of
the BSS started from the __bss_start, and increased by four-byte
increments,
finally stoped depending on the address is equal to the _bss_en
Dear Sergey Yanovich,
> On Tue, 2013-05-21 at 13:22 +0200, Marek Vasut wrote:
> > > Actually, I wonder if Linux's cpufreq still does depend on bootloader
> > > speed settings. Especially the turbo bit. Can you please check that?
> > > It'd be interesting to know ...
> > >
> > > I'd say enable it
Hi Alison,
On Tuesday, May 21, 2013 11:03:01 AM, Alison Wang wrote:
> MVF600TWR is a board based on Vybrid MVF600 SoC.
>
> This patch adds basic support for Vybrid MVF600TWR board.
>
> Signed-off-by: Alison Wang
> Signed-off-by: Jason Jin
> Signed-off-by: TsiChung Liew
[...]
> diff --git a/
Dear Sergey Yanovich,
> Dear Marek Vasut,
>
> On Tue, 2013-05-21 at 21:02 +0200, Marek Vasut wrote:
> > > The whole 256 kB of SRAM could be used for persistent storage with the
> > > patch. Without it, part of SRAM should be dedicated for U-Boot stack or
> > > be overwritten on boot.
> >
> > Thi
Dear Marek Vasut,
On Tue, 2013-05-21 at 21:02 +0200, Marek Vasut wrote:
> > The whole 256 kB of SRAM could be used for persistent storage with the
> > patch. Without it, part of SRAM should be dedicated for U-Boot stack or
> > be overwritten on boot.
>
> This won't hold on any PXA that uses SPL,
On 05/20/2013 09:43:53 PM, Zhang Ying-B40530 wrote:
-Original Message-
From: Wood Scott-B07421
Sent: Tuesday, May 21, 2013 2:56 AM
To: Zhang Ying-B40530
Cc: Wood Scott-B07421; u-boot@lists.denx.de; aflem...@gmail.com; Xie
Xiaobo-R63061; Tom Rini
Subject: Re: [PATCH] common/Makefile: A
Hi Alison,
On Tuesday, May 21, 2013 11:02:56 AM, Alison Wang wrote:
[...]
> diff --git a/arch/arm/include/asm/arch-mvf600/mvf_pins.h
> b/arch/arm/include/asm/arch-mvf600/mvf_pins.h
> new file mode 100644
> index 000..0fd89af
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-mvf600/mvf_pins.h
Dear Sergey Yanovich,
> On Tue, 2013-05-21 at 17:00 +0200, Marek Vasut wrote:
> > > Yes, the patch as it is will only affects relocation speed and preserve
> > > SRAM from corruption.
> >
> > Now this is the right (convincing) argument! What kind of corruption ?
> > When does it occur ?
>
> The
On Tue, May 21, 2013 at 3:49 PM, Fabio Estevam wrote:
> On Tue, May 21, 2013 at 3:44 PM, Otavio Salvador
> wrote:
>
> > In the loop; it does:
> >
> > status |= fsl...
> >
> > so it gets the output of it. In case any fails it won't be 0.
>
> It's good practice to return immediately when an error
On Tue, May 21, 2013 at 3:44 PM, Otavio Salvador
wrote:
> In the loop; it does:
>
> status |= fsl...
>
> so it gets the output of it. In case any fails it won't be 0.
It's good practice to return immediately when an error condition happens.
___
U-Boot
On Tue, May 21, 2013 at 3:39 PM, Fabio Estevam wrote:
> On Tue, May 21, 2013 at 3:26 PM, Otavio Salvador
> wrote:
>
> > When I looked at this code I didn't change it because it raises a
> warning.
> > So it returns the status if any failed.
>
> Which warning are you talking about? Build warning
On Tue, May 21, 2013 at 3:26 PM, Otavio Salvador
wrote:
> When I looked at this code I didn't change it because it raises a warning.
> So it returns the status if any failed.
Which warning are you talking about? Build warning or run-time warning?
I did not see any of these here.
status is zero
On Tue, May 21, 2013 at 2:32 PM, Fabio Estevam
wrote:
> When the SDHC port number index is invalid we should return an error code
> immediately.
>
> Currently we return 'status', which has a value of zero, causing
> board_mmc_init() to incorrectly return sucess.
>
> Fix this by returning -EINVAL i
Hello Ilya,
On 05/19/2013 12:09 PM, Ilya Bakulin wrote:
Hi list,
I use U-Boot for starting FreeBSD/arm on Globalscale DreamPlug.
On this platform FreeBSD uses "ubldr" second-stage bootloader, which is
an U-Boot API consumer and uses U-Boot API to access block devices, network,
etc.
Dreamplug ha
Albert (& Axel),
> -Original Message-
> From: Albert ARIBAUD [mailto:albert.u.b...@aribaud.net]
> Sent: Saturday, May 18, 2013 11:58 AM
> To: Tom Warren
> Cc: Stephen Warren; Axel Lin; Wolfgang Denk; Heiko Schocher; u-
> b...@lists.denx.de
> Subject: Re: [U-Boot] [PATCH] ARM: arm720t: Add
When the SDHC port number index is invalid we should return an error code
immediately.
Currently we return 'status', which has a value of zero, causing
board_mmc_init() to incorrectly return sucess.
Fix this by returning -EINVAL instead.
Signed-off-by: Fabio Estevam
---
board/freescale/mx51
When the SDHC port number index is invalid we should return an error code
immediately.
Currently we return 'status', which has a value of zero, causing
board_mmc_init() to incorrectly return sucess.
Fix this by returning -EINVAL instead.
Signed-off-by: Fabio Estevam
---
board/freescale/mx53
Hi Alison,
On Tuesday, May 21, 2013 11:03:01 AM, Alison Wang wrote:
> MVF600TWR is a board based on Vybrid MVF600 SoC.
>
> This patch adds basic support for Vybrid MVF600TWR board.
>
> Signed-off-by: Alison Wang
> Signed-off-by: Jason Jin
> Signed-off-by: TsiChung Liew
[...]
> diff --git a/
Hi Wolfgang Denx,
> > Closing a file descriptor does not guarantee that the data has been
> > successfully saved to disk, as the kernel might defer the write.
>
> What is the exact problem you are trying to fix?
>
> I mean, when exactly does adding the sync play a role?
I'm using fw_setenv duri
When the SDHC port number index is invalid we should return an error code
immediately.
Currently we return 'status', which has a value of zero, causing
board_mmc_init() to incorrectly return sucess.
Fix this by returning -EINVAL instead.
Signed-off-by: Fabio Estevam
---
board/freescale/mx6q
When the SDHC port number index is invalid we should return an error code
immediately.
Currently we return 'status', which has a value of zero, causing
board_mmc_init() to incorrectly return sucess.
Fix this by returning -EINVAL instead.
Signed-off-by: Fabio Estevam
---
board/freescale/mx6q
When the SDHC port number index is invalid we should return an error code
immediately.
Currently we return 'status', which has a value of zero, causing
board_mmc_init() to incorrectly return sucess.
Fix this by returning -EINVAL instead.
Signed-off-by: Fabio Estevam
---
board/freescale/mx53
When the SDHC port number index is invalid we should return an error code
immediately.
Currently we return 'status', which has a value of zero, causing
board_mmc_init() to incorrectly return sucess.
Fix this by returning -EINVAL instead.
Signed-off-by: Fabio Estevam
---
board/freescale/mx53
When the SDHC port number index is invalid we should return an error code
immediately.
Currently we return 'status', which has a value of zero, causing
board_mmc_init() to incorrectly return sucess.
Fix this by returning -EINVAL instead.
Signed-off-by: Fabio Estevam
---
board/freescale/mx6q
When the SDHC port number index is invalid we should return an error code
immediately.
Currently we return 'status', which has a value of zero, causing
board_mmc_init() to incorrectly return sucess.
Fix this by returning -EINVAL instead.
Signed-off-by: Fabio Estevam
---
board/freescale/mx53
When the SDHC port number index is invalid we should return an error code
immediately.
Currently we return 'status', which has a value of zero, causing
board_mmc_init() to incorrectly return sucess.
Fix this by returning -EINVAL instead.
Signed-off-by: Fabio Estevam
---
board/wandboard/wand
Hi Alison,
On Tuesday, May 21, 2013 11:02:58 AM, Alison Wang wrote:
> This patch adds FEC support for Vybrid MVF600 platform.
>
> In function fec_open(), RCR register is only set as RGMII mode. But RCR
> register should be set as RMII mode for MVF600 platform.
> This configuration is already done
Hi Alison,
On Tuesday, May 21, 2013 11:02:57 AM, Alison Wang wrote:
> This patch adds the IOMUX support for Vybrid MVF600 platform.
>
> There is a little difference for IOMUXC module between MVF600 and i.MX
> platform, the muxmode and pad configuration share one 32bit register on
> MVF600, but th
Hi,
I have a simple question like these parts are legacy flashes i guess.
Could you please tell me on which boards these were used?
Thanks,
Jagan.
On Fri, Apr 26, 2013 at 1:32 PM, Kuo-Jung Su wrote:
> From: Kuo-Jung Su
>
> Signed-off-by: Kuo-Jung Su
> ---
> drivers/mtd/spi/winbond.c | 17 +
Hi Alison,
On Tuesday, May 21, 2013 11:02:56 AM, Alison Wang wrote:
> This patch adds generic codes to support Freescale's Vybrid MVF600 CPU.
>
> It aligns Vybrid MVF600 platform with i.MX platform. As there are
> some differences between MVF600 and i.MX platforms, the specific
> codes are in the
Hi Kees,
On Tue, 21 May 2013 14:38:01 +0200, Kees Jongenburger
wrote:
> To my
> understanding also enabling d-cache on ARM has no effect as long as
> the MMU is not turned on so I totally miss the point.
Enabling dcache gives DDR access performance benefits regardless of
enabling MMU.
> Greeti
Hi Alison,
On Tuesday, May 21, 2013 11:02:55 AM, Alison Wang wrote:
> This series contain the support for Freescale Vybrid MVF600 CPU and MVF600TWR
> board.
>
> Vybird devices are built on an asymmetrical-multiprocessing architecture
> using ARM cores. The families in the Vybrid portfolio span en
On Tue, 2013-05-21 at 17:00 +0200, Marek Vasut wrote:
> > Yes, the patch as it is will only affects relocation speed and preserve
> > SRAM from corruption.
>
> Now this is the right (convincing) argument! What kind of corruption ? When
> does
> it occur ?
The whole 256 kB of SRAM could be used
On Tue, 2013-05-21 at 13:22 +0200, Marek Vasut wrote:
> > Actually, I wonder if Linux's cpufreq still does depend on bootloader speed
> > settings. Especially the turbo bit. Can you please check that? It'd be
> > interesting to know ...
> >
> > I'd say enable it by default ... I probably have all
Dear Wolfgang Denk,
> Dear Marek Vasut,
>
> In message <1369070715-9585-3-git-send-email-ma...@denx.de> you wrote:
> > + # Use per-board CCACHE directory
> > + if [ "x${CCACHE}" != "x" ] ; then
>
> Why not simply:
>
> if [ "${CCACHE}" ] ; then
>
> ?
>
> > + export CCACHE_D
Dear Sergey Yanovich,
> Dear Marek Vasut,
>
> On Tue, 2013-05-21 at 13:38 +0200, Marek Vasut wrote:
> > Yes, it's just an in-CPU RAM.
>
> Well, it is not 'just' RAM. It preserves its state during deep sleep and
> power off modes.
So does RAM during sleep state ;-)
> > > Anyway, SRAM preserves
Dear Wolfgang Denk,
> Dear Marek Vasut,
>
> In message <1369070715-9585-2-git-send-email-ma...@denx.de> you wrote:
> > Prefix HOSTCC and CC with CCACHE variable to allow easy use of ccache.
> > In case the user wants to use ccache, exporting CCACHE=ccache will do
> > the trick. It is of course po
Hi,
On Tue, May 21, 2013 at 6:24 PM, Rajeshwari Birje
wrote:
> Hi All,
>
> I use the DWMMC driver in u-boot mainline on exynos board and face the
> following issue.
>
> I do a mmc rescan 3 times, then fourth time I get a DATA ERROR, which
> is due to FIFO underun/overun, after which I don't even
On 05/21/2013 06:02 AM, Alison Wang wrote:
+#ifdef CONFIG_MXC_OCOTP
+void enable_ocotp_clk(unsigned char enable)
+{
+ struct ccm_reg *ccm = (struct ccm_reg *)CCM_BASE_ADDR;
+ u32 reg;
+
+ reg = readl(&ccm->ccgr6);
+ if (enable)
+ reg |= CCM_CCGR6_OCOTP_CTRL_
This patch fix wrong value returned by 's5p_gpio_part_max' function
for Exynos4412.
Signed-off-by: Piotr Wilczek
Signed-off-by: Kyungmin Park
CC: Minkyu Kang
---
arch/arm/include/asm/arch-exynos/gpio.h | 17 +
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/arc
Hi Benoît,
On Mon, May 20, 2013 at 12:39 PM, Benoît Thébaudeau
wrote:
> Can you test this series on mx31pdk (directly changed by this series), and
> some
> other i.MX EVK (e.g. ARMv7, so mx51evk or mx53*) board please? That should be
> enough for ARM.
I don't have access to my mx31pdk currentl
Hi,
I think this reviewed already, but have a very few comments.
On Wed, Jan 23, 2013 at 12:00 PM, Rajeshwari Shinde
wrote:
> This patch adds driver for the gigabyte devices
> GD25LQ and GD25Q64B required for Snow Board.
>
> Signed-off-by: Rajeshwari Shinde
> ---
> Changes in V2:
> - Ad
This patch add support for new multi function pmic max77693.
The driver is split into three modules: pmic, muic and fuelgage.
Signed-off-by: Piotr Wilczek
Signed-off-by: Kyungmin Park
CC: Minkyu Kang
---
Makefile |1 +
drivers/power/mfd/Makefile| 49 +
This patch add new functions to pmic max77686 to set voltage and mode.
Signed-off-by: Piotr Wilczek
Signed-off-by: Kyungmin Park
CC: Minkyu Kang
CC: Rajeshwari Shinde
Acked-by: Rajeshwari Shinde
---
Changes in v2:
- changed printf to debug
drivers/power/pmic/pmic_max77686.c | 186
Hi All,
I use the DWMMC driver in u-boot mainline on exynos board and face the
following issue.
I do a mmc rescan 3 times, then fourth time I get a DATA ERROR, which
is due to FIFO underun/overun, after which I don't even get Command
done interrupt.
Later on the mmcinfo value also is displayed wr
On 26/03/13 18:37, Inderpal Singh wrote:
> The Arndale board is based on samsung's exynos5250 SOC.
>
> First patch just removes the redundant SPI configs from common exynos5250
> config file. Second patch moves the board specific configs to board specific
> config file. The third adds the andale b
Hello,
On Thu, May 16, 2013 at 5:37 PM, Henrik Nordström
wrote:
> Or maybe just punt it. If you are on an arch with incoherent caches then
> make sure to make use of the cache command to flush caches and maybe
> even disable caches before using go.
This is indeed the behaviour one would expect fr
Dear Michael Heimpold,
In message <1369078482-5863-1-git-send-email-m...@heimpold.de> you wrote:
> Closing a file descriptor does not guarantee that the data has been
> successfully saved to disk, as the kernel might defer the write.
What is the exact problem you are trying to fix?
I mean, when
Dear Marek Vasut,
In message <1369070715-9585-3-git-send-email-ma...@denx.de> you wrote:
> + # Use per-board CCACHE directory
> + if [ "x${CCACHE}" != "x" ] ; then
Why not simply:
if [ "${CCACHE}" ] ; then
?
> + export CCACHE_DIR="`${CCACHE} -s | grep "^cache direc
Dear Marek Vasut,
In message <1369070715-9585-2-git-send-email-ma...@denx.de> you wrote:
> Prefix HOSTCC and CC with CCACHE variable to allow easy use of ccache.
> In case the user wants to use ccache, exporting CCACHE=ccache will do
> the trick. It is of course possible to either make the cross-c
Dear Kuo-Jung Su,
In message
you wrote:
>
> How about making the weak aliased arch_preboot_os() global, and then
> get it invoked
> in both bootm & go?
> It looks much pretty to me, and we don't even worry about the i-cache issues.
That would not really help as it would be architecure specific,
Dear Henrik,
In message <1368920138.23379.14.camel@localhost> you wrote:
>
> I think it would be a great addition to add generic filesystem
> operations to the standalone API. The fs_read() and fs_write() functions
> should be possible to export via the standalone API as-is, but should
> probably
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