Hi,
Memory hardware today offers capabilities for managing power
consumption, like multiple lower power statest. Few SoCs, like the TI
Panda board, offers support for Partial Array Self Refresh (PASR), by
which partial areas of memory could be turned off to save power.
Further, few other SoCs have
Hello
Albert ARIBAUD wrote:
> In message<4dd760eb.2050...@elsoft.ch> you wrote:
>>
>> please also apply the following patch and friends
>>
>> http://patchwork.ozlabs.org/patch/93595/
>>
>> this will make VCMA9 board work with current U-Boot release.
>
> Applied to arm tree, will send a pull requ
Signed-off-by: Peter Kong
---
board/samsung/smdk2410/smdk2410.c | 18 +-
1 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/board/samsung/smdk2410/smdk2410.c
b/board/samsung/smdk2410/smdk2410.c
index 76a24bb..479ca8c 100644
--- a/board/samsung/smdk2410/smdk2410.c
++
smdk2410: coding style cleanup
Peter Kong (1):
smdk2410:coding style cleanup
board/samsung/smdk2410/smdk2410.c | 18 +-
1 files changed, 9 insertions(+), 9 deletions(-)
--
1.7.2.5
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Dear Peter.K,
On 28 May 2011 00:43, Peter.K wrote:
> Hello:
>
> I created a simple coding style patch by checkpatch.pl for Samsung sdk2410.
> May I upload the patch to mail list?
>
Sure.
Thank
Minkyu Kang
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On Sun, May 29, 2011 at 8:55 AM, Wolfgang Denk wrote:
> Dear Scott McNutt,
>
> In message <4ddfa206.5050...@psyent.com> you wrote:
>>
>> >>> Besides, Nios can return an increment of 10 (presumably ms) between
>> >>> two immediately consecutive calls. This causes early timeouts in CFI
>> >>> driver
Dear Scott McNutt,
In message <4ddfa206.5050...@psyent.com> you wrote:
>
> >>> Besides, Nios can return an increment of 10 (presumably ms) between
> >>> two immediately consecutive calls. This causes early timeouts in CFI
> >>> driver
...
> And this is what reset_timer() corrected.
I cannot see h
---
arch/x86/cpu/sc520/sc520_timer.c | 46 ++-
arch/x86/include/asm/global_data.h | 16
arch/x86/include/asm/ic/sc520.h|3 ++
arch/x86/lib/board.c | 12 -
arch/x86/lib/timer.c | 15 +---
boar
---
This is a little fixup patch unrelated specifically to the timer rework
I will send this as an independent patch later
arch/x86/cpu/start.S |3 ++-
arch/x86/include/asm/global_data.h | 19 ---
arch/x86/include/asm/ic/sc520.h|8
lib/asm-offs
---
include/common.h |4
lib/time.c | 45 +
2 files changed, 49 insertions(+), 0 deletions(-)
diff --git a/include/common.h b/include/common.h
index 21c05db..ddb5c03 100644
--- a/include/common.h
+++ b/include/common.h
@@ -622,6 +622,7
There is no need to use set_timer() and reset_timer() and there are build
breakages occuring because of them (specifically cfi_flash). Remove any
usage outside arch/ to fix build breakages and to prepare for complete
removal
The Nios2 timer implentation updates every 10ms (increases in 10ms steps)
This is a preview patch series for the new timer API implemented for the
x86 architecture. It provides a proof of concept for the API currently
under discussion. Some of the details are yet to be finalised, but
hopefully this patchset will give some insight into where we are going.
Note in particul
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