---
This is a little fixup patch unrelated specifically to the timer rework
I will send this as an independent patch later

 arch/x86/cpu/start.S               |    3 ++-
 arch/x86/include/asm/global_data.h |   19 -------------------
 arch/x86/include/asm/ic/sc520.h    |    8 --------
 lib/asm-offsets.c                  |    3 +++
 4 files changed, 5 insertions(+), 28 deletions(-)

diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S
index 7ccc076..31de0f8 100644
--- a/arch/x86/cpu/start.S
+++ b/arch/x86/cpu/start.S
@@ -30,6 +30,7 @@
 #include <version.h>
 #include <asm/global_data.h>
 #include <asm/processor-flags.h>
+#include <asm-offsets.h>

 .section .text
 .code32
@@ -114,7 +115,7 @@ relocate_code:

        /* Setup call address of in-RAM copy of board_init_r() */
        movl    $board_init_r, %ebp
-       addl    (GD_RELOC_OFF * 4)(%edx), %ebp
+       addl    (GENERATED_GD_RELOC_OFF)(%edx), %ebp

        /* Setup parameters to board_init_r() */
        movl    %edx, %eax
diff --git a/arch/x86/include/asm/global_data.h 
b/arch/x86/include/asm/global_data.h
index f8a16d6..f977dbe 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -58,25 +58,6 @@ extern gd_t *gd;

 #endif

-/* Word Offsets into Global Data - MUST match struct gd_t */
-#define GD_BD          0
-#define GD_FLAGS       1
-#define GD_BAUDRATE    2
-#define GD_HAVE_CONSOLE        3
-#define GD_RELOC_OFF   4
-#define GD_LOAD_OFF    5
-#define GD_ENV_ADDR    6
-#define GD_ENV_VALID   7
-#define GD_CPU_CLK     8
-#define GD_BUS_CLK     9
-#define GD_RELOC_ADDR  10
-#define GD_START_ADDR_SP       11
-#define GD_RAM_SIZE    12
-#define GD_RESET_STATUS        13
-#define GD_JT          14
-
-#define GD_SIZE                15
-
 /*
  * Global Data Flags
  */
diff --git a/arch/x86/include/asm/ic/sc520.h b/arch/x86/include/asm/ic/sc520.h
index 956c1c2..8b5f47c 100644
--- a/arch/x86/include/asm/ic/sc520.h
+++ b/arch/x86/include/asm/ic/sc520.h
@@ -260,14 +260,6 @@ extern sc520_mmcr_t *sc520_mmcr;
 #define SC520_MMCR_BASE                0xfffef000

 /* MMCR Addresses (required for assembler code) */
-#define SC520_DRCCTL           (SC520_MMCR_BASE + 0x010)
-#define SC520_DRCTMCTL         (SC520_MMCR_BASE + 0x012)
-#define SC520_DRCCFG           (SC520_MMCR_BASE + 0x014)
-#define SC520_DRCBENDADR       (SC520_MMCR_BASE + 0x018)
-#define SC520_ECCCTL           (SC520_MMCR_BASE + 0x020)
-#define SC520_DBCTL            (SC520_MMCR_BASE + 0x040)
-#define SC520_ECCINT           (SC520_MMCR_BASE + 0xd18)
-
 #define SC520_PAR0             (SC520_MMCR_BASE + 0x088)
 #define SC520_PAR1             (SC520_PAR0 + (0x04 * 1))
 #define SC520_PAR2             (SC520_PAR0 + (0x04 * 2))
diff --git a/lib/asm-offsets.c b/lib/asm-offsets.c
index c88f5d4..6ae32dc 100644
--- a/lib/asm-offsets.c
+++ b/lib/asm-offsets.c
@@ -28,5 +28,8 @@ int main(void)
        DEFINE(GENERATED_BD_INFO_SIZE,
                (sizeof(struct bd_info) + 15) & ~15);

+       DEFINE(GENERATED_GD_RELOC_OFF,
+               (offsetof(gd_t, reloc_off)));
+
        return 0;
 }
--
1.7.5.2.317.g391b14

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