2011/4/11 Kumar Gala :
>
> On Apr 10, 2011, at 11:43 PM, Jason Liu wrote:
>
>> Hi, Kumar Gala
>>
>> 2011/3/22 Jason Liu :
>>> For freescale i.MX53 eSDHCv2, when using CMD12, cmdtype need
>>> to be set to ABORT, otherwise, next read command will hang.
>>>
>>> This is a software Software Restrictions
Hi all,
I have been having issues in the past with U-Boot mail bouncing on my
current e-mail address to the point that the U-boot list server had to
disable my mailing list membership occasionally, and it seems these
issues are creeping up again.
This means I have missed some e-mails on the li
On Apr 10, 2011, at 11:43 PM, Jason Liu wrote:
> Hi, Kumar Gala
>
> 2011/3/22 Jason Liu :
>> For freescale i.MX53 eSDHCv2, when using CMD12, cmdtype need
>> to be set to ABORT, otherwise, next read command will hang.
>>
>> This is a software Software Restrictions in i.MX53 reference manual:
>>
Hi, Kumar Gala
2011/3/22 Jason Liu :
> For freescale i.MX53 eSDHCv2, when using CMD12, cmdtype need
> to be set to ABORT, otherwise, next read command will hang.
>
> This is a software Software Restrictions in i.MX53 reference manual:
>
> 29.7.8 Multi-block Read
> For pre-defined multi-block read
Hi I am trying to detect a daughter card chip. From data sheet I was able to
find the address for that chip. But when I use i2c probe command from uboot
shell, it is showing me only 4 addresses. And these 4 addresses does not
contain the address of any chip on the daughter card.
So my query is :
Hi Stefano,
On 3/11/2011 10:33 AM, Stefano Babic wrote:
> On 03/10/2011 08:26 PM, Fabio Estevam wrote:
>
>> +void mx31_read_cpu_rev(void)
>
> Generally, for exported function, I would prefer to remove the processor
> name. For other i.MX processors we use the convention
> mxc_, as we can get rid
Use the same method of the Linux kernel to print the MX31 silicon version on
boot.
Tested on a MX31PDK with a 2.0 silicon, where it shows:
CPU: Freescale i.MX31 at 531 MHz
MX31 silicon rev 2.0
Signed-off-by: Fabio Estevam
---
Changes since v1:
- rename the CPU detect function name to get_cpu
Add evaluation board "adp-ag101" aconfiguration file adp-ag101.h.
Add adp-ag101.c board config and related settings.
Add board adp-ag101 into boards.cfg
Signed-off-by: Macpaul Lin
---
Changes for v1-v4:
- code clean up
Changes for v5-v6:
- Refine the definitions and parameters about CLK,
Add support of NDS32 to common commands bdinfo, bootm, and image format.
Signed-off-by: Macpaul Lin
---
common/cmd_bdinfo.c | 28 +++-
common/cmd_bootm.c |2 ++
common/image.c |1 +
include/image.h |5 +
4 files changed, 35 insertions(+), 1 del
Add standalone program related support for nds32 architecture.
Signed-off-by: Macpaul Lin
---
examples/standalone/nds32.lds | 64 +
examples/standalone/stubs.c | 17 +-
examples/standalone/x86-testapp.c | 12 +++
3 files changed, 92
Add Makefile, board.c, interrupts.c and bootm.c functions
to nds32 architecture.
Signed-off-by: Macpaul Lin
---
Changes for v1-v4:
- code clean up and formatting style.
Changes for v5-v6:
- board.c
- Do some clean up and add code
- Remove display banner which hasn't support.
- Add f
Add main function of SoC ag101 based on NDS32 n1213 core.
cpu.c
According to the bootstrap procedure in n1213 Core,
to turn off watchdog timer is suggested after the
cpu is in superuser mdoe.
1. bootstrap
1.1 reset - start of Andesboot
1.2 to superuser mode - as is when reset
1.3 Turn off
lowlevel_init.S is a peripheral initial procedure of ag101.
It configures onboard dram, clock, and power settings.
It also prepars the dram environment before moving u-boot
from rom and flash into dram.
This version of lowlevel_init.S also replace hardcode value
by MARCO defines from the GPL versi
Add header file of device offset support for SoC ag101.
SoC ag101 is the first chip using NDS32 N1213 cpu core.
Note:
Ag101 is actually use ftsdmc021 instead of ftsdmc020
as dram controller, which is probably wrong in the datasheet.
Signed-off-by: Macpaul Lin
---
arch/nds32/include/asm/a
Add N1213 cpu core (N12 Core family) support for NDS32 arch.
This patch includes start.S for the initialize procedure of N1213.
NDS32 Core N1213 has the following hardware features.
Core:
- 16-/32-bit mixable instruction format
- 32 general-purpose 32-bit registers
- 8-stage pipeline
- D
Add generic header files support for nds32 architecture.
Cache, ptrace, data type and other definitions are included.
Signed-off-by: Macpaul Lin
---
Changes for v1-v4:
- Code cleanup and style formatting.
Changes for v5-v6:
- This patch also updated the following changes against the
c
Add NDS32 support into common header file.
Signed-off-by: Macpaul Lin
---
include/common.h |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/include/common.h b/include/common.h
index 54503ed..423bbd8 100644
--- a/include/common.h
+++ b/include/common.h
@@ -273,6 +273,10
Hi Wolfgang,
>>> I did check typedefs one by one by myself in hand and eye checking.
>>> If some thing is not suitable for using "typedefs" please let me know.
>>
>> Please don't add any new typedef's.
>>
>
> I think we still have to discuss about the typedef's.
> What does the "new" typedef means
On Sunday 10 April 2011 22:06:29 Mike Frysinger wrote:
> The M29W800DT parts also report their geometry with the sector layout
> reversed. So add that ID to the flash_fixup_stm function.
Maybe rework the stuff below into some table or it'll be a mess soon?
Cheers
>
> Otherwise, we get:
> bfin>
Fix the nand_spl build for the hawkboard
Signed-off-by: Sughosh Ganu
---
nand_spl/board/davinci/da8xxevm/u-boot.lds |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/nand_spl/board/davinci/da8xxevm/u-boot.lds
b/nand_spl/board/davinci/da8xxevm/u-boot.lds
index c86117b..63
The M29W800DT parts also report their geometry with the sector layout
reversed. So add that ID to the flash_fixup_stm function.
Otherwise, we get:
bfin> flinfo
Bank # 1: CFI conformant FLASH (16 x 16) Size: 1 MB in 19 Sectors
AMD Standard command set, Manufacturer ID: 0x20, Device ID: 0x22D7
Dear Kumar Gala,
In message you
wrote:
> The following changes since commit 4db2fa7f9446d0f2fe8db3d62184b1212fe22707:
>
> Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx (2011-04-05
> 12:24:20 +0200)
>
> are available in the git repository at:
>
> git://git.denx.de/u-boot-mpc85
Dear Scott McNutt,
In message <4d9f09ec.70...@psyent.com> you wrote:
> Dear Wolfgang,
>
> The following changes since commit 4db2fa7f9446d0f2fe8db3d62184b1212fe22707:
>Wolfgang Denk (1):
> Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
>
> are available in the git reposit
Dear Mike Frysinger,
In message <1302238070-32427-1-git-send-email-vap...@gentoo.org> you wrote:
> The following changes since commit 4db2fa7f9446d0f2fe8db3d62184b1212fe22707:
>
> Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx (2011-04-05
> 12:24:20 +0200)
>
> are available in the
Dear Stefan Roese,
In message <201104071025.32882...@denx.de> you wrote:
> Hi Wolfgang,
>
> please pull the following changes:
>
> The following changes since commit 4db2fa7f9446d0f2fe8db3d62184b1212fe22707:
>
> Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx (2011-04-05
> 12:24:20
Signed-off-by: Fabio Estevam
---
Changes since v1:
- Use 3 bits for rcsr mask
board/freescale/mx31pdk/mx31pdk.c | 25 -
1 files changed, 24 insertions(+), 1 deletions(-)
diff --git a/board/freescale/mx31pdk/mx31pdk.c
b/board/freescale/mx31pdk/mx31pdk.c
index 4ef548f..
Signed-off-by: Fabio Estevam
---
Changes since v1:
- define BOARD_LATE_INIT in /mx31pdk.h
board/freescale/mx31pdk/mx31pdk.c | 16
include/configs/mx31pdk.h |3 +++
2 files changed, 19 insertions(+), 0 deletions(-)
diff --git a/board/freescale/mx31pdk/mx31pdk.c
b/
On Feb 14, 2011, at 5:59 AM, Fabian Cenedese wrote:
> Removed clearing of L2 cache as SRAM as it is not necessary without ECC.
> This also speeds up the booting process.
>
> Signed-off-by: Fabian Cenedese
> Cc: Kumar Gala
> ---
> arch/powerpc/cpu/mpc85xx/cpu_init_nand.c |7 ---
> 1 file
The following changes since commit 4db2fa7f9446d0f2fe8db3d62184b1212fe22707:
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx (2011-04-05
12:24:20 +0200)
are available in the git repository at:
git://git.denx.de/u-boot-mpc85xx master
Haiying Wang (1):
powerpc/85xx: Add P1021
On Apr 10, 2011, at 10:30 AM, Stefano Babic wrote:
> On 03/07/2011 05:14 AM, Kumar Gala wrote:
>> From: Priyanka Jain
>>
>> P1010 and P1014 has v2.3 version of FSL eSDHC controller in which watermark
>> level register description has been changed:
>>
>> 9-15 bits represent WR_WML[0:6], Max val
On 03/09/2011 05:35 PM, Fabio Estevam wrote:
> Signed-off-by: Fabio Estevam
> ---
> board/freescale/mx31pdk/mx31pdk.c | 16
> include/configs/mx31pdk.h |1 +
> 2 files changed, 17 insertions(+), 0 deletions(-)
>
> diff --git a/board/freescale/mx31pdk/mx31pdk.c
> b
On 03/07/2011 05:14 AM, Kumar Gala wrote:
> From: Priyanka Jain
>
> P1010 and P1014 has v2.3 version of FSL eSDHC controller in which watermark
> level register description has been changed:
>
> 9-15 bits represent WR_WML[0:6], Max value = 128 represented by 0x00
> 25-31 bits represent RD_WML[0:
Ping!
Wolfgang,
should I have also send this to Albert or/and Sandeep?
On 04/05/11 10:08, Igor Grinberg wrote:
> This patch serie s based on the latest U-Boot release (v2011.03) and
> updates support for Compulab CM-T35 board:
> 1) Some clean up
> 2) MMC/SD Card fix
> 3) Add Green Status LE
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