Author: zbb
Date: Sat Feb 15 13:13:00 2014
New Revision: 261917
URL: http://svnweb.freebsd.org/changeset/base/261917
Log:
Always clear L1 PTE descriptor when removing superpage on ARM
Invalidate L1 PTE regardles of existance of the corresponding
l2_bucket. This is relevant when superpage
Author: zbb
Date: Sat Feb 15 13:17:51 2014
New Revision: 261918
URL: http://svnweb.freebsd.org/changeset/base/261918
Log:
Ensure proper TLB invalidation on superpage promotion and demotion on ARM
Base pages within newly created superpage need to be invalidated so that
new mapping is "visi
Author: zbb
Date: Sat Feb 15 13:20:17 2014
New Revision: 261919
URL: http://svnweb.freebsd.org/changeset/base/261919
Log:
Fix superpage promotion on ARM with respect to RO/RW and wired attributes
It was possible to create RW superpage mapping even if
the base pages were RO due to wrong se
Author: zbb
Date: Sat Feb 15 13:22:37 2014
New Revision: 261920
URL: http://svnweb.freebsd.org/changeset/base/261920
Log:
Avoid redundant superpage promotion attempts on ARM
Because pmap_enter_locked() is called from few different functions
some redundancy in superpage promotion attempts
Author: zbb
Date: Sat Feb 15 13:24:58 2014
New Revision: 261921
URL: http://svnweb.freebsd.org/changeset/base/261921
Log:
Remove spurious assertion from pmap_extract_locked() on ARM
The condition under assertion is no longer valid since
superpages support is operating on section mappings.
Author: zbb
Date: Sat Feb 15 13:27:45 2014
New Revision: 261922
URL: http://svnweb.freebsd.org/changeset/base/261922
Log:
Handle pmap_enter() on already promoted mappings for ARMv6/v7
Attempt to demote the superpage if trying to pmap_enter() on
one. Panic only when the particular superpag
2013/8/8 Zbyszek Bodek
> On 07.08.2013 20:55, Jeff Roberson wrote:
> > On Wed, 7 Aug 2013, Zbyszek Bodek wrote:
> >
> >> On 07.08.2013 08:21, Jeff Roberson wrote:
> >>> Author: jeff
> >>> Date: Wed Aug 7 06:21:20 2013
> >>> New Revision: 254025
> >>> URL: http://svnweb.freebsd.org/changeset/base
2013/8/10 Olivier Houchard
> On Fri, Aug 09, 2013 at 10:27:48AM +0200, Zbigniew Bodek wrote:
> > 2013/8/8 Zbyszek Bodek
> >
> > > On 07.08.2013 20:55, Jeff Roberson wrote:
> > > > On Wed, 7 Aug 2013, Zbyszek Bodek wrote:
> > > >
&
2013/8/7 Olivier Houchard
> Author: cognet
> Date: Wed Aug 7 15:44:58 2013
> New Revision: 254061
> URL: http://svnweb.freebsd.org/changeset/base/254061
>
> Log:
> Don't bother trying to work around buffers which are not aligned on a
> cache
> line boundary. It has never been 100% correct, a
2013/8/11 Olivier Houchard
> On Sat, Aug 10, 2013 at 04:50:36PM +0200, Zbigniew Bodek wrote:
> > 2013/8/7 Olivier Houchard
> >
> > > Author: cognet
> > > Date: Wed Aug 7 15:44:58 2013
> > > New Revision: 254061
> > > URL: http://svnwe
2013/8/16 Konstantin Belousov
> Author: kib
> Date: Fri Aug 16 14:22:20 2013
> New Revision: 254415
> URL: http://svnweb.freebsd.org/changeset/base/254415
>
> Log:
> Restore the previous sendfile(2) behaviour on the block devices.
> Provide valid .fo_sendfile method for several missed struct
Log:
> > Implement pmap_copy() for ARMv6/v7.
> >
> > Copy the given range of mappings from the source map to the
> > destination map, thereby reducing the number of VM faults on fork.
> >
> > Submitted by: Zbigniew Bodek
> > Sponsored by: The FreeBSD
ciech A. Koszek\nwkos
wollman [label="Garrett Wollman\nwoll...@freebsd.org\n/??/??"]
wsalamon [label="Wayne Salamon\nwsala...@freebsd.org\n2005/06/25"]
yongari [label="Pyun YongHyeon\nyong...@freebsd.org\n2004/08/01"]
+zbb [label="Zbigniew Bodek\n...@free
Author: zbb
Date: Mon Sep 16 10:34:44 2013
New Revision: 255611
URL: http://svnweb.freebsd.org/changeset/base/255611
Log:
Write protect base page after superpage demotion so that it may repromote
When clearing the modification status of the superpage, one of the
base pages produced during
Author: zbb
Date: Mon Sep 16 10:39:35 2013
New Revision: 255612
URL: http://svnweb.freebsd.org/changeset/base/255612
Log:
Implement pmap_advise() for ARMv6/v7 pmap module
Apply the given advice to the specified range of addresses within the
given pmap. Depending on the advice, clear the r
Author: zbb
Date: Mon Sep 16 10:46:58 2013
New Revision: 255613
URL: http://svnweb.freebsd.org/changeset/base/255613
Log:
Fix GCC build error when building for ARMv6
Apply theravens's idea to move __strong_reference
macros into the proper ifdef section.
Approved by: cognet (mentor)
2013/9/16 Ed Schouten
> 2013/9/16 Zbigniew Bodek :
> > Log:
> > Fix GCC build error when building for ARMv6
> >
> > Apply theravens's idea to move __strong_reference
> > macros into the proper ifdef section.
> >
> > Approved by: cogne
2013/9/17 Zbigniew Bodek
> 2013/9/16 Ed Schouten
>
>> 2013/9/16 Zbigniew Bodek :
>> > Log:
>> > Fix GCC build error when building for ARMv6
>> >
>> > Apply theravens's idea to move __strong_reference
>> > macros into the
Author: zbb
Date: Wed Jan 1 20:03:48 2014
New Revision: 260161
URL: http://svnweb.freebsd.org/changeset/base/260161
Log:
Add polarity and level support to ARM GIC
Add suport for setting triggering level and polarity in GIC.
New function pointer was added to nexus which corresponds
to t
Author: zbb
Date: Wed Jan 1 20:18:03 2014
New Revision: 260163
URL: http://svnweb.freebsd.org/changeset/base/260163
Log:
Do not attach to PCI bridges in AHCI driver
Some vendors use the same VID:PID combination in AHCI and PCI bridge cards
Submitted by: Wojciech Macek
Obtained from
Author: zbb
Date: Wed Jan 1 20:26:08 2014
New Revision: 260165
URL: http://svnweb.freebsd.org/changeset/base/260165
Log:
Use only mapped BIOs on ARM
Using unmapped BIOs causes failure inside bus_dmamap_sync, since
this function requires valid MVA address, which is not present
if mappin
Author: zbb
Date: Wed Jan 1 20:35:38 2014
New Revision: 260166
URL: http://svnweb.freebsd.org/changeset/base/260166
Log:
Fix race condition in DELAY for SP804 timer.
Fix race condition in DELAY function: sc->tc was not initialized yet when
time_counter pointer was set, what resulted in N
Author: zbb
Date: Thu Jan 2 11:24:04 2014
New Revision: 260189
URL: http://svnweb.freebsd.org/changeset/base/260189
Log:
Revert r260165: Proper configuration of unmapped_buf_allowed should be used
To avoid failures in bus_dmamap_sync() on ARM unmapped_buf_allowed should
be set to 0. Henc
On 01.01.2014 21:32, Konstantin Belousov wrote:
> On Wed, Jan 01, 2014 at 08:26:08PM +0000, Zbigniew Bodek wrote:
>> Author: zbb Date: Wed Jan 1 20:26:08 2014 New Revision: 260165
>> URL: http://svnweb.freebsd.org/changeset/base/260165
>>
>> Log: Use only mapp
2014/1/2 John Baldwin :
> On Wednesday, January 01, 2014 3:18:03 pm Zbigniew Bodek wrote:
>> Author: zbb
>> Date: Wed Jan 1 20:18:03 2014
>> New Revision: 260163
>> URL: http://svnweb.freebsd.org/changeset/base/260163
>>
>> Log:
>> Do not atta
2014/1/6 Ian Lepore :
> On Wed, 2014-01-01 at 20:03 +0000, Zbigniew Bodek wrote:
>> Author: zbb
>> Date: Wed Jan 1 20:03:48 2014
>> New Revision: 260161
>> URL: http://svnweb.freebsd.org/changeset/base/260161
>>
>> Log:
>> Add polarity and level supp
2014/1/6 Andreas Tobler :
> On 06.01.14 03:55, Ian Lepore wrote:
>> On Wed, 2014-01-01 at 20:03 +, Zbigniew Bodek wrote:
>>> Author: zbb
>>> Date: Wed Jan 1 20:03:48 2014
>>> New Revision: 260161
>>> URL: http://svnweb.freebsd.org/changeset/ba
2013/12/22 Dimitry Andric :
> Author: dim
> Date: Sun Dec 22 17:51:33 2013
> New Revision: 259730
> URL: http://svnweb.freebsd.org/changeset/base/259730
>
> Log:
> To avoid having to explicitly test COMPILER_TYPE for setting
> clang-specific or gcc-specific flags, introduce the following new
>
Author: zbb
Date: Tue Nov 19 23:31:39 2013
New Revision: 258358
URL: http://svnweb.freebsd.org/changeset/base/258358
Log:
Avoid clearing EXEC permission bit when setting the page RW on ARMv6/v7
When emulating modified bit the executable attribute was cleared by
mistake when calling pmap_s
Author: zbb
Date: Tue Nov 19 23:37:50 2013
New Revision: 258359
URL: http://svnweb.freebsd.org/changeset/base/258359
Log:
Apply access flags for managed and unmanaged pages properly on ARMv6/v7
When entering a mapping via pmap_enter() unmanaged pages ought to be
naturally excluded from th
Author: zbb
Date: Mon Dec 2 13:09:59 2013
New Revision: 258845
URL: http://svnweb.freebsd.org/changeset/base/258845
Log:
Enable missing Access Flag for secondary cores on ARMv6/v7
Spotted by: Wojciech Macek
Obtained from:Semihalf
> Description of fields to fill in above:
Author: zbb
Date: Fri Sep 20 20:44:32 2013
New Revision: 255738
URL: http://svnweb.freebsd.org/changeset/base/255738
Log:
Fix GCC build for all ARMs. Revert bug introduced in r255613.
Previous change applied in r255613 fixed build for ARMv6 but
broke it for previous architecture revisions
Author: zbb
Date: Sat Oct 26 17:24:59 2013
New Revision: 257170
URL: http://svnweb.freebsd.org/changeset/base/257170
Log:
Wait for DesignWare UART transfers completion before accessing line control
When using DW UART with BUSY detection it is necessary to wait
until all serial transfers a
Author: zbb
Date: Sat Oct 26 17:27:32 2013
New Revision: 257171
URL: http://svnweb.freebsd.org/changeset/base/257171
Log:
Enable UART busy detection handling for Armada XP - based board
All Armada XP chips should be affected. It is necessary to handle
busy interrupt/indication by enabling
Author: zbb
Date: Sat Oct 26 17:29:50 2013
New Revision: 257172
URL: http://svnweb.freebsd.org/changeset/base/257172
Log:
Enable SATA interface on Armada XP
- Add appropriate entry to DTS
- Allow for MV78460 SATA probe and configuration
Tested by:kevlo
Approved by: cognet (men
Author: zbb
Date: Mon Oct 28 07:18:24 2013
New Revision: 257240
URL: http://svnweb.freebsd.org/changeset/base/257240
Log:
Run mvs SATA driver on Armada XP instead of old mv_sata
The mvs driver seems to be more functional than mv_sata and is not
causing random interrupt storms during boot.
Author: zbb
Date: Mon Oct 28 21:31:12 2013
New Revision: 257278
URL: http://svnweb.freebsd.org/changeset/base/257278
Log:
Remove hard-coded mappings related to Armada XP support
Armada XP initialization flow requires SoC registers to be
mapped very early in order to configure Snoop Filter
Author: zbb
Date: Mon Oct 28 21:34:32 2013
New Revision: 257279
URL: http://svnweb.freebsd.org/changeset/base/257279
Log:
Fix-up DTB for Armada XP registers' base according to the actual settings
Depending on u-boot's flavor some boards have their SoC registers
base address configured to
Author: zbb
Date: Mon Oct 28 21:37:45 2013
New Revision: 257280
URL: http://svnweb.freebsd.org/changeset/base/257280
Log:
Change Armada XP kernel load address to the u-boot's end address
Loading kernel to 0xf0 has no practical reason.
Starting it from the u-boot's highest possible end
Author: zbb
Date: Mon Oct 28 21:39:54 2013
New Revision: 257281
URL: http://svnweb.freebsd.org/changeset/base/257281
Log:
Remove not working and deprecated PJ4Bv6 support
Sheeva PJ4Bv6 - based chips were only prototypes for V7 class Armada
SoC family. Current in-tree support for PJ4Bv6 wi
Author: zbb
Date: Mon Oct 28 21:41:44 2013
New Revision: 257282
URL: http://svnweb.freebsd.org/changeset/base/257282
Log:
Switch off explicit broadcasting of the TLB flush operations for PJ4B CPU
Since CPU_MV_PJ4B describes ARMv7 compliant CPU there is no need for
sending an IPI each time
Author: zbb
Date: Mon Oct 28 23:42:44 2013
New Revision: 257291
URL: http://svnweb.freebsd.org/changeset/base/257291
Log:
Fix condition that determines PMAP_NEEDS_PTE_SYNC value for ARM
Use values of the correct defines to determine statement's result.
ARM_ARCH_ symbols are always defined
Author: zbb
Date: Tue Oct 29 13:16:05 2013
New Revision: 257332
URL: http://svnweb.freebsd.org/changeset/base/257332
Log:
Add missing ARMv6 CPU functions to ARM Makefile
Will fix RPI-B kernel build failure since it adds missing
armv6_idcache_wbinv_all which was previously taken from cpufu
Author: zbb
Date: Sat May 24 22:46:00 2014
New Revision: 266631
URL: http://svnweb.freebsd.org/changeset/base/266631
Log:
Enable automatic superpages promotion by default on ARMv6/v7
From now on superpages are enabled by default on ARM.
One can still disable superpages utilization by addi
Author: zbb
Date: Sun May 25 18:47:24 2014
New Revision: 266672
URL: http://svnweb.freebsd.org/changeset/base/266672
Log:
Fix context switch on PJ4Bv7 and remove obsolete pj4b_/arm11 functions
Use armv7_setttb that sets proper PT attributes.
Get rid of unused CPU functions, put nullop ins
Author: zbb
Date: Sun May 25 19:19:41 2014
New Revision: 266673
URL: http://svnweb.freebsd.org/changeset/base/266673
Log:
Delete obsolete and unused PJ4B CPU functions
Since PJ4Bv7 uses armv7_ CPU functions only pj4b_config
function is necessary. Remove obsolete routines.
Modified:
hea
Author: zbb
Date: Thu Jun 5 21:35:10 2014
New Revision: 267129
URL: http://svnweb.freebsd.org/changeset/base/267129
Log:
Fix broken SMP startup on Armada XP after r265694
During Armada's platform_mp_start_ap(), mptramp code
is being copied to the specific physical location (0x).
Author: zbb
Date: Thu Jun 5 21:37:04 2014
New Revision: 267130
URL: http://svnweb.freebsd.org/changeset/base/267130
Log:
Avoid using hard-coded SoC's register address in mptramp code for Armada XP
SoC's registers base address may differ between boards
(0xf100 or 0xd000). Therefor
Author: zbb
Date: Fri Nov 7 19:34:10 2014
New Revision: 274249
URL: https://svnweb.freebsd.org/changeset/base/274249
Log:
Avoid panic in ofwbus caused by not released resource list entry
After resource allocation and release, resource list entry
stays non-NULL. This causes panic in ofwbu
Author: zbb
Date: Wed Nov 12 21:38:31 2014
New Revision: 274451
URL: https://svnweb.freebsd.org/changeset/base/274451
Log:
Make PL011 UART to wait on putc only when TX FIFO is full
Instead of waiting for empty TX FIFO it is more reasonable to
block on full FIFO. As soon as FIFO slot is fr
Author: zbb
Date: Wed Nov 12 21:41:15 2014
New Revision: 274452
URL: https://svnweb.freebsd.org/changeset/base/274452
Log:
Make uart_bus_fdt a decendant of ofwbus
This will allow to attach UART drivers lying directly on the root node
instead of simple-bus compatible bus only.
Obtaine
Author: zbb
Date: Thu Nov 13 21:37:53 2014
New Revision: 274484
URL: https://svnweb.freebsd.org/changeset/base/274484
Log:
Fix typo in ARM GIC device_printf()
Obtained from: Semihalf
Sponsored by:The FreeBSD Foundation
Modified:
head/sys/arm/arm/gic.c
Modified: head/sys/arm/arm/
Author: zbb
Date: Wed Nov 19 14:23:29 2014
New Revision: 274711
URL: https://svnweb.freebsd.org/changeset/base/274711
Log:
Stop using early_putc immediately after configuring console with cninit()
Early UART should be released right after system console initialization is
completed. Otherw
Author: zbb
Date: Sun Dec 7 21:02:45 2014
New Revision: 275583
URL: https://svnweb.freebsd.org/changeset/base/275583
Log:
Fix buffer overflow in Marvell PCI/PCIe driver
Buffer overflow occured when more than one MSI was allocated.
Submitted by:Wojciech Macek
Obtained from: Se
Author: zbb
Date: Tue Jan 13 00:00:09 2015
New Revision: 277098
URL: https://svnweb.freebsd.org/changeset/base/277098
Log:
Introduce ofw_bus_reg_to_rl() to replace part of common bus code
Instead of reusing the same reg parsing code, create one, common function
that puts reg contents to t
Author: zbb
Date: Mon Apr 27 09:12:54 2015
New Revision: 282078
URL: https://svnweb.freebsd.org/changeset/base/282078
Log:
Introduce ddb(4) support for ARM64
Obtained from: Semihalf
Reviewed by: emaste
Sponsored by: The FreeBSD Foundation
Added:
head/sys/arm64/arm64/db_disasm.c
Author: zbb
Date: Mon Apr 27 14:18:07 2015
New Revision: 282093
URL: https://svnweb.freebsd.org/changeset/base/282093
Log:
Fix wrong cast of pointer to u_int in db_interface.c on ARM64
Fix to commit introduced in: r282078
Pointed out by: andrew
Obtained from: Semihalf
Sponsored by
Author: zbb
Date: Wed May 6 15:17:28 2015
New Revision: 282547
URL: https://svnweb.freebsd.org/changeset/base/282547
Log:
Add new CP15 operations and DB_SHOW_COMMAND to print CP15 registers
Submitted by: Wojciech Macek
Reviewed by:imp, Michal Meloun
Obtained from: Semihalf
Mo
Author: zbb
Date: Fri May 8 18:47:19 2015
New Revision: 282655
URL: https://svnweb.freebsd.org/changeset/base/282655
Log:
Port x86 busdma to ARM64
The x86 busdma subsystem allows using multiple implementations.
By default the classic bounce buffer approach is used, however
on systems w
Author: zbb
Date: Wed May 13 18:57:03 2015
New Revision: 282867
URL: https://svnweb.freebsd.org/changeset/base/282867
Log:
Add support for ARM GICv3 interrupt controller used in some ARM64 chips
GICv3 allows to distribute interrupts to more than 8 cores served by
the previous GIC revision
Author: zbb
Date: Fri May 15 18:25:48 2015
New Revision: 282985
URL: https://svnweb.freebsd.org/changeset/base/282985
Log:
Introduce support for the Alpine PoC from Annapurna Labs
The Alpine Platform-On-Chip offers multicore processing
(quad ARM Cortex-A15), 1/10Gb Ethernet, SATA 3, PCI-E
Hmmm...(facepalm).
Sorry... I did not check the patch for DOS newlines -_-' (I guess I
will need to start doing so starting from now).
Nevertheless I can't see any ^Ms in files now (ff=unix doesn't show
anything and dos2unix did not change the files).
As far as I can see bz@ fixed the only DOS new
Author: zbb
Date: Tue Mar 17 18:59:47 2015
New Revision: 280184
URL: https://svnweb.freebsd.org/changeset/base/280184
Log:
Introduce Annapurna Labs AHCI support
Overview:
* implemented quirk for forcing SATA interface enable
* restore value to status register - this enables link autoneg
Author: zbb
Date: Fri Mar 20 10:15:34 2015
New Revision: 280278
URL: https://svnweb.freebsd.org/changeset/base/280278
Log:
Allow to override default kernel virtual address assignment on ARM
Each plaform performs virtual memory split between kernel and user space
and assigns kernel certain
)
when compared.
Submitted by: Zbigniew Bodek
Reviewed by: nwhitehorn
Obtained from: Semihalf
Modified:
head/sys/dev/ofw/openfirm.c
Modified: head/sys/dev/ofw/openfirm.c
==
--- head/sys/dev/ofw/openfirm.c Mon M
Author: zbb
Date: Tue Feb 10 14:11:23 2015
New Revision: 278518
URL: https://svnweb.freebsd.org/changeset/base/278518
Log:
Resolve cache line size from CP15
Switch the cache line size during invalidations/flushes
to be read from CP15 cache type register.
Submitted by: Wojciech Macek
Author: zbb
Date: Tue Feb 24 12:31:08 2015
New Revision: 279235
URL: https://svnweb.freebsd.org/changeset/base/279235
Log:
Fix endianness on FDT read in ARM GIC
Submitted by: Jakub Palider
Reviewed by: ian, nwhitehorn
Obtained from: Semihalf
Modified:
head/sys/arm/arm/gic.c
Modi
Author: zbb
Date: Tue Feb 24 12:57:03 2015
New Revision: 279236
URL: https://svnweb.freebsd.org/changeset/base/279236
Log:
Change struct attribute to avoid aligned operations mismatch
Previous __alignment(4) allowed compiler to assume that operations are
performed on aligned region. On AR
Hello Warner,
Did you try to build world for ARMv6 on HEAD? I'm not able to do so and the
issues seems to be related to this commit (missing efivar.h file).
Kind regards
zbb
2016-10-12 0:31 GMT+02:00 Warner Losh :
> Author: imp
> Date: Tue Oct 11 22:31:45 2016
> New Revision: 307072
> URL: http
Author: zbb
Date: Mon Jul 6 18:27:41 2015
New Revision: 285213
URL: https://svnweb.freebsd.org/changeset/base/285213
Log:
Introduce ITS support for ARM64
Add ARM ITS (Interrupt Translation Services) support required
to bring-up message signalled interrupts on some ARM64 platforms.
O
Author: zbb
Date: Wed Jul 8 13:52:59 2015
New Revision: 285270
URL: https://svnweb.freebsd.org/changeset/base/285270
Log:
Add memory barrier to bus_dmamap_sync()
On platforms which are fully IO-coherent, the map might be null.
We need to guarantee that all data is observable after the
Because machdep header includes this file (not the other way).
Best regards
zbb
2015-07-08 16:30 GMT+02:00 Adrian Chadd :
> Why is this implemented in sys/sys/bus_dma.h, rather than in a machdep header?
>
>
> -a
>
>
> On 8 July 2015 at 06:53, Zbigniew Bodek wrote:
>&g
2015-07-08 17:33 GMT+02:00 Andrew Turner :
> Author: andrew
> Date: Wed Jul 8 15:32:59 2015
> New Revision: 285272
> URL: https://svnweb.freebsd.org/changeset/base/285272
>
> Log:
> Add support for ipi_all_but_self on arm64.
>
> Obtained from:ABT Systems Ltd
> Sponsored by: The freeB
Author: zbb
Date: Wed Jul 8 22:09:47 2015
New Revision: 285293
URL: https://svnweb.freebsd.org/changeset/base/285293
Log:
Style cleanups after r285270
There should be no semicolons in added macro definitions.
Define empty macro as "do {} while (0)".
Pointed out by: jmg
Modified:
Hello,
You are absolutely right. Especially semicolons... I must have missed
this somehow.
Thanks. Fixed in r285293.
Best regards
zbb
2015-07-08 21:47 GMT+02:00 John-Mark Gurney :
> Zbigniew Bodek wrote this message on Wed, Jul 08, 2015 at 13:53 +:
>> +#if defined(__arm__)
>>
Author: zbb
Date: Thu Jul 9 11:32:29 2015
New Revision: 285311
URL: https://svnweb.freebsd.org/changeset/base/285311
Log:
Rework CPU identification on ARM64
This commit reworks the code responsible for identification of
the CPUs during runtime.
It is necessary to provide a way for work
Author: zbb
Date: Sun Jul 12 17:28:31 2015
New Revision: 285421
URL: https://svnweb.freebsd.org/changeset/base/285421
Log:
Implement stubs for ACPI PCI routines
ACPI driver requires special functions to be provided by machdep code.
Add temporary stubs to satisfy the compiler when both "pc
Author: zbb
Date: Sun Jul 12 18:32:16 2015
New Revision: 285423
URL: https://svnweb.freebsd.org/changeset/base/285423
Log:
Add ARM64TODO comments to ACPI PCI stubs
This will make searching for missing functionalities easier.
Modified:
head/sys/arm64/acpica/pci_cfgreg.c
Modified: head/sy
Author: zbb
Date: Sun Jul 12 21:35:45 2015
New Revision: 285431
URL: https://svnweb.freebsd.org/changeset/base/285431
Log:
Introduce Annapurna Labs HAL for Alpine PoC
This commit adds HAL (Hardware Abstraction Layer) code
for Alpine Platform on Chip from Annapurna Labs.
Only published f
Author: zbb
Date: Sun Jul 12 21:43:31 2015
New Revision: 285432
URL: https://svnweb.freebsd.org/changeset/base/285432
Log:
Tag alpine-hal 2.7
Added:
vendor-sys/alpine-hal/2.7/
- copied from r285431, vendor-sys/alpine-hal/dist/
___
svn-src-all@f
Author: zbb
Date: Tue Jul 14 11:59:43 2015
New Revision: 285533
URL: https://svnweb.freebsd.org/changeset/base/285533
Log:
Fix intr_machdep.c for ARM64
On ARMv8 IPIs are mapped to 0-15. Incrementing the number by 16
is wrong, because it sets a reserved bit in the IPI register.
This patc
Author: zbb
Date: Tue Jul 14 12:02:56 2015
New Revision: 285534
URL: https://svnweb.freebsd.org/changeset/base/285534
Log:
Fix secondary PIC initialization order
Call arm_init_secondary before any other PIC-related functions
are called. This is necessary for GICv3 where PIC_INIT_SECONDARY
Author: zbb
Date: Wed Jul 15 09:24:45 2015
New Revision: 285597
URL: https://svnweb.freebsd.org/changeset/base/285597
Log:
Add identify_cpu() to ARM64 init_secondary routine
Identify current CPU. This is necessary to setup
affinity registers and to provide support for
runtime chip ident
Author: zbb
Date: Thu Jul 16 10:22:57 2015
New Revision: 285626
URL: https://svnweb.freebsd.org/changeset/base/285626
Log:
Set-up proper TCR values for memory related to Translation Table Walking
This commit adds proper cache and shareability attributes to
the TCR register.
Set memory a
Author: zbb
Date: Thu Jul 16 10:46:52 2015
New Revision: 285627
URL: https://svnweb.freebsd.org/changeset/base/285627
Log:
Fix KSTACK_PAGES issue when the default value was changed in KERNCONF
If KSTACK_PAGES was changed to anything alse than the default,
the value from param.h was taken
Author: zbb
Date: Fri Jul 17 13:58:00 2015
New Revision: 285653
URL: https://svnweb.freebsd.org/changeset/base/285653
Log:
Increase DMAP (Direct Map) size on ARM64
Previous DMAP size was too small for systems with more than 64GB
of RAM. Increase it to 128GB to support ThunderX CRB.
R
Author: zbb
Date: Fri Jul 17 14:08:08 2015
New Revision: 285654
URL: https://svnweb.freebsd.org/changeset/base/285654
Log:
Fix secondary stacks calculation on ARM64
Secondary stack calculation is modified to provide
stack_top = secondary_stacks + (cpu_id) * PAGE_SIZE * KSTACK_PAGES
beca
Author: zbb
Date: Fri Jul 17 14:33:47 2015
New Revision: 285655
URL: https://svnweb.freebsd.org/changeset/base/285655
Log:
Fix possible coherency issues between PEs related to I-cache
Basing on B.2.3.4:
Synchronization and coherency issues between data and
instruction accesses.
To
Author: zbb
Date: Tue Jul 21 12:15:00 2015
New Revision: 285743
URL: https://svnweb.freebsd.org/changeset/base/285743
Log:
Improve ARM64 CPU_MATCH
Add a method to identify CPU based on RAW MIDR value.
Obtained from: Semihalf
Sponsored by: The FreeBSD Foundation
Differential Revisi
Author: zbb
Date: Tue Jul 21 12:50:45 2015
New Revision: 285745
URL: https://svnweb.freebsd.org/changeset/base/285745
Log:
Implement get_cyclecount() on ARM64
Use Vritual Counter register associated with Generic Timer to
read the cyclecount.
Obtained from: Semihalf
Sponsored by: T
Author: zbb
Date: Tue Jul 21 14:47:23 2015
New Revision: 285752
URL: https://svnweb.freebsd.org/changeset/base/285752
Log:
Add support for vendor specific function for PCI devid acquisition in ITS
It is possible that some HW will use different PCI devids,
hence allow to replace the defaul
Author: zbb
Date: Tue Jul 21 15:28:07 2015
New Revision: 285755
URL: https://svnweb.freebsd.org/changeset/base/285755
Log:
Don't allow malloc() to wait for resource while holding a lock in ITS
malloc() should not go to sleep in case of lack of resource while
the kernel thread is holding a
Hello Andrew,
Please check in-line.
Best regards
zbb
2015-07-21 17:01 GMT+02:00 Andrew Turner :
> On Tue, 21 Jul 2015 14:47:24 + (UTC)
> Zbigniew Bodek wrote:
>
>> Author: zbb
>> Date: Tue Jul 21 14:47:23 2015
>> New Revision: 285752
>> URL: https://svnweb.
s trying to figure it out later?
>
> Warner
>
>> On Jul 21, 2015, at 10:02 AM, Zbigniew Bodek wrote:
>>
>> Hello Andrew,
>>
>> Please check in-line.
>>
>> Best regards
>> zbb
>>
>> 2015-07-21 17:01 GMT+02:00 Andrew Turner :
>&
Author: zbb
Date: Tue Jul 21 17:14:24 2015
New Revision: 285758
URL: https://svnweb.freebsd.org/changeset/base/285758
Log:
Add some more explanation to r285752
Add brief commentary to vendor-specific devid function in ITS
and remove redundant spaces by the way.
Obtained from: Semihal
Author: zbb
Date: Wed Jul 22 09:46:22 2015
New Revision: 285789
URL: https://svnweb.freebsd.org/changeset/base/285789
Log:
Introduce support for MSI-X interrupts in AHCI
- Allocate resources for MSI-X table and PBA if necessary
- Add function ahci_free_mem() to free all resources
Rev
Author: zbb
Date: Tue Jul 28 13:16:08 2015
New Revision: 285957
URL: https://svnweb.freebsd.org/changeset/base/285957
Log:
Limit ofw_cpu_early_foreach() to CPUs only
On some platforms, the /cpus node contains cpu-to-cluster
map which deffinitely is not a CPU node. Its presence was
causi
Author: zbb
Date: Tue Jul 28 14:20:33 2015
New Revision: 285959
URL: https://svnweb.freebsd.org/changeset/base/285959
Log:
Import Annapurna Labs Alpine HAL to sys/contrib/
Import from vendor-sys/alpine-hal/2.7
SVN rev.: 285432
HAL version: 2.7
Obtained from: Semihalf
Sponsored b
Author: zbb
Date: Wed Jul 29 11:22:19 2015
New Revision: 286005
URL: https://svnweb.freebsd.org/changeset/base/286005
Log:
Add quirk for ThunderX ITS device table size
Limit the number of supported device IDs to 0x10
in order to decrease the size of the ITS device table so
that it m
Author: zbb
Date: Thu Jul 30 13:45:34 2015
New Revision: 286071
URL: https://svnweb.freebsd.org/changeset/base/286071
Log:
Remove obsolete vendor code from Alpine platform support
This is a clean-up patch from a serie delivering support for
Annapurna Labs Alpine PoC.
The HAL files have
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