Author: zbb Date: Wed Jul 8 13:52:59 2015 New Revision: 285270 URL: https://svnweb.freebsd.org/changeset/base/285270
Log: Add memory barrier to bus_dmamap_sync() On platforms which are fully IO-coherent, the map might be null. We need to guarantee that all data is observable after the sync operation is called. Add a memory barrier to ensure that on ARM. Reviewed by: andrew, kib Obtained from: Semihalf Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D3012 Modified: head/sys/sys/bus_dma.h Modified: head/sys/sys/bus_dma.h ============================================================================== --- head/sys/sys/bus_dma.h Wed Jul 8 13:19:13 2015 (r285269) +++ head/sys/sys/bus_dma.h Wed Jul 8 13:52:59 2015 (r285270) @@ -282,13 +282,25 @@ int bus_dmamem_alloc(bus_dma_tag_t dmat, void bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map); /* - * Perform a synchronization operation on the given map. + * Perform a synchronization operation on the given map. If the map + * is NULL we have a fully IO-coherent system. On every ARM architecture + * there must be a memory barrier placed to ensure that all data + * accesses are visible before going any further. */ void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_dmasync_op_t); +#if defined(__arm__) + #define __BUS_DMAMAP_SYNC_DEFAULT mb(); +#elif defined(__aarch64__) + #define __BUS_DMAMAP_SYNC_DEFAULT dmb(sy); +#else + #define __BUS_DMAMAP_SYNC_DEFAULT {} +#endif #define bus_dmamap_sync(dmat, dmamap, op) \ do { \ if ((dmamap) != NULL) \ _bus_dmamap_sync(dmat, dmamap, op); \ + else \ + __BUS_DMAMAP_SYNC_DEFAULT \ } while (0) /* _______________________________________________ svn-src-all@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
