On Jun 11, 2010, at 11:52 AM, Pyun YongHyeon wrote:
> On Fri, Jun 11, 2010 at 11:49:14AM -0700, Marcel Moolenaar wrote:
>>
>> On Jun 11, 2010, at 11:08 AM, Pyun YongHyeon wrote:
>>
>>> On Fri, Jun 11, 2010 at 11:06:06AM -0700, Marcel Moolenaar wrote:
On Jun 11, 2010, at 10:50 AM, Pyu
On Fri, Jun 11, 2010 at 11:49:14AM -0700, Marcel Moolenaar wrote:
>
> On Jun 11, 2010, at 11:08 AM, Pyun YongHyeon wrote:
>
> > On Fri, Jun 11, 2010 at 11:06:06AM -0700, Marcel Moolenaar wrote:
> >>
> >> On Jun 11, 2010, at 10:50 AM, Pyun YongHyeon wrote:
> >>
> >>
> >> I'm not clear w
On Jun 11, 2010, at 11:08 AM, Pyun YongHyeon wrote:
> On Fri, Jun 11, 2010 at 11:06:06AM -0700, Marcel Moolenaar wrote:
>>
>> On Jun 11, 2010, at 10:50 AM, Pyun YongHyeon wrote:
>>
>>
>> I'm not clear why you even need bounce buffers for RX. The chip
>> supports 64bit addresses w
On Jun 11, 2010, at 12:30 PM, Pyun YongHyeon wrote:
> On Fri, Jun 11, 2010 at 02:20:46PM -0400, John Baldwin wrote:
>>
>> I'm not clear why you even need bounce buffers for RX. The chip
>> supports 64bit addresses with no boundary or alignment restrictions.
>>
>
> Some cont
On Fri, Jun 11, 2010 at 02:20:46PM -0400, John Baldwin wrote:
> On Friday 11 June 2010 1:50:16 pm Pyun YongHyeon wrote:
> > On Fri, Jun 11, 2010 at 11:44:39AM -0600, Scott Long wrote:
> > > On Jun 11, 2010, at 11:41 AM, Pyun YongHyeon wrote:
> > > > On Fri, Jun 11, 2010 at 11:37:36AM -0600, Scott L
On Friday 11 June 2010 1:50:16 pm Pyun YongHyeon wrote:
> On Fri, Jun 11, 2010 at 11:44:39AM -0600, Scott Long wrote:
> > On Jun 11, 2010, at 11:41 AM, Pyun YongHyeon wrote:
> > > On Fri, Jun 11, 2010 at 11:37:36AM -0600, Scott Long wrote:
> > >> On Jun 11, 2010, at 11:32 AM, Marcel Moolenaar wrote
On Jun 11, 2010, at 12:04 PM, Pyun YongHyeon wrote:
> On Fri, Jun 11, 2010 at 11:55:07AM -0600, Scott Long wrote:
>> On Jun 11, 2010, at 11:53 AM, Marcel Moolenaar wrote:
>>>
>>> On Jun 11, 2010, at 10:47 AM, Scott Long wrote:
>>>
On Jun 11, 2010, at 11:44 AM, Marcel Moolenaar wrote:
>
On Fri, Jun 11, 2010 at 11:06:06AM -0700, Marcel Moolenaar wrote:
>
> On Jun 11, 2010, at 10:50 AM, Pyun YongHyeon wrote:
>
>
> I'm not clear why you even need bounce buffers for RX. The chip
> supports 64bit addresses with no boundary or alignment restrictions.
>
> >>>
>
On Jun 11, 2010, at 10:50 AM, Pyun YongHyeon wrote:
I'm not clear why you even need bounce buffers for RX. The chip supports
64bit addresses with no boundary or alignment restrictions.
>>>
>>> Some controllers have 4G boundary bug so bge(4) restricts dma
>>> address space
On Fri, Jun 11, 2010 at 11:55:07AM -0600, Scott Long wrote:
> On Jun 11, 2010, at 11:53 AM, Marcel Moolenaar wrote:
> >
> > On Jun 11, 2010, at 10:47 AM, Scott Long wrote:
> >
> >> On Jun 11, 2010, at 11:44 AM, Marcel Moolenaar wrote:
> >>>
> >>> On Jun 11, 2010, at 10:37 AM, Scott Long wrote:
>
On Jun 11, 2010, at 11:53 AM, Marcel Moolenaar wrote:
>
> On Jun 11, 2010, at 10:47 AM, Scott Long wrote:
>
>> On Jun 11, 2010, at 11:44 AM, Marcel Moolenaar wrote:
>>>
>>> On Jun 11, 2010, at 10:37 AM, Scott Long wrote:
I'm not clear why you even need bounce buffers for RX. The chip
On Jun 11, 2010, at 10:47 AM, Scott Long wrote:
> On Jun 11, 2010, at 11:44 AM, Marcel Moolenaar wrote:
>>
>> On Jun 11, 2010, at 10:37 AM, Scott Long wrote:
>>>
>>> I'm not clear why you even need bounce buffers for RX. The chip supports
>>> 64bit addresses with no boundary or alignment rest
On Fri, Jun 11, 2010 at 11:44:39AM -0600, Scott Long wrote:
> On Jun 11, 2010, at 11:41 AM, Pyun YongHyeon wrote:
> > On Fri, Jun 11, 2010 at 11:37:36AM -0600, Scott Long wrote:
> >> On Jun 11, 2010, at 11:32 AM, Marcel Moolenaar wrote:
> >>>
> >>> On Jun 11, 2010, at 10:21 AM, Scott Long wrote:
>
On Jun 11, 2010, at 11:44 AM, Marcel Moolenaar wrote:
>
> On Jun 11, 2010, at 10:37 AM, Scott Long wrote:
>>
>> I'm not clear why you even need bounce buffers for RX. The chip supports
>> 64bit addresses with no boundary or alignment restrictions.
>
> As per:
>/*
> * All contro
On Jun 11, 2010, at 10:37 AM, Scott Long wrote:
>
> I'm not clear why you even need bounce buffers for RX. The chip supports
> 64bit addresses with no boundary or alignment restrictions.
As per:
/*
* All controllers that are not 5755 or higher have 4GB
* boundary DMA
On Jun 11, 2010, at 11:41 AM, Pyun YongHyeon wrote:
> On Fri, Jun 11, 2010 at 11:37:36AM -0600, Scott Long wrote:
>> On Jun 11, 2010, at 11:32 AM, Marcel Moolenaar wrote:
>>>
>>> On Jun 11, 2010, at 10:21 AM, Scott Long wrote:
>>>
On Jun 11, 2010, at 11:04 AM, Marcel Moolenaar wrote:
>
On Fri, Jun 11, 2010 at 11:37:36AM -0600, Scott Long wrote:
> On Jun 11, 2010, at 11:32 AM, Marcel Moolenaar wrote:
> >
> > On Jun 11, 2010, at 10:21 AM, Scott Long wrote:
> >
> >> On Jun 11, 2010, at 11:04 AM, Marcel Moolenaar wrote:
> >>>
> >>> On Jun 11, 2010, at 9:12 AM, Scott Long wrote:
>
On Jun 11, 2010, at 11:32 AM, Marcel Moolenaar wrote:
>
> On Jun 11, 2010, at 10:21 AM, Scott Long wrote:
>
>> On Jun 11, 2010, at 11:04 AM, Marcel Moolenaar wrote:
>>>
>>> On Jun 11, 2010, at 9:12 AM, Scott Long wrote:
>>>
On Jun 11, 2010, at 5:51 AM, John Baldwin wrote:
> On Thursday
On Jun 11, 2010, at 10:21 AM, Scott Long wrote:
> On Jun 11, 2010, at 11:04 AM, Marcel Moolenaar wrote:
>>
>> On Jun 11, 2010, at 9:12 AM, Scott Long wrote:
>>
>>> On Jun 11, 2010, at 5:51 AM, John Baldwin wrote:
On Thursday 10 June 2010 11:00:33 pm Marcel Moolenaar wrote:
> Author: ma
On Fri, Jun 11, 2010 at 11:21:24AM -0600, Scott Long wrote:
> On Jun 11, 2010, at 11:04 AM, Marcel Moolenaar wrote:
> >
> > On Jun 11, 2010, at 9:12 AM, Scott Long wrote:
> >
> >> On Jun 11, 2010, at 5:51 AM, John Baldwin wrote:
> >>> On Thursday 10 June 2010 11:00:33 pm Marcel Moolenaar wrote:
>
On Friday 11 June 2010 1:04:36 pm Marcel Moolenaar wrote:
>
> On Jun 11, 2010, at 9:12 AM, Scott Long wrote:
>
> > On Jun 11, 2010, at 5:51 AM, John Baldwin wrote:
> >> On Thursday 10 June 2010 11:00:33 pm Marcel Moolenaar wrote:
> >>> Author: marcel
> >>> Date: Fri Jun 11 03:00:32 2010
> >>> New
On Jun 11, 2010, at 11:04 AM, Marcel Moolenaar wrote:
>
> On Jun 11, 2010, at 9:12 AM, Scott Long wrote:
>
>> On Jun 11, 2010, at 5:51 AM, John Baldwin wrote:
>>> On Thursday 10 June 2010 11:00:33 pm Marcel Moolenaar wrote:
Author: marcel
Date: Fri Jun 11 03:00:32 2010
New Revision
On Jun 11, 2010, at 9:12 AM, Scott Long wrote:
> On Jun 11, 2010, at 5:51 AM, John Baldwin wrote:
>> On Thursday 10 June 2010 11:00:33 pm Marcel Moolenaar wrote:
>>> Author: marcel
>>> Date: Fri Jun 11 03:00:32 2010
>>> New Revision: 209026
>>> URL: http://svn.freebsd.org/changeset/base/209026
>>
On Jun 11, 2010, at 5:51 AM, John Baldwin wrote:
> On Thursday 10 June 2010 11:00:33 pm Marcel Moolenaar wrote:
>> Author: marcel
>> Date: Fri Jun 11 03:00:32 2010
>> New Revision: 209026
>> URL: http://svn.freebsd.org/changeset/base/209026
>>
>> Log:
>> Bump MAX_BPAGES from 256 to 1024. It seems
On Thursday 10 June 2010 11:00:33 pm Marcel Moolenaar wrote:
> Author: marcel
> Date: Fri Jun 11 03:00:32 2010
> New Revision: 209026
> URL: http://svn.freebsd.org/changeset/base/209026
>
> Log:
> Bump MAX_BPAGES from 256 to 1024. It seems that a few drivers, bge(4)
> in particular, do not han
Author: marcel
Date: Fri Jun 11 03:00:32 2010
New Revision: 209026
URL: http://svn.freebsd.org/changeset/base/209026
Log:
Bump MAX_BPAGES from 256 to 1024. It seems that a few drivers, bge(4)
in particular, do not handle deferred DMA map load operations at all.
Any error, and especially EINP
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