CVS commit: src/sys/arch/riscv/riscv

2025-03-02 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Mar 2 08:14:26 UTC 2025 Modified Files: src/sys/arch/riscv/riscv: locore.S riscv_machdep.c Log Message: risc-v: ensure the boot stacks are mapped so that pmap_extract works To generate a diff of this commit: cvs rdiff -u -r1

CVS commit: src/sys/arch/riscv/riscv

2025-03-02 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Mar 2 08:14:26 UTC 2025 Modified Files: src/sys/arch/riscv/riscv: locore.S riscv_machdep.c Log Message: risc-v: ensure the boot stacks are mapped so that pmap_extract works To generate a diff of this commit: cvs rdiff -u -r1

CVS commit: src/sys/arch/riscv/riscv

2025-03-01 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sun Mar 2 01:23:11 UTC 2025 Modified Files: src/sys/arch/riscv/riscv: bus_dma.c Log Message: riscv/bus_dma: Handle pmap_extract failure. That is, when the va is not mapped in the pmap. Otherwise this trips over uninitialized

CVS commit: src/sys/arch/riscv/riscv

2025-03-01 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sun Mar 2 01:23:11 UTC 2025 Modified Files: src/sys/arch/riscv/riscv: bus_dma.c Log Message: riscv/bus_dma: Handle pmap_extract failure. That is, when the va is not mapped in the pmap. Otherwise this trips over uninitialized

CVS commit: src/sys/arch/riscv/riscv

2025-01-04 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Jan 4 14:23:03 UTC 2025 Modified Files: src/sys/arch/riscv/riscv: riscv_machdep.c Log Message: Style change in mm_md_kernacc. NFC. To generate a diff of this commit: cvs rdiff -u -r1.41 -r1.42 src/sys/arch/riscv/riscv/riscv_

CVS commit: src/sys/arch/riscv/riscv

2025-01-04 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Jan 4 14:23:03 UTC 2025 Modified Files: src/sys/arch/riscv/riscv: riscv_machdep.c Log Message: Style change in mm_md_kernacc. NFC. To generate a diff of this commit: cvs rdiff -u -r1.41 -r1.42 src/sys/arch/riscv/riscv/riscv_

CVS commit: src/sys/arch/riscv/riscv

2024-12-10 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Tue Dec 10 07:42:04 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: bus_dma.c Log Message: risc-v: bus_dma: Sprinkle error check with __predict_{true,false}. Apply the same sprinkling of __predict_{true,false} to bus_dmamap_loa

CVS commit: src/sys/arch/riscv/riscv

2024-12-10 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Tue Dec 10 07:42:04 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: bus_dma.c Log Message: risc-v: bus_dma: Sprinkle error check with __predict_{true,false}. Apply the same sprinkling of __predict_{true,false} to bus_dmamap_loa

CVS commit: src/sys/arch/riscv/riscv

2024-11-24 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Nov 24 19:41:18 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: db_disasm.c Log Message: risc-v: don't KASSERT in the disassembler. To generate a diff of this commit: cvs rdiff -u -r1.12 -r1.13 src/sys/arch/riscv/riscv/db_

CVS commit: src/sys/arch/riscv/riscv

2024-11-24 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Nov 24 19:41:18 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: db_disasm.c Log Message: risc-v: don't KASSERT in the disassembler. To generate a diff of this commit: cvs rdiff -u -r1.12 -r1.13 src/sys/arch/riscv/riscv/db_

CVS commit: src/sys/arch/riscv/riscv

2024-11-24 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Nov 24 14:49:04 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: riscv_machdep.c Log Message: risc-v: fix riscv32 build To generate a diff of this commit: cvs rdiff -u -r1.40 -r1.41 src/sys/arch/riscv/riscv/riscv_machdep.c

CVS commit: src/sys/arch/riscv/riscv

2024-11-24 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Nov 24 14:49:04 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: riscv_machdep.c Log Message: risc-v: fix riscv32 build To generate a diff of this commit: cvs rdiff -u -r1.40 -r1.41 src/sys/arch/riscv/riscv/riscv_machdep.c

CVS commit: src/sys/arch/riscv/riscv

2024-11-19 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Tue Nov 19 21:17:09 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: db_trace.c Log Message: risc-v: use the provided printf like function in db_stack_trace_print To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/

CVS commit: src/sys/arch/riscv/riscv

2024-11-19 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Tue Nov 19 21:17:09 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: db_trace.c Log Message: risc-v: use the provided printf like function in db_stack_trace_print To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/

CVS commit: src/sys/arch/riscv/riscv

2024-10-21 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Mon Oct 21 07:10:44 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: bus_dma.c Log Message: Sync a comment with the arm version. XXX need to fix the copy pasta To generate a diff of this commit: cvs rdiff -u -r1.7 -r1.8 src/sy

CVS commit: src/sys/arch/riscv/riscv

2024-10-21 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Mon Oct 21 07:10:44 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: bus_dma.c Log Message: Sync a comment with the arm version. XXX need to fix the copy pasta To generate a diff of this commit: cvs rdiff -u -r1.7 -r1.8 src/sy

CVS commit: src/sys/arch/riscv/riscv

2024-10-20 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Oct 20 13:43:36 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: bus_dma.c Log Message: Apply the same fix that was applied to the arm version of this. _bus_dmatag_subregion is always EOPNOTSUPP for !_RISCV_NEED_BUS_DMA_BOUN

CVS commit: src/sys/arch/riscv/riscv

2024-10-20 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Oct 20 13:43:56 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: bus_dma.c Log Message: More KNF To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/arch/riscv/riscv/bus_dma.c Please note that diffs are not

CVS commit: src/sys/arch/riscv/riscv

2024-10-20 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Oct 20 13:43:56 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: bus_dma.c Log Message: More KNF To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/arch/riscv/riscv/bus_dma.c Please note that diffs are not

CVS commit: src/sys/arch/riscv/riscv

2024-10-20 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Oct 20 13:43:36 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: bus_dma.c Log Message: Apply the same fix that was applied to the arm version of this. _bus_dmatag_subregion is always EOPNOTSUPP for !_RISCV_NEED_BUS_DMA_BOUN

CVS commit: src/sys/arch/riscv/riscv

2024-10-20 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Oct 20 13:37:51 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: bus_dma.c Log Message: KNF To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 src/sys/arch/riscv/riscv/bus_dma.c Please note that diffs are not publ

CVS commit: src/sys/arch/riscv/riscv

2024-10-20 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Oct 20 13:37:51 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: bus_dma.c Log Message: KNF To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 src/sys/arch/riscv/riscv/bus_dma.c Please note that diffs are not publ

CVS commit: src/sys/arch/riscv/riscv

2024-09-24 Thread Andrius Varanavicius
Module Name:src Committed By: andvar Date: Tue Sep 24 20:39:08 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: db_disasm.c Log Message: remove commented warnx() call, it looks like unintended development leftover. To generate a diff of this commit: cvs rdiff -u -r1.11

CVS commit: src/sys/arch/riscv/riscv

2024-09-24 Thread Andrius Varanavicius
Module Name:src Committed By: andvar Date: Tue Sep 24 20:39:08 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: db_disasm.c Log Message: remove commented warnx() call, it looks like unintended development leftover. To generate a diff of this commit: cvs rdiff -u -r1.11

CVS commit: src/sys/arch/riscv/riscv

2024-08-15 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Thu Aug 15 07:06:35 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: autoconf.c Log Message: KNF To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/riscv/riscv/autoconf.c Please note that diffs are not pu

CVS commit: src/sys/arch/riscv/riscv

2024-08-15 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Thu Aug 15 07:06:35 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: autoconf.c Log Message: KNF To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/riscv/riscv/autoconf.c Please note that diffs are not pu

CVS commit: src/sys/arch/riscv/riscv

2024-08-15 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Thu Aug 15 07:03:58 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: riscv_machdep.c Log Message: Add a comment. To generate a diff of this commit: cvs rdiff -u -r1.37 -r1.38 src/sys/arch/riscv/riscv/riscv_machdep.c Please not

CVS commit: src/sys/arch/riscv/riscv

2024-08-15 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Thu Aug 15 07:03:58 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: riscv_machdep.c Log Message: Add a comment. To generate a diff of this commit: cvs rdiff -u -r1.37 -r1.38 src/sys/arch/riscv/riscv/riscv_machdep.c Please not

CVS commit: src/sys/arch/riscv/riscv

2024-08-10 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Aug 10 07:27:04 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: cpu.c Log Message: Recognise the T-Head 9-Series CPU^Whart. >From Rui-Xiang Guo. To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/ris

CVS commit: src/sys/arch/riscv/riscv

2024-08-10 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Aug 10 07:27:04 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: cpu.c Log Message: Recognise the T-Head 9-Series CPU^Whart. >From Rui-Xiang Guo. To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/ris

CVS commit: src/sys/arch/riscv/riscv

2024-07-13 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Jul 13 15:20:55 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: bus_space_generic.S Log Message: Fix the register for argument 0 of the panic calls. Found by new binutils. To generate a diff of this commit: cvs rdiff -u -

CVS commit: src/sys/arch/riscv/riscv

2024-07-13 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Jul 13 15:20:55 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: bus_space_generic.S Log Message: Fix the register for argument 0 of the panic calls. Found by new binutils. To generate a diff of this commit: cvs rdiff -u -

CVS commit: src/sys/arch/riscv/riscv

2024-05-03 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Fri May 3 07:24:31 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: cpu_subr.c Log Message: Small simplification. NFCI. To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/arch/riscv/riscv/cpu_subr.c Please no

CVS commit: src/sys/arch/riscv/riscv

2024-05-03 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Fri May 3 07:24:31 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: cpu_subr.c Log Message: Small simplification. NFCI. To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/arch/riscv/riscv/cpu_subr.c Please no

CVS commit: src/sys/arch/riscv/riscv

2024-04-07 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sun Apr 7 22:59:13 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: clock_machdep.c Log Message: riscv: Schedule next hardclock tick in the future, not the past. If we have missed hardclock ticks, schedule up to one tick in

CVS commit: src/sys/arch/riscv/riscv

2024-04-07 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sun Apr 7 22:59:13 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: clock_machdep.c Log Message: riscv: Schedule next hardclock tick in the future, not the past. If we have missed hardclock ticks, schedule up to one tick in

CVS commit: src/sys/arch/riscv/riscv

2024-04-07 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sun Apr 7 22:52:53 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: cpu.c Log Message: riscv: Make sure cpu0->ci_cpu_freq is initialized by cpu_attach. Otherwise this stays zero, which screws up cpu_ipi_wait. To generate

CVS commit: src/sys/arch/riscv/riscv

2024-04-07 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sun Apr 7 22:52:53 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: cpu.c Log Message: riscv: Make sure cpu0->ci_cpu_freq is initialized by cpu_attach. Otherwise this stays zero, which screws up cpu_ipi_wait. To generate

CVS commit: src/sys/arch/riscv/riscv

2024-04-06 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Apr 6 13:41:03 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: copy.S Log Message: Fix riscv32 build To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/riscv/copy.S Please note that diffs are

CVS commit: src/sys/arch/riscv/riscv

2024-04-06 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Apr 6 13:41:03 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: copy.S Log Message: Fix riscv32 build To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/riscv/copy.S Please note that diffs are

CVS commit: src/sys/arch/riscv/riscv

2024-04-01 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Mon Apr 1 16:24:01 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: trap.c Log Message: Return the correct error from {fetch,store}_user_data and fix futex_wake_op_op: [0.273033s] Failed: /usr/src/tests/lib/libc/sys/t_fute

CVS commit: src/sys/arch/riscv/riscv

2024-04-01 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Mon Apr 1 16:24:01 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: trap.c Log Message: Return the correct error from {fetch,store}_user_data and fix futex_wake_op_op: [0.273033s] Failed: /usr/src/tests/lib/libc/sys/t_fute

CVS commit: src/sys/arch/riscv/riscv

2024-02-08 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Thu Feb 8 18:25:58 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: bus_dma.c Log Message: Define _RISCV_NEED_BUS_DMA_BOUNCE. Pointed out as being needed by jmcneill. Thanks! To generate a diff of this commit: cvs rdiff -u -r

CVS commit: src/sys/arch/riscv/riscv

2024-02-08 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Thu Feb 8 18:25:58 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: bus_dma.c Log Message: Define _RISCV_NEED_BUS_DMA_BOUNCE. Pointed out as being needed by jmcneill. Thanks! To generate a diff of this commit: cvs rdiff -u -r

CVS commit: src/sys/arch/riscv/riscv

2024-01-19 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Fri Jan 19 09:09:39 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: autoconf.c Log Message: Use fdt_cpu_rootconf To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/riscv/riscv/autoconf.c Please note that

CVS commit: src/sys/arch/riscv/riscv

2024-01-19 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Fri Jan 19 09:09:39 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: autoconf.c Log Message: Use fdt_cpu_rootconf To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/riscv/riscv/autoconf.c Please note that

CVS commit: src/sys/arch/riscv/riscv

2024-01-17 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Thu Jan 18 07:41:50 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: clock_machdep.c riscv_machdep.c Log Message: Provide a working delay(9) To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/riscv/riscv/c

CVS commit: src/sys/arch/riscv/riscv

2024-01-17 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Thu Jan 18 07:41:50 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: clock_machdep.c riscv_machdep.c Log Message: Provide a working delay(9) To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/riscv/riscv/c

CVS commit: src/sys/arch/riscv/riscv

2024-01-17 Thread SAITOH Masanobu
Module Name:src Committed By: msaitoh Date: Thu Jan 18 03:36:24 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: kobj_machdep.c Log Message: s/FALLTHOUGH/FALLTHROUGH/ in comment. To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/riscv/riscv/kobj_

CVS commit: src/sys/arch/riscv/riscv

2024-01-17 Thread SAITOH Masanobu
Module Name:src Committed By: msaitoh Date: Thu Jan 18 03:36:24 UTC 2024 Modified Files: src/sys/arch/riscv/riscv: kobj_machdep.c Log Message: s/FALLTHOUGH/FALLTHROUGH/ in comment. To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/riscv/riscv/kobj_

CVS commit: src/sys/arch/riscv/riscv

2023-12-22 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Fri Dec 22 08:41:59 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: db_interface.c riscv_machdep.c Log Message: Minor stylistic changes. NFCI. To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/arch/riscv/risc

CVS commit: src/sys/arch/riscv/riscv

2023-12-22 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Fri Dec 22 08:41:59 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: db_interface.c riscv_machdep.c Log Message: Minor stylistic changes. NFCI. To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/arch/riscv/risc

CVS commit: src/sys/arch/riscv/riscv

2023-09-07 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Thu Sep 7 12:48:49 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: trap.c Log Message: Handle CAUSE_LOAD_PAGE_FAULT in trap_pagefault_fixup To generate a diff of this commit: cvs rdiff -u -r1.23 -r1.24 src/sys/arch/riscv/risc

CVS commit: src/sys/arch/riscv/riscv

2023-09-07 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Thu Sep 7 12:48:49 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: trap.c Log Message: Handle CAUSE_LOAD_PAGE_FAULT in trap_pagefault_fixup To generate a diff of this commit: cvs rdiff -u -r1.23 -r1.24 src/sys/arch/riscv/risc

CVS commit: src/sys/arch/riscv/riscv

2023-08-28 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Mon Aug 28 11:12:42 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: cpu.c Log Message: Remove duplicate .ci_cpl initialiser. To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/riscv/riscv/cpu.c Please no

CVS commit: src/sys/arch/riscv/riscv

2023-08-28 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Mon Aug 28 11:12:42 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: cpu.c Log Message: Remove duplicate .ci_cpl initialiser. To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/riscv/riscv/cpu.c Please no

CVS commit: src/sys/arch/riscv/riscv

2023-08-23 Thread Rin Okuyama
Module Name:src Committed By: rin Date: Thu Aug 24 05:46:55 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: riscv_machdep.c Log Message: riscv: cpu_setmcontext: Do not unconditionally update tp register Conserve tp register for _UC_CPU and update later if _UC_TLSBASE i

CVS commit: src/sys/arch/riscv/riscv

2023-08-23 Thread Rin Okuyama
Module Name:src Committed By: rin Date: Thu Aug 24 05:46:55 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: riscv_machdep.c Log Message: riscv: cpu_setmcontext: Do not unconditionally update tp register Conserve tp register for _UC_CPU and update later if _UC_TLSBASE i

CVS commit: src/sys/arch/riscv/riscv

2023-08-22 Thread Rin Okuyama
Module Name:src Committed By: rin Date: Tue Aug 22 07:11:15 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: trap.c Log Message: riscv/trap.c: Dump cause register for unhandled page fault To generate a diff of this commit: cvs rdiff -u -r1.22 -r1.23 src/sys/arch/riscv/

CVS commit: src/sys/arch/riscv/riscv

2023-08-22 Thread Rin Okuyama
Module Name:src Committed By: rin Date: Tue Aug 22 07:11:15 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: trap.c Log Message: riscv/trap.c: Dump cause register for unhandled page fault To generate a diff of this commit: cvs rdiff -u -r1.22 -r1.23 src/sys/arch/riscv/

CVS commit: src/sys/arch/riscv/riscv

2023-08-22 Thread Rin Okuyama
Module Name:src Committed By: rin Date: Tue Aug 22 07:10:39 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: trap.c Log Message: riscv/trap.c: Handle userland breakpoint exception Now, gdb 13 works for riscv64 to some extent :) To generate a diff of this commit: cvs r

CVS commit: src/sys/arch/riscv/riscv

2023-08-22 Thread Rin Okuyama
Module Name:src Committed By: rin Date: Tue Aug 22 07:10:39 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: trap.c Log Message: riscv/trap.c: Handle userland breakpoint exception Now, gdb 13 works for riscv64 to some extent :) To generate a diff of this commit: cvs r

CVS commit: src/sys/arch/riscv/riscv

2023-07-25 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Wed Jul 26 06:13:44 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: clock_machdep.c Log Message: Attach the clock event counter for each cpu^Whart. To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/riscv

CVS commit: src/sys/arch/riscv/riscv

2023-07-25 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Wed Jul 26 06:13:44 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: clock_machdep.c Log Message: Attach the clock event counter for each cpu^Whart. To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/riscv

CVS commit: src/sys/arch/riscv/riscv

2023-07-10 Thread Rin Okuyama
Module Name:src Committed By: rin Date: Mon Jul 10 07:04:20 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: autoconf.c riscv_machdep.c Log Message: riscv: Add FDT-based initrd, rndseed, and efirng support. Can be used from our in-tree bootrisv64.efi. To generate a di

CVS commit: src/sys/arch/riscv/riscv

2023-07-10 Thread Rin Okuyama
Module Name:src Committed By: rin Date: Mon Jul 10 07:04:20 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: autoconf.c riscv_machdep.c Log Message: riscv: Add FDT-based initrd, rndseed, and efirng support. Can be used from our in-tree bootrisv64.efi. To generate a di

CVS commit: src/sys/arch/riscv/riscv

2023-06-24 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Jun 24 07:23:07 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: cpu.c Log Message: Always initialise ci_tlb_info in cpu_info_store[0]. Fixes non-MP boot for me. To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3

CVS commit: src/sys/arch/riscv/riscv

2023-06-24 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Jun 24 07:23:07 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: cpu.c Log Message: Always initialise ci_tlb_info in cpu_info_store[0]. Fixes non-MP boot for me. To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3

CVS commit: src/sys/arch/riscv/riscv

2023-06-10 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Jun 10 09:18:50 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: spl.S Log Message: Remove magic numbers. NFCI. Copyright maintenance while I'm here. To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch

CVS commit: src/sys/arch/riscv/riscv

2023-06-10 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Jun 10 09:18:50 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: spl.S Log Message: Remove magic numbers. NFCI. Copyright maintenance while I'm here. To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch

CVS commit: src/sys/arch/riscv/riscv

2023-06-10 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Jun 10 07:02:26 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: pmap_machdep.c Log Message: Whitespace. To generate a diff of this commit: cvs rdiff -u -r1.16 -r1.17 src/sys/arch/riscv/riscv/pmap_machdep.c Please note tha

CVS commit: src/sys/arch/riscv/riscv

2023-06-10 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Jun 10 07:02:26 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: pmap_machdep.c Log Message: Whitespace. To generate a diff of this commit: cvs rdiff -u -r1.16 -r1.17 src/sys/arch/riscv/riscv/pmap_machdep.c Please note tha

CVS commit: src/sys/arch/riscv/riscv

2023-05-28 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun May 28 12:56:56 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: riscv_machdep.c Log Message: Second arg to fdt_memory_remove_range is a size so pass dtbsize and not dtb + dtbsize To generate a diff of this commit: cvs rdif

CVS commit: src/sys/arch/riscv/riscv

2023-05-28 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun May 28 12:56:56 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: riscv_machdep.c Log Message: Second arg to fdt_memory_remove_range is a size so pass dtbsize and not dtb + dtbsize To generate a diff of this commit: cvs rdif

CVS commit: src/sys/arch/riscv/riscv

2023-05-14 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun May 14 09:14:30 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: riscv_machdep.c Log Message: Check for RB_HALT in cpu_reboot. To generate a diff of this commit: cvs rdiff -u -r1.26 -r1.27 src/sys/arch/riscv/riscv/riscv_mac

CVS commit: src/sys/arch/riscv/riscv

2023-05-14 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun May 14 09:14:30 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: riscv_machdep.c Log Message: Check for RB_HALT in cpu_reboot. To generate a diff of this commit: cvs rdiff -u -r1.26 -r1.27 src/sys/arch/riscv/riscv/riscv_mac

CVS commit: src/sys/arch/riscv/riscv

2023-03-01 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Wed Mar 1 08:18:24 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: cpu_switch.S Log Message: riscv: Optimization: Omit needless membar when triggering softint. When we are triggering a softint, it can't already hold any mu

CVS commit: src/sys/arch/riscv/riscv

2023-03-01 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Wed Mar 1 08:18:24 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: cpu_switch.S Log Message: riscv: Optimization: Omit needless membar when triggering softint. When we are triggering a softint, it can't already hold any mu

CVS commit: src/sys/arch/riscv/riscv

2023-02-23 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Thu Feb 23 14:56:23 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: cpu_switch.S Log Message: riscv: Add missing barriers in cpu_switchto. Details in comments. PR kern/57240 To generate a diff of this commit: cvs rdiff -

CVS commit: src/sys/arch/riscv/riscv

2023-02-23 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Thu Feb 23 14:56:23 UTC 2023 Modified Files: src/sys/arch/riscv/riscv: cpu_switch.S Log Message: riscv: Add missing barriers in cpu_switchto. Details in comments. PR kern/57240 To generate a diff of this commit: cvs rdiff -

CVS commit: src/sys/arch/riscv/riscv

2022-12-04 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Dec 4 16:29:35 UTC 2022 Modified Files: src/sys/arch/riscv/riscv: cpu_switch.S Log Message: Restore t5 and t6 from the correct locations in exception_kernexit. >From Simon. To generate a diff of this commit: cvs rdiff -u -r

CVS commit: src/sys/arch/riscv/riscv

2022-12-04 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Dec 4 16:29:35 UTC 2022 Modified Files: src/sys/arch/riscv/riscv: cpu_switch.S Log Message: Restore t5 and t6 from the correct locations in exception_kernexit. >From Simon. To generate a diff of this commit: cvs rdiff -u -r

CVS commit: src/sys/arch/riscv/riscv

2022-12-04 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Dec 4 16:23:48 UTC 2022 Modified Files: src/sys/arch/riscv/riscv: vm_machdep.c Log Message: ASSERT that md_astpending it zero for the new lwp. To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/riscv/ri

CVS commit: src/sys/arch/riscv/riscv

2022-12-04 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Dec 4 16:23:48 UTC 2022 Modified Files: src/sys/arch/riscv/riscv: vm_machdep.c Log Message: ASSERT that md_astpending it zero for the new lwp. To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/riscv/ri

CVS commit: src/sys/arch/riscv/riscv

2022-11-19 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Nov 19 09:55:11 UTC 2022 Modified Files: src/sys/arch/riscv/riscv: locore.S Log Message: Fix CONSADDR and save a label To generate a diff of this commit: cvs rdiff -u -r1.39 -r1.40 src/sys/arch/riscv/riscv/locore.S Please no

CVS commit: src/sys/arch/riscv/riscv

2022-11-19 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Nov 19 09:55:11 UTC 2022 Modified Files: src/sys/arch/riscv/riscv: locore.S Log Message: Fix CONSADDR and save a label To generate a diff of this commit: cvs rdiff -u -r1.39 -r1.40 src/sys/arch/riscv/riscv/locore.S Please no

CVS commit: src/sys/arch/riscv/riscv

2022-11-17 Thread Simon Burge
Module Name:src Committed By: simonb Date: Thu Nov 17 13:11:08 UTC 2022 Modified Files: src/sys/arch/riscv/riscv: riscv_machdep.c Log Message: Use updated defines for the user-mode sstatus value. To generate a diff of this commit: cvs rdiff -u -r1.24 -r1.25 src/sys/arch/

CVS commit: src/sys/arch/riscv/riscv

2022-11-17 Thread Simon Burge
Module Name:src Committed By: simonb Date: Thu Nov 17 13:11:08 UTC 2022 Modified Files: src/sys/arch/riscv/riscv: riscv_machdep.c Log Message: Use updated defines for the user-mode sstatus value. To generate a diff of this commit: cvs rdiff -u -r1.24 -r1.25 src/sys/arch/

CVS commit: src/sys/arch/riscv/riscv

2022-10-31 Thread Simon Burge
Module Name:src Committed By: simonb Date: Mon Oct 31 12:50:49 UTC 2022 Modified Files: src/sys/arch/riscv/riscv: bus_space_generic.S Log Message: In bus_space_write_{1,2,4,8} store the correct register in write to device. To generate a diff of this commit: cvs rdiff -u

CVS commit: src/sys/arch/riscv/riscv

2022-10-31 Thread Simon Burge
Module Name:src Committed By: simonb Date: Mon Oct 31 12:50:49 UTC 2022 Modified Files: src/sys/arch/riscv/riscv: bus_space_generic.S Log Message: In bus_space_write_{1,2,4,8} store the correct register in write to device. To generate a diff of this commit: cvs rdiff -u

CVS commit: src/sys/arch/riscv/riscv

2022-10-31 Thread Simon Burge
Module Name:src Committed By: simonb Date: Mon Oct 31 12:49:18 UTC 2022 Modified Files: src/sys/arch/riscv/riscv: bus_space_generic.S Log Message: Fix tyop in END for generic_bs_r_8. To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/riscv/bus

CVS commit: src/sys/arch/riscv/riscv

2022-10-31 Thread Simon Burge
Module Name:src Committed By: simonb Date: Mon Oct 31 12:49:18 UTC 2022 Modified Files: src/sys/arch/riscv/riscv: bus_space_generic.S Log Message: Fix tyop in END for generic_bs_r_8. To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/riscv/bus

CVS commit: src/sys/arch/riscv/riscv

2022-10-17 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Tue Oct 18 04:24:54 UTC 2022 Modified Files: src/sys/arch/riscv/riscv: riscv_machdep.c Log Message: remove a stray comment To generate a diff of this commit: cvs rdiff -u -r1.22 -r1.23 src/sys/arch/riscv/riscv/riscv_machdep.c Pl

CVS commit: src/sys/arch/riscv/riscv

2022-10-17 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Tue Oct 18 04:24:54 UTC 2022 Modified Files: src/sys/arch/riscv/riscv: riscv_machdep.c Log Message: remove a stray comment To generate a diff of this commit: cvs rdiff -u -r1.22 -r1.23 src/sys/arch/riscv/riscv/riscv_machdep.c Pl

CVS commit: src/sys/arch/riscv/riscv

2022-10-16 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Oct 16 08:43:44 UTC 2022 Modified Files: src/sys/arch/riscv/riscv: pmap_machdep.c Log Message: tlb_update_addr gets called with the KERNEL_PID (ASID) so handle this case. To generate a diff of this commit: cvs rdiff -u -r1.12

CVS commit: src/sys/arch/riscv/riscv

2022-10-16 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Oct 16 08:43:44 UTC 2022 Modified Files: src/sys/arch/riscv/riscv: pmap_machdep.c Log Message: tlb_update_addr gets called with the KERNEL_PID (ASID) so handle this case. To generate a diff of this commit: cvs rdiff -u -r1.12

CVS commit: src/sys/arch/riscv/riscv

2022-10-15 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Oct 16 06:19:16 UTC 2022 Modified Files: src/sys/arch/riscv/riscv: riscv_machdep.c Log Message: Re-orgnaise a litte. From Simon. To generate a diff of this commit: cvs rdiff -u -r1.21 -r1.22 src/sys/arch/riscv/riscv/riscv_ma

CVS commit: src/sys/arch/riscv/riscv

2022-10-15 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Oct 16 06:19:16 UTC 2022 Modified Files: src/sys/arch/riscv/riscv: riscv_machdep.c Log Message: Re-orgnaise a litte. From Simon. To generate a diff of this commit: cvs rdiff -u -r1.21 -r1.22 src/sys/arch/riscv/riscv/riscv_ma

CVS commit: src/sys/arch/riscv/riscv

2022-10-15 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Oct 16 06:03:14 UTC 2022 Modified Files: src/sys/arch/riscv/riscv: locore.S Log Message: Use a local label To generate a diff of this commit: cvs rdiff -u -r1.37 -r1.38 src/sys/arch/riscv/riscv/locore.S Please note that diff

CVS commit: src/sys/arch/riscv/riscv

2022-10-15 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Oct 16 06:03:14 UTC 2022 Modified Files: src/sys/arch/riscv/riscv: locore.S Log Message: Use a local label To generate a diff of this commit: cvs rdiff -u -r1.37 -r1.38 src/sys/arch/riscv/riscv/locore.S Please note that diff

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