Hi Philippe,
On Tue, May 30, 2017 at 6:45 PM, Philippe Mathieu-Daudé
wrote:
>
>
> On 05/16/2017 12:38 PM, Subbaraya Sundeep wrote:
>
>> Modelled Microsemi's Smartfusion2 SPI controller.
>>
>> Signed-off-by: Subbaraya Sundeep
>> ---
>> hw/ssi/Makefile.objs | 1 +
>> hw/ssi/mss-spi.c
Hi Philippe,
On Tue, May 30, 2017 at 6:13 PM, Philippe Mathieu-Daudé
wrote:
> Hi Subbaraya,
>
> I have some comments, see inlined.
>
>
> On 05/16/2017 12:38 PM, Subbaraya Sundeep wrote:
>
>> Modelled System Timer in Microsemi's Smartfusion2 Soc.
>> Timer has two 32bit down counters and two inter
Hi Philippe,
On Tue, May 30, 2017 at 6:21 PM, Philippe Mathieu-Daudé
wrote:
> Hi Subbaraya,
>
> This patch looks good.
>
>
> On 05/16/2017 12:38 PM, Subbaraya Sundeep wrote:
>
>> Added Sytem register block of Smartfusion2.
>> This block has PLL registers which are accessed by guest.
>>
>> Signed
Hi Alistair,
On Wed, May 31, 2017 at 4:02 AM, Alistair Francis
wrote:
> On Sun, May 28, 2017 at 10:26 PM, sundeep subbaraya
> wrote:
> > Hi Alistair,
> >
> > On Sat, May 27, 2017 at 5:30 AM, Alistair Francis
> > wrote:
> >>
> >> On Tue, May 16
Hi Philippe,
On Fri, Jun 9, 2017 at 12:51 PM, sundeep subbaraya
wrote:
> Hi Philippe,
>
> On Wed, May 31, 2017 at 11:06 AM, Philippe Mathieu-Daudé
> wrote:
>
>> Hi Sundeep,
>>
>> On 05/29/2017 02:28 AM, sundeep subbaraya wrote:
>>
>>> Hi Phili
Hi Alistair,
On Tue, Jun 27, 2017 at 4:19 AM, Alistair Francis
wrote:
> On Mon, Jun 26, 2017 at 9:01 AM, sundeep subbaraya
> wrote:
> > Hi Alistair,
> >
> > On Wed, May 31, 2017 at 4:02 AM, Alistair Francis
> > wrote:
> >>
> >> On Sun, May 28,
x.git
>
> Baremetal elfs from Microsemi Softconsole IDE are also working.
>
> Changes from v1:
> Added SPI controller.
>
> Thanks,
> Sundeep
>
> Subbaraya Sundeep (4):
> msf2: Add Smartfusion2 System timer
> msf2: Microsemi Smartfusion2 System Register bl
Hi,
On Thu, Apr 13, 2017 at 3:14 PM, Peter Maydell wrote:
> On 13 April 2017 at 04:21, sundeep subbaraya wrote:
>> Hi Qemu-devel,
>>
>> This is my first attempt in Qemu.
>> Please let me know am doing correct or not.
>> SoC is cortex M3 based so no bootrom st
Hii Alistair,
On Sat, Apr 15, 2017 at 2:58 AM, Alistair Francis wrote:
> On Sun, Apr 9, 2017 at 4:19 AM, Subbaraya Sundeep
> wrote:
>> Modelled System Timer in Microsemi's Smartfusion2 Soc.
>> Timer has two 32bit down counters and two interrupts.
>>
>> Signed-off-by: Subbaraya Sundeep
>
> Hey S
Hi Alistair,
On Sat, Apr 15, 2017 at 3:02 AM, Alistair Francis wrote:
> On Sun, Apr 9, 2017 at 4:19 AM, Subbaraya Sundeep
> wrote:
>> Added Sytem register block of Smartfusion2.
>> This block has PLL registers which are accessed by guest.
>>
>> Signed-off-by: Subbaraya Sundeep
>> ---
>> hw/mis
Hii Alistair,
On Sat, Apr 15, 2017 at 2:42 AM, Alistair Francis wrote:
> On Sun, Apr 9, 2017 at 4:19 AM, Subbaraya Sundeep
> wrote:
>> Emulated Emcraft's Smartfusion2 System On Module starter
>> kit.
>>
>> Signed-off-by: Subbaraya Sundeep
>
> Hey Sundeep,
>
> Cool patch, I have some comments be
Hi Philippe,
On Wed, May 31, 2017 at 11:34 AM, Philippe Mathieu-Daudé
wrote:
> Hi Subbaraya,
>
>
> On 05/16/2017 12:38 PM, Subbaraya Sundeep wrote:
>
>> Emulated Emcraft's Smartfusion2 System On Module starter
>> kit.
>>
>> Signed-off-by: Subbaraya Sundeep
>> ---
>> hw/arm/Makefile.objs | 1 +
Hi Alistair,
On Wed, May 31, 2017 at 4:03 AM, Alistair Francis
wrote:
> On Sun, May 28, 2017 at 10:17 PM, sundeep subbaraya
> wrote:
> > Hi Alistair,
> >
> > On Sat, May 27, 2017 at 5:18 AM, Alistair Francis
> > wrote:
> >>
> >> On Tue, May 16
Hi Philippe,
On Wed, May 31, 2017 at 11:13 AM, Philippe Mathieu-Daudé
wrote:
> Hi Subbaraya,
>
> So far so good!
>
>
> On 05/16/2017 12:38 PM, Subbaraya Sundeep wrote:
>
>> Smartfusion2 SoC has hardened Microcontroller subsystem
>> and flash based FPGA fabric. This patch adds support for
>> Micr
Hi Philippe,
On Wed, May 31, 2017 at 11:06 AM, Philippe Mathieu-Daudé
wrote:
> Hi Sundeep,
>
> On 05/29/2017 02:28 AM, sundeep subbaraya wrote:
>
>> Hi Philippe,
>>
>> Any update on this? I will wait for your comments too
>> and send next iteration fixing
Hi Alistair,
On Fri, May 5, 2017 at 3:51 AM, Alistair Francis wrote:
> On Fri, Apr 28, 2017 at 9:51 AM, Subbaraya Sundeep
> wrote:
>> Smartfusion2 SoC has hardened Microcontroller subsystem
>> and flash based FPGA fabric. This patch adds support for
>> Microcontroller subsystem in the SoC.
>>
>>
Hi Alistair,
On Sat, May 6, 2017 at 5:23 AM, Alistair Francis wrote:
> On Fri, May 5, 2017 at 9:14 AM, sundeep subbaraya
> wrote:
>> Hi Alistair,
>>
>> On Fri, May 5, 2017 at 3:51 AM, Alistair Francis
>> wrote:
>>> On Fri, Apr 28, 2017 a
Hi Phil,
On Wed, May 10, 2017 at 3:11 PM, Philippe Mathieu-Daudé
wrote:
> Hi Subbaraya, nice work!
>
> The timer you are modeling is the mss_timer, which is in particular used
in
> the smartfusion2, I'd rather name it mss_timer.c so it can be reused by
> other SoC models.
>
Ok I will change all o
nd clocksource
>> driver added by myself @
>> https://github.com/Subbaraya-Sundeep/linux.git
>>
>> Baremetal elfs from Microsemi Softconsole IDE are also working.
>>
>> Thanks,
>> Sundeep
>>
>> Subbaraya Sundeep (5):
>> msf2: Add Smartfus
Hi Philippe,
On Wed, May 10, 2017 at 5:20 PM, Philippe Mathieu-Daudé
wrote:
> Hi Subbaraya,
>
>
> On 05/09/2017 01:44 PM, Subbaraya Sundeep wrote:
>
>> Smartfusion2 SoC has hardened Microcontroller subsystem
>> and flash based FPGA fabric. This patch adds support for
>> Microcontroller subsystem
Hi Philippe,
On Wed, May 10, 2017 at 5:42 PM, Philippe Mathieu-Daudé
wrote:
> Hi Subbaraya,
>
> Like my comment for the timer model, I'd name this model "mss_spi".
> The only difference I see in the SF2 is the STAT8 register.
> No need to register both devices now but maybe you can add a comment
Hi Phiilippe,
On Wed, May 10, 2017 at 4:04 PM, Philippe Mathieu-Daudé
wrote:
> Hi Subbaraya,
>
>
> On 05/09/2017 01:44 PM, Subbaraya Sundeep wrote:
>
>> Added Sytem register block of Smartfusion2.
>> This block has PLL registers which are accessed by guest.
>>
>> Signed-off-by: Subbaraya Sundeep
Hi Philippe,
On Fri, May 12, 2017 at 10:08 AM, Philippe Mathieu-Daudé
wrote:
> On 05/10/2017 09:37 AM, sundeep subbaraya wrote:
>
>> Hi Phil,
>>
>> On Wed, May 10, 2017 at 3:11 PM, Philippe Mathieu-Daudé > <mailto:f4...@amsat.org>> wrote:
>>
>>
Hi Philippe and Alistair,
On Mon, May 15, 2017 at 10:24 PM, Alistair Francis
wrote:
> On Thu, May 11, 2017 at 10:02 PM, Philippe Mathieu-Daudé
> wrote:
> > On 05/12/2017 12:17 AM, sundeep subbaraya wrote:
> >>
> >> Hi Philippe,
> >>
> >> On Wed,
Hi Philippe,
On Mon, May 15, 2017 at 5:22 PM, Philippe Mathieu-Daudé
wrote:
> Hi Subbaraya,
>
> +if (value & TIMER_MODE) {
>>> +qemu_log_mask(LOG_UNIMP, "64-bit mode not supported\n");
>>>
>>
>> No need of trailing '\n', be more specific, something like:
>>
>> qemu_log_ma
amed function msf2_init->emcraft_sf2_init in msf2-som.c
>> Added part-name,eNVM-size,eSRAM-size,pclk0 and pclk1
>> properties to soc.
>> Pass soc part-name,memory size and clock rate properties from som.
>> v4:
>> Fixed build failure
Hi Phiiippe,
Gentle reminder.
Thanks,
Sundeep
On Mon, Jul 10, 2017 at 1:55 PM, sundeep subbaraya
wrote:
> Hi Alistair,
>
> On Fri, Jul 7, 2017 at 10:03 PM, Alistair Francis
> wrote:
>
>> On Fri, Jul 7, 2017 at 12:08 AM, sundeep subbaraya
>> wrote:
>> >
Hi Philippe,
On Mon, Jun 26, 2017 at 9:41 PM, sundeep subbaraya
wrote:
> Hi Philippe,
>
> On Fri, Jun 9, 2017 at 12:51 PM, sundeep subbaraya > wrote:
>
>> Hi Philippe,
>>
>> On Wed, May 31, 2017 at 11:06 AM, Philippe Mathieu-Daudé > > wrote:
>>
&
Hi Peter,
On Mon, Jul 3, 2017 at 2:30 AM, Peter Maydell
wrote:
> On 2 July 2017 at 18:39, sundeep subbaraya wrote:
> > I figured out that systick uses cpu clock as clock source and
> > system_clock_scale
> > need to be set in msf2-soc.c. There is a bug in u-boot where it
Hi Alistair,
On Wed, Jul 5, 2017 at 11:26 PM, Alistair Francis
wrote:
> On Sun, Jul 2, 2017 at 9:45 PM, Subbaraya Sundeep
> wrote:
> > Modelled System Timer in Microsemi's Smartfusion2 Soc.
> > Timer has two 32bit down counters and two interrupts.
> >
> > Signed-off-by: Subbaraya Sundeep
> > -
Hi Alistair,
On Wed, Jul 5, 2017 at 11:28 PM, Alistair Francis
wrote:
> On Wed, Jul 5, 2017 at 10:56 AM, Alistair Francis
> wrote:
> > On Sun, Jul 2, 2017 at 9:45 PM, Subbaraya Sundeep
> > wrote:
> >> Modelled System Timer in Microsemi's Smartfusion2 Soc.
> >> Timer has two 32bit down counters
Hi Alistair,
On Wed, Jul 5, 2017 at 11:36 PM, Alistair Francis
wrote:
> On Sun, Jul 2, 2017 at 9:45 PM, Subbaraya Sundeep
> wrote:
> > Added Sytem register block of Smartfusion2.
> > This block has PLL registers which are accessed by guest.
> >
> > Signed-off-by: Subbaraya Sundeep
> > ---
> >
Hi Alistair,
On Wed, Jul 5, 2017 at 11:55 PM, Alistair Francis
wrote:
> On Sun, Jul 2, 2017 at 9:45 PM, Subbaraya Sundeep
> wrote:
>
> The patch title shouldn't end in a full stop.
>
Ok will remove .
>
> > Smartfusion2 SoC has hardened Microcontroller subsystem
> > and flash based FPGA fabric
Hi Alistair,
On Wed, Jul 5, 2017 at 11:48 PM, Alistair Francis
wrote:
> On Sun, Jul 2, 2017 at 9:45 PM, Subbaraya Sundeep
> wrote:
> > Modelled Microsemi's Smartfusion2 SPI controller.
> >
> > Signed-off-by: Subbaraya Sundeep
> > ---
> > hw/ssi/Makefile.objs | 1 +
> > hw/ssi/mss-spi.c
Hi Alistair,
On Fri, Jul 7, 2017 at 10:03 PM, Alistair Francis
wrote:
> On Fri, Jul 7, 2017 at 12:08 AM, sundeep subbaraya
> wrote:
> > Hi Alistair,
> >
> > On Wed, Jul 5, 2017 at 11:36 PM, Alistair Francis
> > wrote:
> >>
> >> On Sun, Jul 2
Hi Alistair,
On Sat, May 27, 2017 at 5:18 AM, Alistair Francis
wrote:
> On Tue, May 16, 2017 at 8:38 AM, Subbaraya Sundeep
> wrote:
> > Smartfusion2 SoC has hardened Microcontroller subsystem
> > and flash based FPGA fabric. This patch adds support for
> > Microcontroller subsystem in the SoC.
Hi Alistair,
On Sat, May 27, 2017 at 5:30 AM, Alistair Francis
wrote:
> On Tue, May 16, 2017 at 8:38 AM, Subbaraya Sundeep
> wrote:
> > Emulated Emcraft's Smartfusion2 System On Module starter
> > kit.
> >
> > Signed-off-by: Subbaraya Sundeep
> > ---
> > hw/arm/Makefile.objs | 1 +
> > hw/ar
Hi Philippe,
Any update on this? I will wait for your comments too
and send next iteration fixing Alistair comments.
Thanks,
Sundeep
On Wed, May 17, 2017 at 3:09 PM, sundeep subbaraya
wrote:
> Hi Philippe,
>
> On Wed, May 17, 2017 at 9:57 AM, Philippe Mathieu-Daudé
> wrote:
>
Hi Alistair,
I will remove the abort and send next iteration.
Thanks,
Sundeep
On Tue, Aug 1, 2017 at 11:38 AM, sundeep subbaraya
wrote:
> Hi Philippe,
>
> Ping again :)
>
> Thanks,
> Sundeep
>
> On Fri, Jul 21, 2017 at 2:50 PM, sundeep subbaraya > wrote:
>
>&
Hi Alistair,
On Tue, Aug 29, 2017 at 3:23 AM, Alistair Francis
wrote:
> On Mon, Aug 28, 2017 at 9:37 AM, Subbaraya Sundeep
> wrote:
> > Modelled System Timer in Microsemi's Smartfusion2 Soc.
> > Timer has two 32bit down counters and two interrupts.
> >
> > Signed-off-by: Subbaraya Sundeep
>
>
Hi,
Ping
On Thu, Jul 13, 2017 at 7:51 AM, sundeep subbaraya
wrote:
> Hi Phiiippe,
>
> Gentle reminder.
>
> Thanks,
> Sundeep
>
>
> On Mon, Jul 10, 2017 at 1:55 PM, sundeep subbaraya > wrote:
>
>> Hi Alistair,
>>
>> On Fri, Jul 7, 2017 at
Hi Philippe,
Ping again :)
Thanks,
Sundeep
On Fri, Jul 21, 2017 at 2:50 PM, sundeep subbaraya
wrote:
> Hi,
>
> Ping
>
> On Thu, Jul 13, 2017 at 7:51 AM, sundeep subbaraya > wrote:
>
>> Hi Phiiippe,
>>
>> Gentle reminder.
>>
>> Thanks,
Hi Peter,
On Tue, Oct 10, 2017 at 6:24 PM, Peter Maydell
wrote:
> On 20 September 2017 at 21:17, Philippe Mathieu-Daudé
> wrote:
> > From: Subbaraya Sundeep
> >
> > Modelled Microsemi's Smartfusion2 SPI controller.
> >
> > Signed-off-by: Subbaraya Sundeep
> > Reviewed-by: Alistair Francis
>
Hi Philippe,
On Sun, May 27, 2018 at 8:56 AM, Philippe Mathieu-Daudé wrote:
> On 05/26/2018 06:53 AM, Subbaraya Sundeep wrote:
>> Modelled Ethernet MAC of Smartfusion2 SoC.
>> Micrel KSZ8051 PHY is present on Emcraft's SOM kit hence same
>> PHY is emulated.
>>
>> Signed-off-by: Subbaraya Sundeep
Hi Peter,
On Tue, May 29, 2018 at 10:13 PM, Peter Maydell
wrote:
> On 26 May 2018 at 10:51, Subbaraya Sundeep wrote:
>> Modelled Ethernet MAC of Smartfusion2 SoC.
>> Micrel KSZ8051 PHY is present on Emcraft's SOM kit hence same
>> PHY is emulated.
>>
>> Signed-off-by: Subbaraya Sundeep
>
> Hi;
Hi,
On Wed, May 30, 2018 at 3:33 AM, Julia Suvorova via Qemu-devel
wrote:
> Basic implementation of nRF51 SoC UART.
> Description could be found here:
> http://infocenter.nordicsemi.com/pdf/nRF51_RM_v3.0.1.pdf
>
> The following features are not yet implemented:
> Control with SUSPEND/START*/S
Hi Alistair,
On Wed, Sep 13, 2017 at 5:20 AM, Alistair Francis
wrote:
> On Thu, Sep 7, 2017 at 12:24 PM, Subbaraya Sundeep
> wrote:
> > Modelled Microsemi's Smartfusion2 SPI controller.
> >
> > Signed-off-by: Subbaraya Sundeep
>
> Reviewed-by: Alistair Francis
>
> Thank you,
Sundeep
> Thank
Hi Philippe,
All patches got Reviewed-by. Do you want me to change alias to remap and
send
v9 or wait so that you get time to review?
Thanks,
Sundeep
On Fri, Sep 8, 2017 at 12:56 PM, sundeep subbaraya
wrote:
> Hi Philippe,
>
> On Fri, Sep 8, 2017 at 3:08 AM, Philippe Mathieu-Daudé
Hi Philippe,
On Wed, Sep 13, 2017 at 2:51 PM, sundeep subbaraya
wrote:
> Hi Philippe,
>
> All patches got Reviewed-by. Do you want me to change alias to remap and
> send
> v9 or wait so that you get time to review?
>
> Sorry. My bad, I overlooked your comment. I will just d
Hi Philippe,
On Thu, Sep 14, 2017 at 6:43 PM, Peter Maydell
wrote:
> On 14 September 2017 at 05:36, Philippe Mathieu-Daudé
> wrote:
> > On 09/07/2017 04:24 PM, Subbaraya Sundeep wrote:
> >> +static uint64_t msf2_sysreg_read(void *opaque, hwaddr offset,
> >> +unsigned size)
> >> +{
> >> +
Hi Philippe,
On Thu, Sep 14, 2017 at 10:06 AM, Philippe Mathieu-Daudé
wrote:
> Hi Sundeep,
>
>
> On 09/07/2017 04:24 PM, Subbaraya Sundeep wrote:
>
>> Added Sytem register block of Smartfusion2.
>> This block has PLL registers which are accessed by guest.
>>
>> Signed-off-by: Subbaraya Sundeep
Hi Peter,
On Thu, Sep 14, 2017 at 10:44 PM, Peter Maydell
wrote:
> On 7 September 2017 at 20:24, Subbaraya Sundeep
> wrote:
> > Emulated Emcraft's Smartfusion2 System On Module starter
> > kit.
> > +static void emcraft_sf2_machine_init(MachineClass *mc)
> > +{
> > +mc->desc = "SmartFusion2
Hi Philippe,
On Mon, Sep 18, 2017 at 5:27 AM, Philippe Mathieu-Daudé
wrote:
> Hi Sundeep,
>
> On 09/14/2017 01:36 AM, Philippe Mathieu-Daudé wrote:
>
>> On 09/07/2017 04:24 PM, Subbaraya Sundeep wrote:
>>
> [...]
>
>> +static inline int msf2_divbits(uint32_t div)
>>>
>>
>> Please directly use ct
Hi Philippe,
On Mon, Sep 18, 2017 at 6:38 AM, Philippe Mathieu-Daudé
wrote:
> On 09/15/2017 01:59 PM, Subbaraya Sundeep wrote:
>
>> Smartfusion2 SoC has hardened Microcontroller subsystem
>> and flash based FPGA fabric. This patch adds support for
>> Microcontroller subsystem in the SoC.
>>
>> S
Hi Philippe,
On Mon, Sep 18, 2017 at 6:31 AM, Philippe Mathieu-Daudé
wrote:
> Hi Sundeep, Peter,
>
>
> On 09/15/2017 01:59 PM, Subbaraya Sundeep wrote:
>
>> Added Sytem register block of Smartfusion2.
>> This block has PLL registers which are accessed by guest.
>>
>> Signed-off-by: Subbaraya Sun
H Peter,
On Mon, Sep 18, 2017 at 4:05 PM, Peter Maydell
wrote:
> On 18 September 2017 at 11:17, sundeep subbaraya
> wrote:
> > Hi Philippe,
> >
> > On Mon, Sep 18, 2017 at 6:31 AM, Philippe Mathieu-Daudé >
> > wrote:
> >>
> >> Hi Su
Hi Peter,
On Mon, Sep 18, 2017 at 3:47 PM, sundeep subbaraya
wrote:
> Hi Philippe,
>
> On Mon, Sep 18, 2017 at 6:31 AM, Philippe Mathieu-Daudé
> wrote:
>
>> Hi Sundeep, Peter,
>>
>>
>> On 09/15/2017 01:59 PM, Subbaraya Sundeep wrote:
>>
>>>
Hi Peter,
On Tue, Oct 17, 2017 at 8:58 PM, Peter Maydell
wrote:
> On 16 October 2017 at 18:54, Subbaraya Sundeep
> wrote:
> > Fixed incorrect frame size mask, validated maximum frame
> > size in spi_write and removed dead code.
> >
> > Signed-off-by: Subbaraya Sundeep
> > ---
> > hw/ssi/mss-s
Hi Peter,
On Wed, Oct 18, 2017 at 8:45 AM, sundeep subbaraya
wrote:
> Hi Peter,
>
> On Tue, Oct 17, 2017 at 8:58 PM, Peter Maydell
> wrote:
>
>> On 16 October 2017 at 18:54, Subbaraya Sundeep
>> wrote:
>> > Fixed incorrect frame size mask, validated maxi
Hi Darren,
On Wed, Oct 18, 2017 at 2:24 PM, Darren Kenny
wrote:
> On Wed, Oct 18, 2017 at 03:40:38AM +, Subbaraya Sundeep wrote:
>
>> Fixed incorrect frame size mask, validated maximum frame
>> size in spi_write and removed dead code.
>>
>> Signed-off-by: Subbaraya Sundeep
>> ---
>> v2:
>>
Hi Darren,
On Wed, Oct 18, 2017 at 4:04 PM, Darren Kenny
wrote:
> Hi Sundeep,
>
>
> On Wed, Oct 18, 2017 at 10:10:07AM +0000, sundeep subbaraya wrote:
>
>> Hi Darren,
>>
>> On Wed, Oct 18, 2017 at 2:24 PM, Darren Kenny
>> wrote:
>>
>> On Wed,
Hi Darren,
On Mon, Oct 23, 2017 at 12:18 AM, Darren Kenny
wrote:
> On Sun, Oct 22, 2017 at 06:58:02PM +0530, Subbaraya Sundeep wrote:
>
>> Fixed incorrect frame size mask, validated maximum frame
>> size in spi_write and removed dead code.
>>
>> Signed-off-by: Subbaraya Sundeep
>> ---
>> v3:
>>
Hi Peter,
On Sun, Oct 22, 2017 at 7:35 PM, wrote:
> Hi,
>
> This series failed automatic build test. Please find the testing commands
> and
> their output below. If you have docker installed, you can probably
> reproduce it
> locally.
>
> Type: series
> Message-id: 1508678882-4327-1-git-send-ema
Hi Fam,
On Mon, Oct 23, 2017 at 10:48 AM, Fam Zheng wrote:
> On Mon, 10/23 08:59, sundeep subbaraya wrote:
> > > Cloning into '/var/tmp/patchew-tester-tmp-egubaaoc/src/dtc'...
> > > fatal: Could not read from remote repository.
> > >
> > > Pl
On Wed, Oct 25, 2017 at 2:15 PM, Darren Kenny
wrote:
> LGTM now, thanks.
>
> Reviewed-by: Darren Kenny
>
Thanks Darren,
Sundeep
>
> Thanks,
>
> Darren.
>
>
> On Wed, Oct 25, 2017 at 07:59:04AM +0530, Subbaraya Sundeep wrote:
>
>> Fixed incorrect frame size mask, validated maximum frame
>> siz
Hi Philippe and Peter,
On Tue, Sep 19, 2017 at 3:34 AM, Philippe Mathieu-Daudé
wrote:
> On 09/18/2017 04:23 PM, Subbaraya Sundeep wrote:
>
>> Smartfusion2 SoC has hardened Microcontroller subsystem
>> and flash based FPGA fabric. This patch adds support for
>> Microcontroller subsystem in the So
type names
> Renamed function msf2_init->emcraft_sf2_init in msf2-som.c
> Added part-name,eNVM-size,eSRAM-size,pclk0 and pclk1
> properties to soc.
> Pass soc part-name,memory size and clock rate properties from som.
> v4:
> Fixed build f
Thanks Peter, Philippe and Alistair :)
Sundeep
On Thu, Sep 21, 2017 at 10:03 PM, Peter Maydell
wrote:
> On 20 September 2017 at 21:17, Philippe Mathieu-Daudé
> wrote:
> > Hi Peter,
> >
> > Now than Igor's patch landed, I respin Sundeep's series updating it to
> work
> > after the "arm: drop int
Hi Alistair,
On Mon, Apr 24, 2017 at 11:23 PM, Alistair Francis wrote:
>>>
>>> Instead of calling all of these in the init function you should split
>>> it up over the machines init and realize function.
>>>
>>> Look at the stm32f205_soc or xlnx-zynqmp files for examples of how to do
>>> this.
>
Hi Alistair and Peter,
On Mon, Apr 24, 2017 at 11:28 PM, Peter Maydell
wrote:
> On 24 April 2017 at 18:44, Alistair Francis wrote:
>> Basically the simple explanation is that init is called when the
>> object is created and realize is called when the object is realized.
>>
>> Generally for devic
Hi Alistair,
On Mon, Apr 24, 2017 at 11:14 PM, Alistair Francis wrote:
+
+isr = !!(st->regs[R_RIS] & TIMER_RIS_ACK);
+ier = !!(st->regs[R_CTRL] & TIMER_CTRL_INTR);
+
+qemu_set_irq(st->irq, (ier && isr));
+}
+
+static uint64_t
+timer_read(vo
Hi Alistair,
On Fri, Apr 28, 2017 at 12:23 AM, Alistair Francis wrote:
> On Tue, Apr 25, 2017 at 3:36 AM, sundeep subbaraya
> wrote:
>> Hi Alistair,
>>
>> On Mon, Apr 24, 2017 at 11:14 PM, Alistair Francis
>> wrote:
>>>>>> +
>
Hi,
Gentle Reminder.
Thanks,
Sundeep
On Fri, Apr 28, 2017 at 10:21 PM, Subbaraya Sundeep
wrote:
> Modelled Microsemi's Smartfusion2 SPI controller.
>
> Signed-off-by: Subbaraya Sundeep
> ---
> Hi Peter and Alistair,
>
> I created two SPI controllers as per SoC spec
> in hw/arm/msf2_soc.c. I am
Hi Alistair,
On Wed, May 3, 2017 at 3:25 AM, Alistair Francis wrote:
> On Fri, Apr 28, 2017 at 9:51 AM, Subbaraya Sundeep
> wrote:
>> Modelled System Timer in Microsemi's Smartfusion2 Soc.
>> Timer has two 32bit down counters and two interrupts.
>>
>> Signed-off-by: Subbaraya Sundeep
>> ---
>>
Hi Philippe,
On Wed, Aug 30, 2017 at 8:15 AM, Philippe Mathieu-Daudé
wrote:
> Hi Subbaraya,
>
>
> On 08/28/2017 01:38 PM, Subbaraya Sundeep wrote:
>
>> Smartfusion2 SoC has hardened Microcontroller subsystem
>> and flash based FPGA fabric. This patch adds support for
>> Microcontroller subsystem
Hi Philippe,
On Wed, Aug 30, 2017 at 7:18 AM, Philippe Mathieu-Daudé
wrote:
> Hi Subbaraya,
>
>
> On 08/28/2017 01:38 PM, Subbaraya Sundeep wrote:
>
>> Emulated Emcraft's Smartfusion2 System On Module starter
>> kit.
>>
>> Signed-off-by: Subbaraya Sundeep
>> ---
>> hw/arm/Makefile.objs | 2 +
Hi Alistair,
On Fri, Sep 1, 2017 at 4:28 AM, Alistair Francis
wrote:
> On Mon, Aug 28, 2017 at 9:38 AM, Subbaraya Sundeep
> wrote:
> > Added Sytem register block of Smartfusion2.
> > This block has PLL registers which are accessed by guest.
> >
> > Signed-off-by: Subbaraya Sundeep
> > ---
> >
Ping.
Thanks,
Sundeep
On Mon, Aug 28, 2017 at 10:08 PM, Subbaraya Sundeep
wrote:
> Modelled Microsemi's Smartfusion2 SPI controller.
>
> Signed-off-by: Subbaraya Sundeep
> ---
> hw/ssi/Makefile.objs | 1 +
> hw/ssi/mss-spi.c | 409 ++
> +++
Hi Alistair,
On Thu, Sep 7, 2017 at 1:59 AM, Alistair Francis
wrote:
> On Mon, Aug 28, 2017 at 9:38 AM, Subbaraya Sundeep
> wrote:
> > Modelled Microsemi's Smartfusion2 SPI controller.
> >
> > Signed-off-by: Subbaraya Sundeep
> > ---
> > hw/ssi/Makefile.objs | 1 +
> > hw/ssi/mss-spi.c
to source files
>> Added properties m3clk, apb0div, apb0div1 properties
>> to soc.
>> Added properties apb0divisor, apb1divisor to sysreg
>> Update system_clock_source in msf2-soc.c
>> Changed machine name smartfusion2-som->emcraft
Hi Philippe,
On Fri, Sep 8, 2017 at 3:08 AM, Philippe Mathieu-Daudé
wrote:
> On 09/07/2017 04:24 PM, Subbaraya Sundeep wrote:
>
>> Smartfusion2 SoC has hardened Microcontroller subsystem
>> and flash based FPGA fabric. This patch adds support for
>> Microcontroller subsystem in the SoC.
>>
>> Si
Hi Guys,
On Fri, Nov 10, 2017 at 5:52 AM, Philippe Mathieu-Daudé
wrote:
> On 11/09/2017 08:55 PM, Peter Maydell wrote:
> > On 9 November 2017 at 21:46, Philippe Mathieu-Daudé
> wrote:
> >> Hi Subbaraya,
> >>
> >> On 11/09/2017 09:02 AM, Subbaraya Sundeep wrote:
> >>> add voluntarily myself as m
Hi,
On Fri, Nov 10, 2017 at 7:10 PM, Philippe Mathieu-Daudé
wrote:
> On 11/10/2017 09:56 AM, Peter Maydell wrote:
> > On 10 November 2017 at 00:22, Philippe Mathieu-Daudé
> wrote:
> >> On 11/09/2017 08:55 PM, Peter Maydell wrote:
> >>> I don't in general expect to take pull requests from
> >>>
Hi Thomas,
I will check and get back to you in a week.
Hope that's okay.
Thanks,
Sundeep
On Tue, Jul 14, 2020 at 8:12 PM Philippe Mathieu-Daudé wrote:
>
> Ping?
>
> On 7/7/20 7:32 AM, Thomas Huth wrote:
> > On 07/07/2020 07.18, Thomas Huth wrote:
> >>
> >> Hi Subbaraya,
> >>
> >> today, I noti
On Wed, Jul 15, 2020 at 8:12 PM Markus Armbruster wrote:
>
> Philippe Mathieu-Daudé writes:
>
> > On 7/15/20 4:04 PM, Markus Armbruster wrote:
> >> Watch this:
> >>
> >> $ qemu-system-aarch64 -M ast2600-evb -S -display none -qmp stdio
> >> {"QMP": {"version": {"qemu": {"micro": 50, "minor
Yep I will rework on this soon.
Thanks guys,
Sundeep
On Thu, Jul 16, 2020 at 1:06 PM Philippe Mathieu-Daudé wrote:
>
> On 7/16/20 8:07 AM, Thomas Huth wrote:
> > On 16/07/2020 04.59, sundeep subbaraya wrote:
> >> On Wed, Jul 15, 2020 at 8:12 PM Markus Ar
Acked-by: Subbaraya Sundeep
Thanks,
Sundeep
On Sun, Oct 4, 2020 at 11:55 PM Philippe Mathieu-Daudé wrote:
>
> These individual contributors have a number of contributions,
> add them to the 'individual' group map.
>
> Cc: Ahmed Karaman
> Cc: Aleksandar Markovic
> Cc: Alistair Francis
> Cc: A
Hi Philippe,
On Mon, Apr 6, 2020 at 3:54 PM Philippe Mathieu-Daudé wrote:
>
> Hi Sundeep,
>
> On 4/5/20 7:13 AM, sundeep.l...@gmail.com wrote:
> > From: Subbaraya Sundeep
> >
> > This patch set emulates Ethernet MAC block
> > present in Microsemi SmartFusion2 SoC.
> >
> > v2:
> >No changes.
Hi Jason,
On Thu, Apr 9, 2020 at 9:40 AM Jason Wang wrote:
>
>
> On 2020/4/7 下午7:15, sundeep.l...@gmail.com wrote:
> > From: Subbaraya Sundeep
> >
> > Modelled Ethernet MAC of Smartfusion2 SoC.
> > Micrel KSZ8051 PHY is present on Emcraft's
> > SOM kit hence same PHY is emulated.
> >
> > Signed-
Hi Philippe,
On Mon, Apr 13, 2020 at 2:16 AM Philippe Mathieu-Daudé wrote:
>
> Hi Sundeep,
>
> On 4/10/20 4:45 PM, sundeep.l...@gmail.com wrote:
> > From: Subbaraya Sundeep
> >
> > Modelled Ethernet MAC of Smartfusion2 SoC.
> > Micrel KSZ8051 PHY is present on Emcraft's
> > SOM kit hence same PH
Hi Philippe,
On Sun, Apr 12, 2020 at 11:28 PM Philippe Mathieu-Daudé wrote:
>
> On 4/10/20 4:45 PM, sundeep.l...@gmail.com wrote:
> > From: Subbaraya Sundeep
> >
> > With SmartFusion2 Ethernet MAC model in
> > place this patch adds the same to SoC.
> >
> > Signed-off-by: Subbaraya Sundeep
> > -
Hi Philippe,
On Sun, Apr 12, 2020 at 11:32 PM Philippe Mathieu-Daudé wrote:
>
> On 4/10/20 4:45 PM, sundeep.l...@gmail.com wrote:
> > From: Subbaraya Sundeep
> >
> > In addition to simple serial test this patch uses ping
> > to test the ethernet block modelled in SmartFusion2 SoC.
> >
> > Signed
Hi Philippe,
On Wed, Apr 15, 2020 at 11:43 AM Philippe Mathieu-Daudé wrote:
>
> On 4/14/20 5:02 PM, sundeep.l...@gmail.com wrote:
> > From: Subbaraya Sundeep
> >
> > Modelled Ethernet MAC of Smartfusion2 SoC.
> > Micrel KSZ8051 PHY is present on Emcraft's
> > SOM kit hence same PHY is emulated.
Thanks Peter,
Sundeep
On Fri, Apr 17, 2020 at 7:27 PM Peter Maydell wrote:
>
> On Thu, 16 Apr 2020 at 15:55, wrote:
> >
> > From: Subbaraya Sundeep
> >
> > This patch set emulates Ethernet MAC block
> > present in Microsemi SmartFusion2 SoC.
> >
> > v6:
> > Fixed destination address matching
Hi,
On Wed, Mar 13, 2019 at 6:36 AM Philippe Mathieu-Daudé wrote:
>
> '
> On Tue, Mar 12, 2019 at 6:44 PM Markus Armbruster wrote:
> >
> > Dear board code maintainers,
> >
> > This is a (rather late) follow-up to the last QEMU summit. Minutes[*]:
> >
> > * Deprecating unmaintained features (de
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