y because $(dir ..) is guaranteed to return a string
ending in '/'.
Signed-off-by: Peter Maydell
---
Mostly cosmetic, although I guess there's a faint chance that expanding
all those hw/*.o would hit the command line argument buffer limit...
Makefile.hw |4 ++--
1 files changed,
Drop the special casing of NCPU=1 for the NVIC. This slightly
increases the amount of memory used by its state structure,
but removes some ifdeffery and means we can safely move the
GIC state into a common subclass structure.
Signed-off-by: Peter Maydell
---
hw/arm_gic.c | 23
ff-by: Peter Maydell
---
hw/arm_gic.c | 56 +---
1 files changed, 33 insertions(+), 23 deletions(-)
diff --git a/hw/arm_gic.c b/hw/arm_gic.c
index ad72ac6..a6e2431 100644
--- a/hw/arm_gic.c
+++ b/hw/arm_gic.c
@@ -86,11 +86,7 @@ typedef s
Remove more NVIC ifdefs by moving the code to setup the CPU interface
memory regions into the GIC specific arm_gic_init() function rather
than the gic_init() function. Rename the latter to more closely
reflect what it's now actually doing.
Signed-off-by: Peter Maydell
---
hw/arm_
Add a cast to a logging printf to avoid a compilation failure
if target_phys_addr_t is a 64 bit type. (This is better than
using TARGET_FMT_plx because we really don't need a full
16 digit hex string to print the offset into a device.)
Signed-off-by: Peter Maydell
Reviewed-by: Eric
Peter C: ping? I was hoping for a review or ack for this
one before I stick it into an arm-devs pullreq.
thanks
-- PMM
On 22 May 2012 18:02, Peter Maydell wrote:
> Make the state fields rx_desc_addr and tx_desc_addr uint32_t;
> this matches the VMStateDescription, and also conforms
Ping? (patch still applies cleanly to current master; patchwork URL
http://patchwork.ozlabs.org/patch/161324/ )
-- PMM
On 25 May 2012 13:07, Peter Maydell wrote:
> Make qemu_find_file() check for the passed in name as a straight
> pathname even if it doesn't have any path separator c
On 14 June 2012 16:14, Andreas Färber wrote:
> Commit ec5b06d (configure: ensure directory exists when creating symlinks)
> moved the creation of directories into the symlink() function but forgot
> the case where no symlink is created.
>
> This leads to build errors on arm Linux due to -I../linux
On 19 June 2012 20:15, Alexander Graf wrote:
> Now that we are dynamically creating the dtb, it's really useful to
> be able to dump the created blob for debugging.
> @@ -300,6 +302,22 @@ static int mpc8544_load_device_tree(CPUPPCState *env,
> qemu_devtree_setprop_cell(fdt, pci, "#address-cel
On 19 June 2012 22:52, Scott Wood wrote:
> On 06/19/2012 12:53 AM, Stefan Weil wrote:
>> I saw from git history that ppc once had the same bug.
>> The sparc backend (and maybe others) might still have it.
>
> SPARC looks wrong; the others look OK as far as I can tell from a quick
> glance, without
Changes since V9: Added MAINTAINERS entry, rebased (and tested)
against git tip.
Peter C
--
Dr Peter Chubb peter.chubb AT nicta.com.au
http://www.ssrg.nicta.com.au Software Systems Research Group/NICTA
Board support for Kyoto Micro's KZM-ARM11-01, an evaluation board built
around the Freescale i.MX31.
Signed-off-by: Philip O'Sullivan
Signed-off-by: Peter Chubb
---
MAINTAINERS |6 +
hw/arm/Makefile.objs |1
hw/kzm.c
., the ones used to feed the periodic
and general purpose timers.
Signed-off-by: Peter Chubb
---
hw/arm/Makefile.objs |2
hw/imx.h | 10 +
hw/imx_ccm.c | 321 +++
3 files changed, 332 insertions(+), 1 deletion(-)
Index
van
Signed-off-by: Peter Chubb
Reviewed-by: Peter Maydell
---
hw/arm/Makefile.objs |1
hw/imx.h | 16 +
hw/imx_serial.c | 467 +++
3 files changed, 484 insertions(+)
create mode 100644 hw/imx_serial.c
Index: qemu
Implement the Freescale i.MX31 advanced vectored interrupt controller, at least
to the extent it is used by Linux 3.x
Vectors are not implemented.
Signed-off-by: Philip O'Sullivan
Signed-off-by: Peter Chubb
Reviewed-by: Peter Maydell
---
hw/arm/Makefile.objs |2
hw/imx_a
Implement the timers on the Freescale i.MX31 SoC.
This is not a complete implementation, but gives enough for
Linux to boot and run. In particular external triggers, which are
not useful under QEMU, are not implemented.
Signed-off-by: Philip O'Sullivan
Signed-off-by: Peter Chubb
---
h
On Tue, Jun 19, 2012 at 11:57 PM, Anthony Liguori wrote:
> On 06/19/2012 01:18 AM, Peter Crosthwaite wrote:
>>
>> Hi,
>>
>> I'm trying to upload my little endian Microblaze test vector to the
>> wiki, but the file upload restrictions are for images only and
On Wed, May 23, 2012 at 3:02 AM, Peter Maydell wrote:
> Make the state fields rx_desc_addr and tx_desc_addr uint32_t;
> this matches the VMStateDescription, and also conforms to how
> hardware works: the registers don't magically become larger
> if the device is attached to a
to be rewritten cos of flawed assumptions etc (like elfs
are not Linux). Can we just accept this and throw it out with the
trash when someone refactors the arm bootloader properly?
Regards,
Peter
On Tue, Jun 19, 2012 at 11:06 PM, Peter Maydell
wrote:
> On 18 June 2012 02:35, Peter A. G. Cro
I re-sent this yesterday to trivial.
May end up getting queued for merge twice.
On Tue, Jun 19, 2012 at 11:31 PM, Peter Maydell
wrote:
> From: Jim Meyering
>
> Use sizeof(rxbuf)-size (not sizeof(rxbuf-size)) as the number
> of bytes to clear. The latter would always clear 4
On 19 June 2012 16:24, Andreas Färber wrote:
> Am 19.06.2012 17:18, schrieb Peter Maydell:
>> On 14 June 2012 16:14, Andreas Färber wrote:
>>> Commit ec5b06d (configure: ensure directory exists when creating symlinks)
>>> moved the creation of directories into the sy
Convert the (dummy) generic timer cp15 implementation.
Signed-off-by: Peter Maydell
---
target-arm/helper.c | 23 +++
1 files changed, 11 insertions(+), 12 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index ebe6a55..2d58eb5 100644
--- a/target-arm
Convert the various WFI and barrier instruction special cases to use
cp_reginfo infrastructure.
Signed-off-by: Peter Maydell
---
target-arm/helper.c| 42 +++
target-arm/translate.c | 51
2 files changed
Convert the cp15 c3 register (MMU domain access control
or MPU write buffer control). NB that this is horribly
underdecoded for modern cores (should be crn=3,crm=0,
opc1=0,opc2=0) but this change preserves the existing
QEMU behaviour.
Signed-off-by: Peter Maydell
---
target-arm/helper.c | 18
There are now no uses of the old cp15 infrastructure,
so it can be deleted.
Signed-off-by: Peter Maydell
---
target-arm/helper.c| 39 ---
target-arm/helper.h|3 --
target-arm/translate.c | 59 +---
3 files
Convert the PXA2xx cp14 perf registers from old-style
coprocessor hooks to the new scheme.
Signed-off-by: Peter Maydell
---
hw/pxa2xx.c | 142 +-
1 files changed, 61 insertions(+), 81 deletions(-)
diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c
Convert cp15 MMU TLB control (crn=8) to new scheme.
Signed-off-by: Peter Maydell
---
target-arm/helper.c | 63 ++
1 files changed, 43 insertions(+), 20 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 0d7200f..8def356
Convert the v7 performance monitor cp15 registers to
the new scheme.
Signed-off-by: Peter Maydell
---
target-arm/cpu.c |4 -
target-arm/helper.c| 277 +++-
target-arm/translate.c | 26 +-
3 files changed, 158 insertions(+), 149
Convert the MMU fault status and MPU access permission cp15
registers to the new scheme.
Signed-off-by: Peter Maydell
---
target-arm/helper.c | 188 +--
1 files changed, 107 insertions(+), 81 deletions(-)
diff --git a/target-arm/helper.c b
Convert TLS registers to the new cp15 framework
Signed-off-by: Peter Maydell
---
target-arm/helper.c| 19 +++
target-arm/translate.c | 58
2 files changed, 19 insertions(+), 58 deletions(-)
diff --git a/target-arm/helper.c b
Convert the PXA2xx CLKCFG and PWRMODE cp14 registers to the
new arm_cp_reginfo scheme.
Signed-off-by: Peter Maydell
---
hw/pxa2xx.c | 171 --
1 files changed, 71 insertions(+), 100 deletions(-)
diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c
Convert the cp15 crn=6 registers to the new scheme.
Note that this includes some minor tidyup: drop an unnecessary
underdecoding of op2 on OMAPCP cores, and only implement the
pre-v6 c6,c0,0,1 IFAR on the 1026 and not on the other ARMv5
cores, which didn't have it.
Signed-off-by: Peter Ma
All the users of cpu_arm_set_cp_io have been converted, so we
can remove it and the infrastructure it used.
Signed-off-by: Peter Maydell
---
target-arm/cpu.h | 10
target-arm/helper.c| 54
target-arm/helper.h|3
Convert the cp15 VA-PA translation registers (a subset of
the crn=7 regs) to the new scheme.
Signed-off-by: Peter Maydell
---
target-arm/helper.c | 108 ++
1 files changed, 65 insertions(+), 43 deletions(-)
diff --git a/target-arm/helper.c b
clearly accidentally relegated the OMAPCP RAZ condition to only a subset of
the crn=9 space when adding support for other cores.
Signed-off-by: Peter Maydell
---
target-arm/cpu.c| 34 +
target-arm/helper.c | 104 --
2 files
Move the v6 optional block cache ops to the new cp15 framework.
This includes only providing them on the CPUs which implemented
them, rather than the previous blunderbuss approach of making
all MCRR instructions on all CPUs act as NOPs.
Signed-off-by: Peter Maydell
---
target-arm/helper.c
Add new function register_cp_regs_for_features() as a place to
register coprocessor registers dependent on feature flags.
Signed-off-by: Peter Maydell
---
target-arm/cpu-qom.h |1 +
target-arm/cpu.c |2 ++
target-arm/helper.c | 11 +++
3 files changed, 14 insertions(+), 0
Convert the cp15 crn=1 registers to the new scheme.
Signed-off-by: Peter Maydell
---
target-arm/cpu-qom.h |1 +
target-arm/cpu.c |7 ++-
target-arm/helper.c | 129 +-
3 files changed, 61 insertions(+), 76 deletions(-)
diff --git a
conversion, though.
Signed-off-by: Peter Maydell
---
target-arm/helper.c | 11 +--
1 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 3cffa00..5fa4ed5 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -106,6 +106,11
ned-off-by: Peter Maydell
---
Makefile.target |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/Makefile.target b/Makefile.target
index 550d889..686ba8d 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -193,8 +193,8 @@ qmp-commands-old.h: $(SRC_PATH)/qmp-commands.hx
On 20 June 2012 14:54, Peter Maydell wrote:
> Now we create object files in a hierarchy under hw/, so the
> 'clean' target must also updated to delete those object files.
> Rather than using a manual list of subdirectories which will
> easily drift out of date, we just dele
Convert the cp15 cache ID registers to the new scheme.
Signed-off-by: Peter Maydell
---
target-arm/cpu.c|2 -
target-arm/cpu.h|2 -
target-arm/helper.c | 61 +++---
3 files changed, 33 insertions(+), 32 deletions(-)
diff --git a
Convert the THUMB2EE cp14 registers TEECR and TEEHBR to
use arm_cp_reginfo.
Signed-off-by: Peter Maydell
---
target-arm/helper.c| 54 --
target-arm/helper.h|2 -
target-arm/translate.c | 66
3
Convert the cp15 crn=15 (implementation specific) registers
to the new scheme.
Signed-off-by: Peter Maydell
---
target-arm/cpu.c| 40 ++-
target-arm/cpu.h|1 +
target-arm/helper.c | 202 ++-
3 files changed, 126 insertions
All the uses of ARM_CPUID() to vary behaviour have now been
removed, so we can delete the ARM_CPUID_* macros now.
The one exception is the TI915T/925T, because of its odd behaviour
where the MIDR value can be changed at runtime.
Signed-off-by: Peter Maydell
Reviewed-by: Andreas Färber
Convert the cp15 crn=13 registers (FCSEIDR, CONTEXTIDR,
and the ARM946 Trace Process Identifier Register).
Signed-off-by: Peter Maydell
---
target-arm/helper.c | 61 ++-
1 files changed, 31 insertions(+), 30 deletions(-)
diff --git a/target-arm
Convert the cp14 debug registers (DBGDIDR, DBGDRAR, DBGDSAR) to the
cp_reginfo scheme.
Signed-off-by: Peter Maydell
---
target-arm/helper.c| 25 +
target-arm/translate.c | 28
2 files changed, 25 insertions(+), 28 deletions(-)
diff
93bfef4c6e4b23caea9d51e1099d06433d8835a4:
Allow machines to configure the QEMU_VERSION that's exposed via hardware
(2012-06-19 13:36:56 -0500)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git target-arm.for-upstream
Peter Maydell (33):
target-arm
Convert the cp15 crn=0 crm={1,2} features registers to
the new cp reg framework.
Signed-off-by: Peter Maydell
---
target-arm/cpu.c| 14 ---
target-arm/cpu.h|2 -
target-arm/helper.c | 62 --
3 files changed, 54 insertions
Convert the MPIDR to the new cp15 register scheme.
This includes giving it its own feature bit rather
than doing a CPUID value check.
Signed-off-by: Peter Maydell
---
target-arm/cpu.c|2 ++
target-arm/cpu.h|1 +
target-arm/helper.c | 50
Convert the coprocessor access functions for the pxa2xx PIC to the
arm_cp_reginfo scheme.
Signed-off-by: Peter Maydell
---
hw/pxa2xx_pic.c | 53 +++--
1 files changed, 31 insertions(+), 22 deletions(-)
diff --git a/hw/pxa2xx_pic.c b/hw
Remove the no-longer-used CPUARMState c0_cachetype field.
Although this was a constant register we had it in our
migration state. Drop this (with resulting version bump)
because for ARM currently we prefer cleaner migration
code and have not stabilised migration format yet.
Signed-off-by: Peter
Initial infrastructure for data-driven registration of
coprocessor register implementations.
We still fall back to the old-style switch statements pending
complete conversion of all existing registers.
Signed-off-by: Peter Maydell
---
target-arm/cpu-qom.h |3 +
target-arm/cpu.c
Convert the final ID registers to the new cp15 scheme.
Signed-off-by: Peter Maydell
---
target-arm/cpu.c|2 -
target-arm/helper.c | 116 ++-
2 files changed, 68 insertions(+), 50 deletions(-)
diff --git a/target-arm/cpu.c b/target-arm
Convert the cp15 crn=2 registers (MMU page table control,
MPU cache control) to the new scheme.
Signed-off-by: Peter Maydell
---
target-arm/cpu.c|1 -
target-arm/helper.c | 88 +++
2 files changed, 33 insertions(+), 56 deletions(-)
diff
doesn't actually have.
(This causes no problems currently because we over-broadly provide
those ops on all cores, but prevents us correctly narrowing the
block ops down to those cores which actually implement them.)
Signed-off-by: Peter Maydell
---
target-arm/cpu.c |2 +-
1 files chang
for the
ARM1176 one.
This allows us to remove the nasty hack which always sets Z.
Signed-off-by: Peter Maydell
---
target-arm/cpu.c| 19 +++
target-arm/cpu.h|3 ++
target-arm/helper.c | 63 ++-
3 files changed, 74 insertio
On 20 June 2012 15:51, Andreas Färber wrote:
> Am 20.06.2012 16:44, schrieb Anthony Liguori:
>> --- a/hw/kvm/Makefile.objs
>> +++ b/hw/kvm/Makefile.objs
>> @@ -1 +1 @@
>> -obj-$(CONFIG_KVM) += clock.o apic.o i8259.o ioapic.o i8254.o
>> +obj-$(CONFIG_I386) += clock.o apic.o i8259.o ioapic.o i8254.o
On 20 June 2012 16:04, Andreas Färber wrote:
> Am 20.06.2012 17:01, schrieb Peter Maydell:
>> I'm confused -- as far as I can tell these files are compiled per
>> target, eg we have both
>> CC i386-softmmu/hw/kvm/clock.o
>> and
>> CC x86_64-softmmu
On 20 June 2012 15:44, Anthony Liguori wrote:
> This avoids the problem associated with having multiple target specific files
> in a single directory with the current build system.
>
> We can eventually get rid of the hw/$BASE_ARCH/Makefiles.obj files too
>
> Signed-off-by: Anthony Liguori
> ---
Linux due to -I../linux-headers.
>
> Unbreak the build on arm Linux by reverting part of that commit.
>
> Signed-off-by: Andreas Färber
Reviewed-by: Peter Maydell
I guess we get to have the usual argument about how build fixes
get committed now :-)
-- PMM
ned-off-by: Peter Maydell
---
v1->v2: fixed missing "-f" option to rm, fixed grammar flub
in commit message.
Makefile.target |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/Makefile.target b/Makefile.target
index 550d889..6d60050 100644
--- a/Makefile.targe
This is v2, obviously -- I forgot to change the [PATCH] prefix :-(
-- PMM
On 20 June 2012 18:02, Peter Maydell wrote:
> Now we create object files in a hierarchy under hw/, so the
> 'clean' target must also be updated to delete those object files.
> Rather than usi
On 20 June 2012 22:14, Anthony Liguori wrote:
> Why not make life easy and fix dma_addr_t to 64-bit?
...for that matter weren't we tossing around the idea of just
making target_phys_addr_t 64 bits for everything? (I actually
want to do this for target-arm anyway; last time I did some
quick smoke-
Ping!
We good to go on this one? Whose queue should this go in or should I PULL?
On Thu, Jun 14, 2012 at 12:12 PM, Peter Crosthwaite
wrote:
> ergh,
>
> series version number is incorrect, this is v4.
>
> On Thu, Jun 14, 2012 at 12:20 PM, Peter A. G. Crosthwaite
> wrote:
>
Ping!
Id really appreciate some input on this issue (rather than going ahead
and doing it to discover that someone disagrees with the approach).
Regards,
Peter
On Mon, Jun 18, 2012 at 3:13 PM, Peter Crosthwaite
wrote:
> HI All,
>
> Have another one of these long RFCs for you all RE
t; converted endianness.
>
> To ease the pain of this, create a generic macro helper that allows us
> to pass the cells as arguments.
>
> Signed-off-by: Alexander Graf
Reviewed-by: Peter Crosthwaite
> ---
> device_tree.h | 12
> 1 files changed, 12 insertions(
t; us to do so.
>
> Signed-off-by: Alexander Graf
>
Reviewed-by: Peter Crosthwaite
There are consistency issues with the whole nofail/fail discussion but
as Alex pointed out, thats a battle for another day.
> ---
>
> v2 -> v3:
>
> - rename &quo
he easy choice.
>
> Signed-off-by: Alexander Graf
Reviewed-by: Peter Crosthwaite
> ---
> device_tree.c | 16 +++-
> device_tree.h |1 +
> 2 files changed, 16 insertions(+), 1 deletions(-)
>
> diff --git a/device_tree.c b/device_tree.c
> index 967c97a..2f1
On 20 June 2012 23:59, Anthony Liguori wrote:
> On 06/20/2012 05:26 PM, Peter Maydell wrote:
>> On 20 June 2012 22:14, Anthony Liguori wrote:
>> ...for that matter weren't we tossing around the idea of just
>> making target_phys_addr_t 64 bits for everything? (I actua
gt; + KERNEL_LOAD_ADDR,
> + ram_size - KERNEL_LOAD_ADDR);
> + entry = KERNEL_LOAD_ADDR;
> + }
> + if (kernel_size < 0) {
> + fprintf(stderr, "qem
On 20 June 2012 13:41, Gerd Hoffmann wrote:
> Commit 4be23939ab0d7019c7e59a37485b416fbbf0f073 makes ehci instantly
> zap any unlinked queue heads when the guest rings the dorbell.
Should be "doorbell" here and in the Subject, worth fixing up when
you do a next version / pullreq.
-- PMM
On 21 June 2012 18:24, Blue Swirl wrote:
> On Wed, Jun 20, 2012 at 7:10 AM, Jia Liu wrote:
>> ERROR: need consistent spacing around '*' (ctx:WxV)
>> #99: FILE: target-openrisc/int_helper.c:53:
>> +target_ulong HELPER(mul32)(CPUOpenRISCState *env,
>>
>> It is really weird. And, I don't know how to
On 20 June 2012 21:11, Alexander Graf wrote:
> + env->reset_msr = (1ULL < MSR_SF);
I assume you mean "<<" rather than "<" here and below...
-- PMM
On 21 June 2012 19:37, Stefan Weil wrote:
> I suggest a small change of the QEMU related mailing lists
> (see https://lists.nongnu.org/mailman/listinfo/):
>
> Replace Qemu-devel by QEMU-devel, Qemu-trivial by QEMU-trivial,
> and so on.
>
> This matches the official project name which is QEMU (not
Hi Evgeny,
Im just speculating here, but I recently ran into Linux hangs on
Microblaze due to ptimer issues and I think you may be suffering the
same base issue.
The Microblaze timer (hw/xilinx_timer.c) has a similar implementation
to the exynos (chained one-shot ptimer). Recently Peter Chubb
On Fri, Jun 22, 2012 at 5:50 PM, Jan Kiszka wrote:
> On 2012-06-22 08:44, Peter A. G. Crosthwaite wrote:
>> The block layer assumes that it is the only user of coroutines -
>> The qemu_in_coroutine() is used to determine if a function is in one of the
>> block layers corout
On 22 June 2012 09:00, Peter Crosthwaite
wrote:
> On Fri, Jun 22, 2012 at 5:50 PM, Jan Kiszka wrote:
>> Not sure if I understood the intention yet: Is this supposed to fix an
>> issue with the current usage of coroutines or to extend their usage
>> beyond that? In the latt
On Fri, Jun 22, 2012 at 5:49 PM, Kevin Wolf wrote:
> Am 22.06.2012 08:44, schrieb Peter A. G. Crosthwaite:
>> The block layer assumes that it is the only user of coroutines -
>> The qemu_in_coroutine() is used to determine if a function is in one of the
>> block layers corout
On Fri, Jun 22, 2012 at 6:16 PM, Peter Maydell wrote:
> On 22 June 2012 09:00, Peter Crosthwaite
> wrote:
>> On Fri, Jun 22, 2012 at 5:50 PM, Jan Kiszka wrote:
>>> Not sure if I understood the intention yet: Is this supposed to fix an
>>> issue with the current us
On 22 June 2012 09:20, Peter Crosthwaite
wrote:
> Its a machine model that instantiated some block devices concurrently.
> Theres some chicken-and-egg issues with the instantiation such that
> they have the happen concurrently. One device instantiates a block
> device (pflash_
On 22 June 2012 09:48, Markus Armbruster wrote:
> In my opinion, coroutines have been useful for us so far. Whether they
> remain useful, or serve us just as a stepping stone towards general
> threads remains to be seen.
>From my point of view I've seen a whole pile of problems and not
really an
On 22 June 2012 10:03, Stefan Hajnoczi wrote:
> On Tue, Jun 19, 2012 at 04:44:38PM +1000, Peter A. G. Crosthwaite wrote:
>> From: Jim Meyering
>>
>> Use sizeof(rxbuf)-size (not sizeof(rxbuf-size)) as the number
>> of bytes to clear.
> Thanks, applied to the
e.
>
> Signed-off-by: Alexander Graf
Yep, there's no OABI back-compat for thumb so it is always EABI.
(I think the code emitting Thumb SVCs with non-zero immediate
values is probably broken though.)
Reviewed-by: Peter Maydell
-- PMM
On Fri, Jun 22, 2012 at 7:15 PM, Stefan Hajnoczi wrote:
> On Thu, Jun 21, 2012 at 02:51:24PM +1000, Peter A. G. Crosthwaite wrote:
>> The sizep arg is populated with the size of the loaded device tree. Since
>> this
>> is one of those informational "please populate&qu
On Fri, Jun 22, 2012 at 6:53 PM, Kevin Wolf wrote:
> Am 22.06.2012 10:20, schrieb Peter Crosthwaite:
>> On Fri, Jun 22, 2012 at 5:49 PM, Kevin Wolf wrote:
>>> Am 22.06.2012 08:44, schrieb Peter A. G. Crosthwaite:
>>>> The block layer assumes that it is the only
put some --tested-by to this stuff with the microblaze machine
model. Let me know if/how I can help.
Regards,
Peter
On Sat, Jun 16, 2012 at 8:47 PM, Peter Crosthwaite
wrote:
> On Wed, 2012-06-13 at 15:55 -0500, Anthony Liguori wrote:
>> The current implementation of Interfaces is poorly
Remove an ifndef CONFIG_USER_ONLY guard that was pointless
because it is already inside an if !defined(CONFIG_USER_ONLY).
Signed-off-by: Peter Maydell
---
cpu-common.h |2 --
1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/cpu-common.h b/cpu-common.h
index 321037f..85548de
There's no need to make the include of targphys.h conditional
on whether TARGET_PHYS_ADDR_BITS is defined, because targphys.h
itself checks that and does nothing if it isn't.
Signed-off-by: Peter Maydell
---
cpu-common.h |2 --
1 files changed, 0 insertions(+), 2 deletions(-)
di
These patches remove a couple of pointless ifdef guards in cpu-common.h
that I happened to notice.
Peter Maydell (2):
cpu-common.h: Remove unnecessary guard on including targphys.h
cpu-common.h: Remove a pointless ifndef CONFIG_USER_ONLY
cpu-common.h |4
1 files changed, 0
On 22 June 2012 13:04, Markus Armbruster wrote:
> Peter Maydell writes:
>
>> On 22 June 2012 09:48, Markus Armbruster wrote:
>>> In my opinion, coroutines have been useful for us so far. Whether they
>>> remain useful, or serve us just as a stepping stone towards
CC device-tree.c original contributors. (Jerome Young and Hollis Blanchard).
I cant find a maintainer for device-tree, and Stefan wants a review.
This patch seem ok?
On Thu, Jun 21, 2012 at 2:51 PM, Peter A. G. Crosthwaite
wrote:
> The sizep arg is populated with the size of the loaded dev
Ping!
Any thoughts Peter?
Regards,
Peter
On Wed, Jun 20, 2012 at 11:45 AM, Peter Crosthwaite
wrote:
> It matches my flow in the real hardware.
>
> Heres the scenario where we need this (FYI applies to both microblaze and
> arm):
>
> User creates a Linux elf that includes a b
On 22 June 2012 14:27, Peter Crosthwaite
wrote:
> Ping!
>
> Any thoughts Peter?
Still sounds too specific to your odd use case and hardware to me.
I'd accept some reasonable way of saying "this ELF file is a Linux kernel",
but magically doing it if you also said -dtb isn
On Fri, Jun 22, 2012 at 11:36 PM, Peter Maydell
wrote:
> On 22 June 2012 14:27, Peter Crosthwaite
> wrote:
>> Ping!
>>
>> Any thoughts Peter?
>
> Still sounds too specific to your odd use case and hardware to me.
>
> I'd accept some reasonable way o
On Fri, Jun 22, 2012 at 11:36 PM, Peter Maydell
wrote:
> On 22 June 2012 14:27, Peter Crosthwaite
> wrote:
>> Ping!
>>
>> Any thoughts Peter?
>
> Still sounds too specific to your odd use case and hardware to me.
>
> I'd accept some reasonable way o
On 7 June 2012 23:24, Richard Henderson wrote:
> Proper signal numbers were not defined, and EXCP_INTERRUPT
> was unhandled, leading to all sorts of subtle confusion.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
-- PMM
On 7 June 2012 23:24, Richard Henderson wrote:
> And tidy up syscall_defs.h a little bit. For each target, only
> define the bits in arch/target/include/asm/fcntl.h, leaving the
> others to a new asm-generic section below.
This patch is doing two things at once -- could you separate
the refactor
On 7 June 2012 23:24, Richard Henderson wrote:
> Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
-- PMM
On 7 June 2012 23:24, Richard Henderson wrote:
> @@ -5880,12 +5880,13 @@ abi_long do_syscall(void *cpu_env, int num, abi_long
> arg1,
> mask = arg2;
> target_to_host_old_sigset(&set, &mask);
>
> - ret = get_errno(sigprocmask(how, &set, &oldset));
> -
> -
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