On 28 October 2012 23:48, Liu Ping Fan wrote:
> For those address spaces which want to be able out of big lock, they
> will be protected by their own local.
Are you sure this patch compiles? It seems to only be changing
the prototype and implementation of address_space_init() to take
an extra par
On 29 October 2012 05:24, liu ping fan wrote:
> Oh, ABBA problem can not be solved, I think we need clever deadlock detector.
If you cannot solve the problem then you must remain single threaded.
-- PMM
On 29 October 2012 07:45, Catalin Patulea wrote:
> This is setting the stage for a cleanup of FPREM and FPREM1 helpers while
> being
> sure that they behave same as bare metal.
>
> The test constructs operands using combinations of corner cases for the
> floating-point bitfields and prints operan
On 29 October 2012 06:35, Peter Crosthwaite
wrote:
> Device model for Primecell PL330 dma controller.
A general question -- this is a DMA controller so should it be using
the DMAContext APIs now? Avi?
> +static void pl330_queue_init(PL330Queue *s, int size, int channum)
> +{
> +
On 29 October 2012 07:06, Catalin Patulea wrote:
> With i386-linux-user target on x86_64 host, this does not introduce any new
> test
> failures.
>
> Signed-off-by: Catalin Patulea
Looks good, but checkpatch.pl complains about a bunch of style
issues -- can you fix them, please?
thanks
-- PMM
I just noticed this patch never got applied by anybody
(and alas it now needs a refresh because the file was renamed
in the interim.)
-- PMM
On 27 March 2012 16:43, Peter Maydell wrote:
> This patch is simple enough (and m68k unmaintained enough)
> that it could reasonably go throug
On 29 October 2012 09:54, Stefan Hajnoczi wrote:
> On Sat, Oct 20, 2012 at 08:37:04PM +0100, Peter Maydell wrote:
>> Rather than printing a message saying we're silently falling
>> back to gthread coroutines when running on MacOS, actually
>> do it silently.
>>
On 29 October 2012 10:25, Alexander Graf wrote:
> From: Peter Maydell
>
> Following commit 4be403c81 TARGET_PHYS_ADDR_BITS is always 64,
> and it's only used in one place (that commit removed all the
> other uses). Remove it completely, to avoid confusion with
&g
On Oct 29, 2012 7:35 PM, "Andreas Färber" wrote:
>
> Am 29.10.2012 02:34, schrieb Peter Crosthwaite:
> > Got rid of the duplication of the class init functions for the two PCI
EHCI
> > variants. The PCI specifics are passed in as as class_data and set by a
co
From: Meador Inge
Fixing a simple typo, s/errno/err/, that caused
the error status from GDB semihosted system calls
to be returned incorrectly.
Signed-off-by: Meador Inge
Reviewed-by: Andreas Färber
Signed-off-by: Peter Maydell
---
target-m68k/m68k-semi.c | 2 +-
1 file changed, 1 insertion
emu-system-m68k -semihosting -M dummy -display none -kernel
/tmp/hello
Meador's patch is already in qemu-trivial but I include it
here as it is a dependency.
Meador Inge (1):
m68k: Return semihosting errno values correctly
Peter Maydell (2):
target-m68k/m68k-semi: Handle get_user failur
Abstract out the use of put_user for returning semihosting call results,
so that we can log when a guest erroneously attempts a semihosting call
with an unwritable argument block.
Signed-off-by: Peter Maydell
---
target-m68k/m68k-semi.c | 47 +++
1
Handle failure of get_user accessing the semihosting
argument block, rather than simply ignoring the failures.
Signed-off-by: Peter Maydell
---
target-m68k/m68k-semi.c | 144 +++-
1 file changed, 93 insertions(+), 51 deletions(-)
diff --git a/target
based approach, could we get a review of
this and mix and match between this and V3 for the solution?
Regards,
Peter
On Thu, Oct 25, 2012 at 7:47 PM, Peter Crosthwaite
wrote:
> Added Sysbus variant of EHCI and attached it to Xilinx Zynq. Apparently the
> EHCI stuff is going to useful for
= {malloc = 0x5572683e ,
realloc = 0x55726896 ,
free = 0x557268fd , calloc = 0, try_malloc = 0,
try_realloc = 0}
trace_events = 0x0
trace_file = 0x0
Is this a regression in qemu-kvm. I remember there where some
modifications regarding SCSI
passthru lately. Maybe there was a problem introduced with this.
BR,
Peter
ff-by: Igor Mitsyanko
Reviewed-by: Peter Maydell
-- PMM
On 28 October 2012 15:59, Igor Mitsyanko wrote:
> This patch updates SD card model to support save/load of card's state.
>
> Signed-off-by: Igor Mitsyanko
Reviewed-by: Peter Maydell
-- PMM
On 28 October 2012 15:59, Igor Mitsyanko wrote:
> This was a part of a bigger series which also included SD state qomification,
> but I decided to split them.
I intend to add these patches to the arm-devs.next queue which I will
send a pullreq for tomorrow.
-- PMM
All changed made
Thanks,
Peter
On Mon, Oct 29, 2012 at 6:32 PM, Peter Maydell wrote:
> On 29 October 2012 06:35, Peter Crosthwaite
> wrote:
>> Device model for Primecell PL330 dma controller.
>
> A general question -- this is a DMA controller so should it be using
> th
All changed made,
Thanks,
Peter
On Mon, Oct 29, 2012 at 7:41 PM, Igor Mitsyanko wrote:
> Good day, Peter)
>
>
> On 10/29/2012 10:35 AM, Peter Crosthwaite wrote:
>>
>> Device model for Primecell PL330 dma controller.
>>
>> +
>> +static Prop
.
This series requires Peter Maydells dma_context_memory patch to function.
changed since v5:
addressed reviewer comments from Igor mitsyanko and Peter Maydell (1/2)
changed since v4:
s/petalogix/xilinx in my email address.
addressed reviewer comments from Igor mitsyanko and Peter Maydell (1/2
Signed-off-by: Peter Crosthwaite
---
hw/xilinx_zynq.c | 24
1 files changed, 24 insertions(+), 0 deletions(-)
diff --git a/hw/xilinx_zynq.c b/hw/xilinx_zynq.c
index c55dafb..e985e26 100644
--- a/hw/xilinx_zynq.c
+++ b/hw/xilinx_zynq.c
@@ -33,6 +33,10 @@
#define
Device model for Primecell PL330 dma controller.
Signed-off-by: Peter Crosthwaite
Signed-off-by: Kirill Batuzov
Tested-by: Igor Mitsyanko
---
changed from v5:
s/cpu_physical_memory_foo/dma_memory_foo (PMM review)
remove casts of g_new/malloc (PMM review)
s/hw_error/qemu_log_mask for registers
[Original cover by Igor]
First patch introduces standard SD host controller model. This is accumulated
version of my previous patch I sent a while ago and a recent SDHCI patch by
Peter A. G. Crosthwaite. Second patch introduces Exynos4210-specific SDHCI
built on top of standard SDHCI model
Allows for repeating of -sd arguments in the same way as -pflash and -mtdblock.
Acked-by: Igor Mitsyanko
Reviewed-by: Peter Maydell
Signed-off-by: Peter Crosthwaite
---
vl.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/vl.c b/vl.c
index 5a3d316..978bd68 100644
The Xilinx Zynq device has two SDHCI controllers. Added to the machine model.
Reviewed-by: Peter Maydell
Signed-off-by: Peter Crosthwaite
---
hw/xilinx_zynq.c | 10 ++
1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/hw/xilinx_zynq.c b/hw/xilinx_zynq.c
index c55dafb
From: Igor Mitsyanko
Custom Exynos4210 SD/MMC host controller, based on SD association standard host
controller ver. 2.00.
Signed-off-by: Igor Mitsyanko
Signed-off-by: Peter Crosthwaite
---
Hi Igor,
I had to change this patch significantly without any testing so I dont have any
confidence
On Tue, Oct 30, 2012 at 5:20 PM, Gerd Hoffmann wrote:
> On 10/29/12 15:08, Peter Crosthwaite wrote:
>> Ping!
>>
>> This is the first version of the EHCI sysbus series which takes a
>> property based approach rather than the dynamic class approach.
>>
>>
Don't explode QEMUMachineInitArgs before passing it to the common
versatile init function.
Signed-off-by: Peter Maydell
---
hw/versatilepb.c | 44 +++-
1 file changed, 11 insertions(+), 33 deletions(-)
diff --git a/hw/versatilepb.c b/hw/versatil
From: Peter Crosthwaite
QOMified the pflash_cfi0x so machine models can connect them up in custom ways.
Kept the pflash_cfi0x_register functions as is. They can still be used to
create a flash straight onto system memory.
Signed-off-by: Peter Crosthwaite
Reviewed-by: Peter Maydell
Signed-off
Use LOG_GUEST_ERROR to report guest attempts to access bad register offsets.
Signed-off-by: Peter Maydell
---
hw/pl061.c |6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/pl061.c b/hw/pl061.c
index 7d182e7..f1ed5ce 100644
--- a/hw/pl061.c
+++ b/hw/pl061.c
@@ -164,7
Don't explode QEMUMachineInitArgs before passing it to the vexpress
common init function.
Signed-off-by: Peter Maydell
---
hw/vexpress.c | 38 +-
1 file changed, 9 insertions(+), 29 deletions(-)
diff --git a/hw/vexpress.c b/hw/vexpress.c
index 3f
From: Igor Mitsyanko
Standard capacity cards SDSC use byte unit address while SDHC and SDXC cards use
block unit address (512 bytes) when setting ERASE_START and ERASE_END with CMD32
and CMD33, we have to account for this.
Signed-off-by: Igor Mitsyanko
Reviewed-by: Peter Maydell
Signed-off-by
Don't explode QEMUMachineInitArgs before calling common init function.
Signed-off-by: Peter Maydell
---
hw/spitz.c | 45 ++---
1 file changed, 10 insertions(+), 35 deletions(-)
diff --git a/hw/spitz.c b/hw/spitz.c
index 944c274..12e2815 100644
---
Use LOG_GUEST_ERROR to report guest accesses to bad offsets.
Signed-off-by: Peter Maydell
---
hw/arm11mpcore.c |7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/hw/arm11mpcore.c b/hw/arm11mpcore.c
index 105f158..640ed20 100644
--- a/hw/arm11mpcore.c
+++ b/hw
On 30.10.2012 09:32, Stefan Hajnoczi wrote:
On Mon, Oct 29, 2012 at 03:09:37PM +0100, Peter Lieven wrote:
Hi,
Bug subject should be virtio-blk, not virtio-scsi. virtio-scsi is a
different virtio device type from virtoi-blk and is not present in the
backtrace you posted.
you are right, sorry
Don't explode QEMUMachineInitArgs before passing it to
exynos4_boards_init_common().
Signed-off-by: Peter Maydell
---
hw/exynos4_boards.c | 32 +++-
1 file changed, 11 insertions(+), 21 deletions(-)
diff --git a/hw/exynos4_boards.c b/hw/exynos4_boards.c
Use LOG_UNIMP to report attempts to use the unimplemented test mode.
Signed-off-by: Peter Maydell
---
hw/pl190.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/pl190.c b/hw/pl190.c
index 213229b..4019930 100644
--- a/hw/pl190.c
+++ b/hw/pl190.c
@@ -199,7 +199,7
Ping?
(patchwork url http://patchwork.ozlabs.org/patch/193125/)
thanks
-- PMM
On 22 October 2012 13:54, Peter Maydell wrote:
> Recent kernels have moved to keeping the userspace headers
> in uapi/ subdirectories. This breaks the detection of whether an
> architecture has KVM suppo
Use LOG_GUEST_ERROR to report guest accesses to invalid register
offsets.
Signed-off-by: Peter Maydell
---
hw/pl110.c |6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/pl110.c b/hw/pl110.c
index 82486b0..d5472f4 100644
--- a/hw/pl110.c
+++ b/hw/pl110.c
@@ -349,7
Use LOG_GUEST_ERROR and LOG_UNIMP rather than hw_error() where
appropriate.
Signed-off-by: Peter Maydell
---
hw/armv7m_nvic.c | 31 +++
1 file changed, 19 insertions(+), 12 deletions(-)
diff --git a/hw/armv7m_nvic.c b/hw/armv7m_nvic.c
index 8d8d0a4..f0a2e7b 100644
Don't explode QEMUMachineInitArgs in every realview init
function; just pass it to the common realview_init() code
instead.
Signed-off-by: Peter Maydell
---
hw/realview.c | 68 -
1 file changed, 19 insertions(+), 49 deletions(-)
Use LOG_GUEST_ERROR to report bad guest accesses.
Signed-off-by: Peter Maydell
---
hw/arm_sysctl.c |8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/hw/arm_sysctl.c b/hw/arm_sysctl.c
index 26318e1..58eb982 100644
--- a/hw/arm_sysctl.c
+++ b/hw/arm_sysctl.c
@@ -184,7
riable now needs to be declared in
nvic_sysreg_read/write, the "void *opaque" parameter of
nvic_readl/writel is changed to "nvic_state *s".
Signed-off-by: Andre Beckus
Signed-off-by: Peter Maydell
---
hw/armv7m_nvic.c | 58 ++--
From: Peter Crosthwaite
This field is completely unused. The base address should also be abstracted
away from the device anyway. Removed.
Signed-off-by: Peter Crosthwaite
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
hw/pflash_cfi01.c |2 --
hw/pflash_cfi02.c |4
Use LOG_GUEST_ERROR to report guest accesses to bad offsets.
Signed-off-by: Peter Maydell
---
hw/arm_gic.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/hw/arm_gic.c b/hw/arm_gic.c
index ce16e83..f9e423f 100644
--- a/hw/arm_gic.c
+++ b/hw/arm_gic.c
@@ -324,7
Use LOG_GUEST_ERROR to report guest accesses to bad register
offsets, and LOG_UNIMP for access to the unimplemented
test registers.
Signed-off-by: Peter Maydell
---
hw/arm_timer.c | 19 +--
1 file changed, 13 insertions(+), 6 deletions(-)
diff --git a/hw/arm_timer.c b/hw
Don't explode QEMUMachineInitArgs before passing it to mainstone_init().
Signed-off-by: Peter Maydell
---
hw/mainstone.c | 21 +++--
1 file changed, 7 insertions(+), 14 deletions(-)
diff --git a/hw/mainstone.c b/hw/mainstone.c
index 3266946..5bbecb7 100644
---
Don't explode QEMUMachineInitArgs before passing it to n8x0_init().
Signed-off-by: Peter Maydell
---
hw/nseries.c | 39 +++
1 file changed, 11 insertions(+), 28 deletions(-)
diff --git a/hw/nseries.c b/hw/nseries.c
index 9306aa1..652d9da 100644
---
From: Peter Crosthwaite
This DPRINTF was throwing a warning due to a missing cast.
Signed-off-by: Peter Crosthwaite
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
hw/pflash_cfi01.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/pflash_cfi01.c b/hw
From: Peter Crosthwaite
This field is completely unused.
Signed-off-by: Peter Crosthwaite
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
hw/pflash_cfi01.c |2 --
1 file changed, 2 deletions(-)
diff --git a/hw/pflash_cfi01.c b/hw/pflash_cfi01.c
index 2e29f8a..b532054 100644
Don't explode QEMUMachineInitArgs before passing it to the
omap_sx1 common init function.
Signed-off-by: Peter Maydell
---
hw/omap_sx1.c | 36 +---
1 file changed, 9 insertions(+), 27 deletions(-)
diff --git a/hw/omap_sx1.c b/hw/omap_sx1.c
index eb
Use LOG_GUEST_ERROR and LOG_UNIMP in preference to hw_error().
Signed-off-by: Peter Maydell
---
hw/pl080.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/hw/pl080.c b/hw/pl080.c
index 6abe528..26150af 100644
--- a/hw/pl080.c
+++ b/hw/pl080.c
@@ -281,7 +281,8
Use LOG_GUEST_ERROR to report bad guest accesses.
Signed-off-by: Peter Maydell
---
hw/arm_l2x0.c |6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/arm_l2x0.c b/hw/arm_l2x0.c
index 8f5921c..6abf0ee 100644
--- a/hw/arm_l2x0.c
+++ b/hw/arm_l2x0.c
@@ -87,7 +87,8
Use LOG_GUEST_ERROR for reporting guest attempts to access invalid register
offsets.
Signed-off-by: Peter Maydell
---
hw/pl050.c |6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/pl050.c b/hw/pl050.c
index 470572e..47032f1 100644
--- a/hw/pl050.c
+++ b/hw/pl050.c
Use LOG_GUEST_ERROR to report bad guest accesses.
Signed-off-by: Peter Maydell
---
hw/versatile_i2c.c |6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/versatile_i2c.c b/hw/versatile_i2c.c
index 44e7e40..ad71e9d 100644
--- a/hw/versatile_i2c.c
+++ b/hw
nvic: Implement byte/halfword access for NVIC SCB_SHPRx
registers
Igor Mitsyanko (2):
hw/sd.c: Fix erase for high capacity cards
hw/sd.c: add SD card save/load support
Peter Crosthwaite (4):
pflash_cfi0x: remove unused base field
pflash_cfi01: remove unused total_len fiel
From: Igor Mitsyanko
This patch updates SD card model to support save/load of card's state.
Signed-off-by: Igor Mitsyanko
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
hw/sd.c | 89 +--
1 file changed, 64 inser
Add support for saving/loading bitmap.h bitmaps in vmstate.
Signed-off-by: Peter Maydell
Tested-by: Igor Mitsyanko
Reviewed-by: Juan Quintela
---
savevm.c | 41 +
vmstate.h | 13 +
2 files changed, 54 insertions(+)
diff --git a
ections to this
series, and ill rerun my test suite to confirm functionality for both
PCI and SYSBUS. Ill send as patches ontop of this series.
Thanks for helping out,
Regards,
Peter
No changes in ehci core should be needed.
>
> Comments?
>
> cheers,
> Gerd
>
> Gerd Ho
On Tue, Oct 30, 2012 at 7:51 PM, Avi Kivity wrote:
> On 10/29/2012 10:32 AM, Peter Maydell wrote:
>> On 29 October 2012 06:35, Peter Crosthwaite
>> wrote:
>>> Device model for Primecell PL330 dma controller.
>>
>> A general question -- this is a DMA con
On 30 October 2012 15:34, Jia Liu wrote:
> On Mon, Oct 29, 2012 at 9:40 PM, Jovanovic, Petar wrote:
>>> imm = (int16_t)(imm << 6) >> 6;
>>
>> result of a bitwise shift of a signed type and a negative vlaue is
>> implementation-defined, so you can not rely on that.
>>
>
> I think it will take a 10
On 29 October 2012 13:36, Jia Liu wrote:
> case OPC_REPL_PH:
> check_dsp(ctx);
> {
> imm = (ctx->opcode >> 16) & 0x03FF;
> imm = (int16_t)(imm << 6) >> 6;
> tcg_gen_movi_tl(cpu_gpr[ret], \
>
Add a section to HACKING describing the bits of implementation
defined C compiler behaviour which C code in QEMU is allowed
to rely on.
Signed-off-by: Peter Maydell
---
Since the issue just came up. Have I missed anything off the list?
HACKING | 16
1 file changed, 16
On 30.10.2012 09:32, Stefan Hajnoczi wrote:
On Mon, Oct 29, 2012 at 03:09:37PM +0100, Peter Lieven wrote:
Hi,
Bug subject should be virtio-blk, not virtio-scsi. virtio-scsi is a
different virtio device type from virtoi-blk and is not present in the
backtrace you posted.
Sounds pedantic but I
On 30 October 2012 16:40, malc wrote:
> On Tue, 30 Oct 2012, Peter Maydell wrote:
>
>> Add a section to HACKING describing the bits of implementation
>> defined C compiler behaviour which C code in QEMU is allowed
>> to rely on.
>
> People who will desperately do a
Am 30.10.2012 19:27, schrieb Stefan Hajnoczi:
On Tue, Oct 30, 2012 at 4:56 PM, Peter Lieven wrote:
On 30.10.2012 09:32, Stefan Hajnoczi wrote:
On Mon, Oct 29, 2012 at 03:09:37PM +0100, Peter Lieven wrote:
Hi,
Bug subject should be virtio-blk, not virtio-scsi. virtio-scsi is a
different
Am 30.10.2012 19:27, schrieb Stefan Hajnoczi:
On Tue, Oct 30, 2012 at 4:56 PM, Peter Lieven wrote:
On 30.10.2012 09:32, Stefan Hajnoczi wrote:
On Mon, Oct 29, 2012 at 03:09:37PM +0100, Peter Lieven wrote:
Hi,
Bug subject should be virtio-blk, not virtio-scsi. virtio-scsi is a
different
led? Then when developers make tree wide
changes they can at least compile test for breakages in debug printfs
using ./configure --extra-cflags="-DALL_DEBUG"? It would be fairly
trivial to implement.
Regards,
Peter
On Wed, Oct 31, 2012 at 1:22 PM, Andreas Färber wrote:
> Am 31.10.2012 04:10, schrieb Peter Crosthwaite:
>> So in a couple of cases now I have done work on mature device models
>> that include #ifdef'd debug printfery that is broken, and have
>> submitted (trivial) patch
On Mon, Jun 18, 2012 at 12:30 AM, Peter Maydell
wrote:
> On 17 June 2012 15:23, Andreas Färber wrote:
>> Am 17.06.2012 14:39, schrieb Peter Maydell:
>>> Hi. Due to a combination of the QEMU release freeze and my taking
>>> a nice long holiday, I have rather lost
My little arm-boot series which I think you reviewed just before you
left for holiday has been resent as well,
Regards,
Peter
On Sat, Jun 16, 2012 at 8:39 PM, Peter A. G. Crosthwaite
wrote:
> Interfaces and Object for some reason have seperate code paths for dynamic
> casting. AFAICT, Anthonys new interface specific cast is a functional superset
> of the object cast, so this patch renames the interface cast
include some common functions such
as halting and resuming etc? How hard is this to do in a generic (non
ARM) way?
Peter,
Can it be done is an ARM specific way? Is there a one line killer to
halt an ARM cpu that we could add the to ARMCPU API?
Regards,
Peter
at this patch as is, is going to do is introduce is a
duplicate -usb implementation which is a little messy (even if it is
only an intermediary state).
Regards,
Peter
> [...]
>
On 18 June 2012 10:13, Jan Kiszka wrote:
> On 2012-06-18 02:32, Andreas Färber wrote:
>> This will work technically but I still feel this is wrong semantically.
>> The pre-Paolo and current way is picking specific files from the hw/kvm/
>> directory. Your change above implies that in hw/kvm/ only
On 18 June 2012 11:42, Andreas Färber wrote:
> Am 18.06.2012 11:31, schrieb Peter Maydell:
>> (Does architecture-specific separation make much sense in general?
>> Not all devices are architecture-specific. I'd have thought that
>> a functional split eg timer/serial
On Mon, Jun 18, 2012 at 8:07 PM, Andreas Färber wrote:
> Hi Peter,
>
> Am 18.06.2012 09:22, schrieb Peter Crosthwaite:
>> Hi Andreas,
>>
>> For the Xilinx Zynq platform, we need to be able to halt a CPU from a
>> device (the zynq_slcr). E.G, if I write a 1 to a r
On 18 June 2012 12:35, Andreas Färber wrote:
> But the point is that hw/foo/ is required for the new Makefile system,
> so we have the empty folders anyway, whereas putting target-specific
> stuff into, e.g., hw/apic/ will not solve the dependency issue that I
> tracked down here.
Why should our
gn that's an interface type. That would fix the link problem you
> pointed out too. I'll spin a v2.
Please see my patch, I have a little 3 patch series up on the list.
that starts with your v1, does the axi-stream stuff then fixes that
bug.
Regards,
Peter
>
> Regards,
>
> Anthony Liguori
>
>>
>> ?
>>
>>> +
>>> +typedef struct HerbivoreClass
>>> +{
>>> + InterfaceClass parent;
>>> +
>>> + void (*feed_greens)(Herbivore *obj);
Hi,
I'm trying to upload my little endian Microblaze test vector to the
wiki, but the file upload restrictions are for images only and file
size < 2MB. Can we relax these so I can upload my test vectors?
Regards,
Peter
On Tue, Jun 19, 2012 at 12:33 AM, Igor Mitsyanko
wrote:
>
> Hi Peter, sorry for not properly reviewing your patch for such a long time,
> I'll try to do this as soon as possible. Right now I have a few small
> coments
>
>
>
> On 06/18/2012 04:42 AM, Peter A. G. Cr
On 19 June 2012 11:17, Andreas Färber wrote:
> Am 19.06.2012 08:40, schrieb Peter Crosthwaite:
>> On Tue, Jun 19, 2012 at 12:33 AM, Igor Mitsyanko
>>> And it still has no save/load support, it is really mandatory for all new
>>> devices. I can recall that one of the ma
On 19 June 2012 12:54, 陳韋任 (Wei-Ren Chen) wrote:
>> If you only have one CPU then using first_cpu->some_field1 should be
>> almost as easy. :)
>
> I am afraid first_cpu (CPUArchState) is got poisoned, too. :/
Yes. You'll need to write a function which lives in a source file which
has access to t
Andreas, will an attribute((destructor)) work ? Cos if it does you can put
your printf pretty much anwhere rather than vl.c
On Jun 19, 2012 9:54 PM, "陳韋任 (Wei-Ren Chen)"
wrote:
> > If you only have one CPU then using first_cpu->some_field1 should be
> > almost as easy. :)
>
> I am afraid first_c
On 18 June 2012 02:35, Peter A. G. Crosthwaite
wrote:
> If the user boots with a -dtb assume the Linux boot flow, even when handling
> an
> elf.
We don't do this for -initrd, why should we do it for -dtb ?
-- PMM
On 18 June 2012 02:35, Peter A. G. Crosthwaite
wrote:
> The DTB command line should only be overwritten if the user provides a command
> line with -apend. Otherwise whatever command line was in the DTB should stay
> unchanged.
>
> Signed-off-by: Peter A. G. Crosthwaite
> ---
From: Peter A. G. Crosthwaite
The DTB command line should only be overwritten if the user provides a command
line with -append. Otherwise whatever command line was in the DTB should stay
unchanged.
Signed-off-by: Peter A. G. Crosthwaite
Signed-off-by: Peter Maydell
---
hw/arm_boot.c | 10
ialize the end of "rxbuf".
Spotted by coverity.
Signed-off-by: Jim Meyering
Reviewed-by: Peter A.G. Crosthwaite
Signed-off-by: Peter Maydell
---
hw/cadence_gem.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/hw/cadence_gem.c b/hw/cadence_gem.c
index e2140ae..
GIC behaviour can be different between revision 1 and
2 of the architectural GIC specification; we also have
to handle the legacy 11MPCore GIC, which is different
again in some places. Introduce a qdev property so we
can behave appropriately.
Signed-off-by: Peter Maydell
---
hw/a15mpcore.c
From: Evgeny Voevodin
New IRQ gate consists of n_in input qdev gpio lines and one
output sysbus IRQ line. The output IRQ level is formed as OR
between all gpio inputs.
Signed-off-by: Evgeny Voevodin
Signed-off-by: Peter Maydell
---
hw/exynos4210.c | 32 +++--
hw
Implement the NVIC specific register areas using a set of
overlaid MemoryRegions in a container, rather than by having
the arm_gic read/write functions use special purpose callbacks.
Signed-off-by: Peter Maydell
---
hw/arm_gic.c | 33 ---
hw/armv7m_nvic.c | 74
Move the NVIC specific bits of reset to the NVIC's own
reset function, rather than using ifdefs in the common
arm_gic reset.
Signed-off-by: Peter Maydell
---
hw/arm_gic.c | 10 --
hw/armv7m_nvic.c |7 +++
2 files changed, 7 insertions(+), 10 deletions(-)
diff --git
Rearrange the GIC and NVIC so both are straightforward
subclasses of a common class, rather than having the NVIC
source file textually include arm_gic.c.
Signed-off-by: Peter Maydell
---
hw/arm/Makefile.objs |2 +-
hw/arm_gic.c | 241
From: Peter A. G. Crosthwaite
Change the timer clock frequency to 133MHz which is correct. the old 2.5MHz
value was for the pre-silicon emulation platform.
Signed-off-by: Peter A. G. Crosthwaite
Signed-off-by: Peter Maydell
---
hw/cadence_ttc.c |2 +-
1 files changed, 1 insertions(+), 1
IRQ: Introduce new IRQ gate functionality.
Jim Meyering (1):
cadence_gem: avoid stack-writing buffer-overrun
Peter A. G. Crosthwaite (2):
cadence_ttc: changed master clock frequency
arm_boot: Conditionalised DTB command line update
Peter Maydell (11):
hw/arm_gic: Remove N
Make the minor tweaks to interrupt numbering used by the NVIC
a runtime setting rather than a compile time one, so we can
drop more NVIC ifdefs.
Signed-off-by: Peter Maydell
---
hw/arm_gic.c | 12
1 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/hw/arm_gic.c b/hw
the save/load
struct for the NVIC requires a vmstate version bump.
Signed-off-by: Peter Maydell
Reviewed-by: Andreas Färber
---
hw/arm_gic.c | 15 +++
1 files changed, 3 insertions(+), 12 deletions(-)
diff --git a/hw/arm_gic.c b/hw/arm_gic.c
index 72298b4..17b2eba 100644
--- a/hw
Remove the MEM_VERBOSE tracing option from omap.h. This worked by
intercepting cpu_register_io_memory() calls; it has been broken
since cpu_register_io_memory() was removed in favour of the
MemoryRegion API.
Signed-off-by: Peter Maydell
---
hw/omap.h | 95
From: Andreas Färber
mimicing -> mimicking
thei -> the
Signed-off-by: Andreas Färber
Reviewed-by: Stefan Weil
Signed-off-by: Peter Maydell
---
hw/arm-misc.h |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/arm-misc.h b/hw/arm-misc.h
index 1d51570..1
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