Xianglai,
Thanks for your patch.
On 2024/2/28 下午2:55, Xianglai Li wrote:
The lddir and ldpte instruction emulation has
a problem with the use of large page processing above level 2.
The page size is not correctly calculated,
resulting in the wrong page size of the table entry found by tlb.
Cou
On 2024/3/5 上午12:53, Richard Henderson wrote:
On 3/3/24 16:18, Bibo Mao wrote:
@@ -696,11 +700,15 @@ void loongarch_cpu_dump_state(CPUState *cs, FILE
*f, int flags)
{
LoongArchCPU *cpu = LOONGARCH_CPU(cs);
CPULoongArchState *env = &cpu->env;
- int i;
+ int i, fp_status;
+
On 2024/3/5 下午11:45, Richard Henderson wrote:
On 3/4/24 20:26, Bibo Mao wrote:
+#ifdef CONFIG_TCG
static int loongarch_map_tlb_entry(CPULoongArchState *env, hwaddr
*physical,
int *prot, target_ulong address,
int acc
Sorry, manual is updated already and we do not notice that still.
https://www.loongson.cn/uploads/images/2023102309132647981.%E9%BE%99%E8%8A%AF%E6%9E%B6%E6%9E%84%E5%8F%82%E8%80%83%E6%89%8B%E5%86%8C%E5%8D%B7%E4%B8%80_r1p10.pdf
It is Chinese web link, English manual is not updated. Here is English
On 2024/2/6 下午5:20, Thomas Huth wrote:
On 06/02/2024 03.29, maobibo wrote:
Hi Philippe,
On 2024/2/5 下午8:58, Philippe Mathieu-Daudé wrote:
Hi Bibo,
On 5/2/24 03:13, Bibo Mao wrote:
The cdrom test skips to execute on LoongArch system with command
"make check", this patch enables
On 2024/2/21 上午12:47, Thomas Huth wrote:
On 20/02/2024 13.41, Bibo Mao wrote:
The minium memory size for LoongArch UEFI bios is 256M, also some
test cases such as migration and qos uses parameter 256M.
Here set minium memory size for Loongarch VirtMachine with 256M,
also default memory size
On 2024/2/22 上午5:24, Fabiano Rosas wrote:
Bibo Mao writes:
This patch adds migration test support for loongarch64. The test code
comes from aarch64 mostly, only that it it booted as bios in qemu since
kernel requires elf format and bios uses binary format.
In addition to providing the bina
With qemu is compiled with option "--target-list=loongarch64-softmmu
--disable-tcg", it passes to run with "make check" command.
Also gdb debug for LoongArch kvm support depends on this.
Tested-by: Bibo Mao
On 2024/1/25 下午2:14, Song Gao wrote:
The cc->sysemu_ops->get_phys_page_debug() is NUL
On 2024/2/4 上午9:54, Xianglai Li wrote:
The UEFI loading mode in loongarch is very different
from that in other architectures:loongarch's UEFI code
is in rom, while other architectures' UEFI code is in flash.
loongarch UEFI can be loaded as follows:
-machine virt,pflash=pflash0-format
-bios ./
On 2024/2/5 下午3:47, Thomas Huth wrote:
On 05/02/2024 03.13, Bibo Mao wrote:
The cdrom test skips to execute on LoongArch system with command
"make check"
Are you sure the test is marked with "skip"? ... it should at least test
with the "none" machine...?
With the latest code, cdrom testcas
Hi Philippe,
On 2024/2/5 下午8:58, Philippe Mathieu-Daudé wrote:
Hi Bibo,
On 5/2/24 03:13, Bibo Mao wrote:
The cdrom test skips to execute on LoongArch system with command
"make check", this patch enables cdrom test for LoongArch virt
machine platform.
With this patch, cdrom test passes to run
Hi Thomas,
On 2024/2/5 下午3:47, Thomas Huth wrote:
On 05/02/2024 03.13, Bibo Mao wrote:
The cdrom test skips to execute on LoongArch system with command
"make check"
Are you sure the test is marked with "skip"? ... it should at least test
with the "none" machine...?
I check again, cdrom tes
On 2024/3/8 上午12:48, Song Gao wrote:
Move some boot functions to boot.c and struct
loongarch_boot_info into struct LoongArchMachineState.
Signed-off-by: Song Gao
Message-Id: <20240301093839.663947-2-gaos...@loongson.cn>
---
hw/loongarch/boot.c | 128
On 2024/3/8 上午12:48, Song Gao wrote:
we load initrd ramdisk after kernel_high address
Signed-off-by: Song Gao
Message-Id: <20240301093839.663947-3-gaos...@loongson.cn>
---
hw/loongarch/boot.c | 29 -
1 file changed, 28 insertions(+), 1 deletion(-)
diff --git a
On 2024/3/8 上午12:48, Song Gao wrote:
Signed-off-by: Song Gao
Message-Id: <20240301093839.663947-4-gaos...@loongson.cn>
---
hw/loongarch/boot.c | 70 -
1 file changed, 69 insertions(+), 1 deletion(-)
diff --git a/hw/loongarch/boot.c b/hw/loongarc
On 2024/3/8 上午12:48, Song Gao wrote:
Add init_cmline and set boot_info->a0, a1
Signed-off-by: Song Gao
Message-Id: <20240301093839.663947-5-gaos...@loongson.cn>
---
hw/loongarch/boot.c | 19 +++
include/hw/loongarch/virt.h | 2 ++
target/loongarch/cpu.h | 2
On 2024/3/8 上午12:48, Song Gao wrote:
Add init_systab and set boot_info->a2
Signed-off-by: Song Gao
Message-Id: <20240301093839.663947-6-gaos...@loongson.cn>
---
hw/loongarch/boot.c | 22 +
include/hw/loongarch/boot.h | 48 +
2 f
On 2024/3/8 上午12:48, Song Gao wrote:
Signed-off-by: Song Gao
Message-Id: <20240301093839.663947-7-gaos...@loongson.cn>
---
hw/loongarch/boot.c | 39 +
hw/loongarch/virt.c | 11 ++-
include/hw/loongarch/boot.h | 27 +++
On 2024/3/8 上午12:48, Song Gao wrote:
Signed-off-by: Song Gao
Message-Id: <20240301093839.663947-8-gaos...@loongson.cn>
---
hw/loongarch/boot.c | 23 +--
include/hw/loongarch/boot.h | 9 +
2 files changed, 30 insertions(+), 2 deletions(-)
diff --git a/
On 2024/3/8 上午12:48, Song Gao wrote:
Signed-off-by: Song Gao
Message-Id: <20240301093839.663947-9-gaos...@loongson.cn>
---
hw/loongarch/boot.c | 11 +++
include/hw/loongarch/boot.h | 4
2 files changed, 15 insertions(+)
diff --git a/hw/loongarch/boot.c b/hw/loongarc
On 2024/3/8 上午12:48, Song Gao wrote:
The right fdt memory node like [1], not [2]
[1]
memory@0 {
device_type = "memory";
reg = <0x00 0x00 0x00 0x1000>;
};
[2]
memory@0 {
device_type = "memory";
On 2024/3/8 上午12:48, Song Gao wrote:
fdt adds cpu interrupt controller node,
we use 'loongson,cpu-interrupt-controller'.
See:
https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongarch-cpu.c
https://lore.kernel.org/r/20221114113824.1880-2-liupei...@loongson.cn
Signed-off-by: S
On 2024/3/8 上午12:48, Song Gao wrote:
fdt adds Extend I/O Interrupt Controller,
we use 'loongson,ls2k2000-eiointc'.
See:
https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongson-eiointc.c
https://lore.kernel.org/r/764e02d924094580ac0f1d15535f4b98308705c6.1683279769.git.zhoubin.
On 2024/3/8 上午12:48, Song Gao wrote:
fdt adds pch pic controller, we use 'loongson,pch-pic-1.0'
See:
https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongson-pch-pic.c
https://lore.kernel.org/r/20200528152757.1028711-4-jiaxun.y...@flygoat.com
Signed-off-by: Song Gao
Message-
On 2024/3/8 上午12:48, Song Gao wrote:
fdt adds pch msi controller, we use 'loongson,pch-msi-1.0'.
See:
https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongson-pch-msi.c
https://lore.kernel.org/r/20200528152757.1028711-6-jiaxun.y...@flygoat.com
Signed-off-by: Song Gao
Message
On 2024/3/8 上午12:48, Song Gao wrote:
Signed-off-by: Song Gao
Message-Id: <20240301093839.663947-16-gaos...@loongson.cn>
---
hw/loongarch/virt.c | 31 +--
1 file changed, 1 insertion(+), 30 deletions(-)
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
inde
On 2024/3/8 上午12:48, Song Gao wrote:
Signed-off-by: Song Gao
Message-Id: <20240301093839.663947-15-gaos...@loongson.cn>
---
hw/loongarch/virt.c | 73 ++---
1 file changed, 69 insertions(+), 4 deletions(-)
diff --git a/hw/loongarch/virt.c b/hw/loonga
On 2024/3/8 上午12:48, Song Gao wrote:
uart node need interrupts and interrupt-parent cells.
Signed-off-by: Song Gao
Message-Id: <20240301093839.663947-17-gaos...@loongson.cn>
---
hw/loongarch/virt.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/hw/loongarch/v
On 2024/3/8 上午12:48, Song Gao wrote:
rtc node need interrupts and interrupt-parent cells.
Signed-off-by: Song Gao
Message-Id: <20240301093839.663947-18-gaos...@loongson.cn>
---
hw/loongarch/virt.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/hw/loongarc
On 2024/3/8 下午5:36, gaosong wrote:
在 2024/3/8 16:27, maobibo 写道:
On 2024/3/8 上午12:48, Song Gao wrote:
Signed-off-by: Song Gao
Message-Id: <20240301093839.663947-4-gaos...@loongson.cn>
---
hw/loongarch/boot.c | 70 -
1 file chang
On 2024/3/11 下午2:50, maobibo wrote:
On 2024/3/8 下午5:36, gaosong wrote:
在 2024/3/8 16:27, maobibo 写道:
On 2024/3/8 上午12:48, Song Gao wrote:
Signed-off-by: Song Gao
Message-Id: <20240301093839.663947-4-gaos...@loongson.cn>
---
hw/loongarch/boot.
On 2024/4/26 下午5:15, Song Gao wrote:
Message text is missing here :(
Signed-off-by: Song Gao
Message-Id: <20240307164835.300412-4-gaos...@loongson.cn>
It is strange that there is "Message-Id:" string. Is it required here?
The others look good to me, especially when bootrom for AP is put a
On 2024/4/26 下午5:15, Song Gao wrote:
Message test is also missing there :(
Signed-off-by: Song Gao
Message-Id: <20240307164835.300412-7-gaos...@loongson.cn>
---
include/hw/loongarch/boot.h | 27 +
include/hw/loongarch/virt.h | 10 ++
hw/loongarch/boot.c
Sure, I will rebase and send the new version.
Regards
Bibo Mao
On 2024/4/30 下午4:15, gaosong wrote:
Hi,
在 2024/3/18 下午4:01, Bibo Mao 写道:
One LoongArch virt machine platform, there is limitation for memory
map information. The minimum memory size is 256M and minimum memory
size for numa node0 i
On 2024/5/6 下午12:24, Thomas Huth wrote:
On 06/05/2024 05.02, Bibo Mao wrote:
On LoongArch system, there is only virt machine type now, name
LOONGARCH_MACHINE is confused, rename it with VIRT_MACHINE. Machine name
about Other real hw boards can be added in future.
Signed-off-by: Bibo Mao
---
On 2024/5/6 下午2:09, maobibo wrote:
On 2024/5/6 下午12:24, Thomas Huth wrote:
On 06/05/2024 05.02, Bibo Mao wrote:
On LoongArch system, there is only virt machine type now, name
LOONGARCH_MACHINE is confused, rename it with VIRT_MACHINE. Machine name
about Other real hw boards can be added
On 2024/5/7 下午2:10, Thomas Huth wrote:
On 07/05/2024 03.18, maobibo wrote:
On 2024/5/6 下午2:09, maobibo wrote:
On 2024/5/6 下午12:24, Thomas Huth wrote:
On 06/05/2024 05.02, Bibo Mao wrote:
On LoongArch system, there is only virt machine type now, name
LOONGARCH_MACHINE is confused
On 2024/5/8 下午5:00, Thomas Huth wrote:
On 08/05/2024 10.55, Bibo Mao wrote:
Add boot-serial-test test case support on LoongArch system.
... and also the filter tests?
yes, it is :) Will update changelog in next version.
Signed-off-by: Bibo Mao
---
tests/qtest/boot-serial-test.c | 10
Xuerui,
Thanks for your mail, it is a good suggestion. Now we are planing to move
LoongArch uefi bios from edk2-platform to edk2 repo, so that uefi bios
supporting LoongArch can be auto compiled and uploaded to qemu repo. Only that
process is somwhat slow since lacking of hands, however we are
On 2023/3/31 20:12, Gerd Hoffmann wrote:
On Fri, Mar 31, 2023 at 08:54:16AM +0800, maobibo wrote:
Xuerui,
Thanks for your mail, it is a good suggestion. Now we are planing to
move LoongArch uefi bios from edk2-platform to edk2 repo, so that uefi
bios supporting LoongArch can be auto
the loongarch firmware gcc
> throws errors:
>
> loongarch64-linux-gnu-gcc: error: unrecognized command-line option
> ‘-mno-explicit-reloc
what is your option about this issue?
Regards
Bibo, Mao
在 2023/4/1 13:11, maobibo 写道:
>
>
> On 2023/3/31 20:12, Gerd Hoffmann wrote:
>>
在 2022/6/24 07:34, Richard Henderson 写道:
> On 6/23/22 01:55, Song Gao wrote:
>> +static void setup_sigcontext(CPULoongArchState *env,
>> + struct target_sigcontext *sc,
>> + struct extctx_layout *extctx)
>> +{
>> + int i;
>> +
>> + if
在 2022/6/24 08:45, maobibo 写道:
>
>
> 在 2022/6/24 07:34, Richard Henderson 写道:
>> On 6/23/22 01:55, Song Gao wrote:
>>> +static void setup_sigcontext(CPULoongArchState *env,
>>> + struct target_sigcontext *sc,
>>> +
Hi Philippe,
In file include/hw/pci/pci.h, the macro QEMU_PCI_VGA_MEM_BASE is defined as
0xa, which represents legacy VGA memory base address. I want to know
whether it should be the same for all architectures, or does this vga mmio
space exist on arm64/riscv physical machines with pci
在 2022/6/28 16:21, Richard Henderson 写道:
> On 6/28/22 12:12, maobibo wrote:
>> Hi Philippe,
>>
>> In file include/hw/pci/pci.h, the macro QEMU_PCI_VGA_MEM_BASE is
>> defined as 0xa, which represents legacy VGA memory base address. I want
>> to know
Add to peter.mayd...@linaro.org
在 2022/7/1 11:07, Mao Bibo 写道:
> Loongarch pch msi intc connects to extioi controller, the range of irq number
> is 64-255. Here adds irqbase property for loongarch pch msi controller, we can
> get irq offset from view of pch_msi controller with the method:
> msi
Hi gaosong,
I reply inline
在 2023/5/18 17:06, Song Gao 写道:
> 1. Implement some functions for LoongArch numa support;
> 2. Implement fdt_add_memory_node() for fdt;
> 3. build_srat() fills node_id and adds build numa memory.
>
> Base-on:
> https://patchew.org/QEMU/20230518014115.117869-1-gaos...@l
在 2023/5/18 17:06, Song Gao 写道:
> 1. Implement some functions for LoongArch numa support;
> 2. Implement fdt_add_memory_node() for fdt;
> 3. build_srat() fills node_id and adds build numa memory.
>
> Base-on:
> https://patchew.org/QEMU/20230518014115.117869-1-gaos...@loongson.cn/
>
> Signed-of
在 2022/5/10 02:25, Richard Henderson 写道:
> On 5/9/22 13:04, Peter Maydell wrote:
>> On Mon, 9 May 2022 at 18:56, Richard Henderson
>> wrote:
>>> I'm not 100% sure how this "Other configuration control register" should be
>>> handled, but
>>> definitely not like this.
>>>
>>> I see you're putti
在 2022/5/10 10:54, maobibo 写道:
>
>
> 在 2022/5/10 02:25, Richard Henderson 写道:
>> On 5/9/22 13:04, Peter Maydell wrote:
>>> On Mon, 9 May 2022 at 18:56, Richard Henderson
>>> wrote:
>>>> I'm not 100% sure how this "Other confi
在 2022/5/10 11:56, Richard Henderson 写道:
> On 5/9/22 19:54, maobibo wrote:
>> how about put address_space_iocsr as board rather than percpu since there is
>> no concept
>> of "cpu package".
>
> "cpu package" works ok as a device on the board.
在 2022/5/11 22:14, Richard Henderson 写道:
> On 5/11/22 02:54, yangxiaojuan wrote:
>>
>> On 2022/5/10 上午1:56, Richard Henderson wrote:
>>>
>> + case EXTIOI_IPMAP_START ... EXTIOI_IPMAP_END - 1:
>> + index = (offset - EXTIOI_IPMAP_START) >> 2;
>> + s->ipmap[index] = val
On 12/23/2021 06:52 PM, Mark Cave-Ayland wrote:
> On 22/12/2021 08:26, yangxiaojuan wrote:
>
>> Hi, Mark
>>
>> On 12/18/2021 06:02 PM, Mark Cave-Ayland wrote:
>>> On 04/12/2021 12:07, Xiaojuan Yang wrote:
>>>
1.Add uart,virtio-net,vga and usb for 3A5000.
2.Add irq set and map for the
QEMU64 cpu model can be added, however la464 cpu model should be kept here
still. Actually there is no formal micro-achitecture name for loongarch, I
prefer to la464 still :)
Also host cpu model can be added later, which has the same features with
host processor. What is meaning for QEMU64/KVM64 c
在 2022/8/18 10:31, WANG Xuerui 写道:
> On 2022/8/17 21:26, Richard Henderson wrote:
>> On 8/17/22 04:10, WANG Xuerui wrote:
>>> From my own experiences, different use cases care about different aspects
>>> of the CPU, and that IMO is an argument in favor of providing both
>>> (high-fidelity mod
在 2022/11/6 22:39, Sunil V L 写道:
> The pflash implementation currently assumes fixed size of the
> backend storage. Due to this, the backend storage file needs to be
> exactly of size 32M. Otherwise, there will be an error like below.
>
> "device requires 33554432 bytes, block backend provides
Xiaojuan,
can you modify the tile like "Load FDT table into dram memory space"
rather than "change base addr to 2MiB" ?
regards
bibo,mao
在 2022/10/21 11:54, Xiaojuan Yang 写道:
> Change FDT base addr to 2 MiB in lowmem region. Since lowmem
> region starts from 0, FDT base address is located at 2 M
Tianrui,
We should solve all the issues in the previous mailing list,
and send the next version.
https://patchwork.kernel.org/project/qemu-devel/patch/20221215065011.2133471-2-zhaotian...@loongson.cn/
We should not be in such hurry:)
regards
bibo,mao
在 2022/12/23 16:08, Tianrui Zhao 写
On 2024/6/5 上午10:15, Jiaxun Yang wrote:
It was missed out in previous commit.
Fixes: b4a12dfc2132 ("hw/intc/loongarch_ipi: Rename as loongson_ipi")
Signed-off-by: Jiaxun Yang
---
hw/intc/loongarch_ipi.c | 347
1 file changed, 347 deletions(
On 2024/6/26 下午3:40, Jiaxun Yang wrote:
在2024年6月26日六月 上午5:11，maobibo写道：
[...]
It is different with existing implementation.
What do you mean? Isn't this the actual hardware behaviour?
With hw/intc/loongson_ipi.c, every vcpu has one ipi_mmio_mem, however on
loongarch ipi machine,
Hi Philippe,
On 2024/6/27 下午9:02, Philippe Mathieu-Daudé wrote:
On 27/6/24 04:44, gaosong wrote:
在 2024/6/26 下午8:10, Philippe Mathieu-Daudé 写道:
Hi Bibo,
On 26/6/24 06:11, maobibo wrote:
On 2024/6/5 上午10:15, Jiaxun Yang wrote:
It was missed out in previous commit.
Fixes: b4a12dfc2132
com>
Signed-off-by: Philippe Mathieu-Daudé
Regards
Bibo Mao
On 2024/7/1 上午9:35, maobibo wrote:
Hi Philippe,
On 2024/6/27 下午9:02, Philippe Mathieu-Daudé wrote:
On 27/6/24 04:44, gaosong wrote:
在 2024/6/26 下午8:10, Philippe Mathieu-Daudé 写道:
Hi Bibo,
On 26/6/24 06:11, maobibo wrote:
On 2024/7/1 下午3:01, Jiaxun Yang wrote:
在2024年7月1日七月 上午7:44，maobibo写道：
Also this patch is problematic on LoongArch.
The original patch is to search physical cpuid rather than logic cpuid.
We want to make ipi module better and better, however now it comes back
to initial state at the
On 2024/7/1 下午3:08, Jiaxun Yang wrote:
在2024年7月1日七月 上午2:35，maobibo写道：
[...]
How about split loongson_ipi.c into
loongson_ipi_base.c/loongson_ipi_loongson.c/loongson_ipi_loongarch.c,
File loongson_ipi_base.c contains the common code, loongson_ipi_xxx.c
contains arch specific. Soon we will
On 2024/7/1 下午2:57, Jiaxun Yang wrote:
在2024年5月30日五月 上午7:49，Bibo Mao写道：
Loongson Binary Translation (LBT) is used to accelerate binary
translation, which contains 4 scratch registers (scr0 to scr3), x86/ARM
eflags (eflags) and x87 fpu stack pointer (ftop).
Now LBT feature is added in kvm m
On 2024/7/1 下午4:29, Jiaxun Yang wrote:
在2024年7月1日七月 上午8:22，maobibo写道：
On 2024/7/1 下午3:01, Jiaxun Yang wrote:
在2024年7月1日七月 上午7:44，maobibo写道：
Also this patch is problematic on LoongArch.
The original patch is to search physical cpuid rather than logic cpuid.
We want to make ipi module
On 2024/7/1 下午4:42, Jiaxun Yang wrote:
在2024年7月1日七月 上午8:32，maobibo写道：
[...]
+static void loongarch_cpu_check_lbt(CPUState *cs, Error **errp)
+{
+CPULoongArchState *env = cpu_env(cs);
+LoongArchCPU *cpu = LOONGARCH_CPU(cs);
+bool kvm_supported;
+
+kvm_supported
On 2024/7/3 下午2:16, Jiaxun Yang wrote:
在2024年7月3日七月 上午10:12，Bibo Mao写道：
Loongson ipi common class and instance is created here, it comes
from file loongson_ipi mostly. For the new added loongson ipi
common class, there is four interfaces defined here:
1. Interfaces pre_save/post_load are
On 2024/7/3 下午3:33, Jiaxun Yang wrote:
在2024年7月3日七月 下午2:40，maobibo写道：
[...]
Hi Bobo,
MMIO is loongson ipi specific, it is not necessary to put into common
function. Functions loongson_ipi_core_readl/loongson_ipi_core_writel can
be exported in header file include/hw/intc
On 2024/7/3 下午5:43, Huacai Chen wrote:
On Wed, Jul 3, 2024 at 3:51 PM Jiaxun Yang wrote:
在2024年7月1日七月 下午2:57，Jiaxun Yang写道：
在2024年5月30日五月 上午7:49，Bibo Mao写道：
Loongson Binary Translation (LBT) is used to accelerate binary
translation, which contains 4 scratch registers (scr0 to scr3), x86
Philippe,
I checkout the latest code, it works well.
Thanks for your efforts.
Regards
Bibo Mao
On 2024/8/6 下午8:51, Philippe Mathieu-Daudé wrote:
From: Bibo Mao
We'll have to add LoongsonIPIClass in few commits,
so rename LoongsonIPI as LoongsonIPIState for clarity.
Signed-off-by: Bibo Mao
On 2024/8/21 上午2:42, Jiaxun Yang wrote:
The size of lowram should be "gap" instead of the whole node.
This is failing kernel's sanity check:
[0.00] ACPI: SRAT: Node 0 PXM 0 [mem 0x-0x]
[0.00] ACPI: SRAT: Node 0 PXM 0 [mem 0x8000-0x16fff]
[0.00]
Hi Philippe,
Thanks for reviewing my patch.
I reply inline.
On 2024/5/27 下午6:37, Philippe Mathieu-Daudé wrote:
Hi Bibo,
On 27/5/24 10:35, Bibo Mao wrote:
Loongson Binary Translation (LBT) is used to accelerate binary
translation, which contains 4 scratch registers (scr0 to scr3), x86/ARM
efla
On 2024/5/27 下午6:39, Philippe Mathieu-Daudé wrote:
Hi Bibo,
On 27/5/24 10:34, Bibo Mao wrote:
Loongson Binary Translation (LBT) is used to accelerate binary
translation. LBT feature is added in kvm mode, not supported in TCG
mode since it is not emulated. And only LBT feature is added here,
Thomas,
Thanks for reviewing the patch.
On 2024/5/29 下午3:10, Thomas Huth wrote:
On 28/05/2024 10.20, Bibo Mao wrote:
Add loongarch virt machine to the graph. It is a modified copy of
the existing riscv virtmachine in riscv-virt-machine.c
It contains a generic-pcihost controller, and an extra
On 2024/5/28 下午8:56, gaosong wrote:
在 2024/5/28 上午9:07, maobibo 写道:
Hi Philippe,
Thanks for reviewing my patch.
I reply inline.
On 2024/5/27 下午6:37, Philippe Mathieu-Daudé wrote:
Hi Bibo,
On 27/5/24 10:35, Bibo Mao wrote:
Loongson Binary Translation (LBT) is used to accelerate binary
On 2024/5/28 下午4:38, Song Gao wrote:
Use MemTxAttrs interface read_with_attrs/write_with_attrs
for virt_iocsr_misc_ops.
Signed-off-by: Song Gao
---
hw/loongarch/virt.c | 36
1 file changed, 24 insertions(+), 12 deletions(-)
diff --git a/hw/loongarch/v
On 2024/5/28 下午4:38, Song Gao wrote:
This patch adds a new board attribute 'v-eiointc'.
A value of true enables the virt extended I/O interrupt controller.
VMs working in kvm mode have 'v-eiointc' enabled by default.
Signed-off-by: Song Gao
---
include/hw/loongarch/virt.h | 1 +
target/l
On 2024/6/5 下午7:53, Philippe Mathieu-Daudé wrote:
On 5/6/24 11:32, Bibo Mao wrote:
Lasx is 256bit vector FPU capability, lsx is 128bit vector VFP. lsx
is added already, lasx is added here.
Signed-off-by: Bibo Mao
---
host/include/loongarch64/host/cpuinfo.h | 1 +
util/cpuinfo-loongarch.c
On 2024/6/6 上午7:51, Richard Henderson wrote:
On 6/5/24 02:32, Bibo Mao wrote:
Different gcc versions have different features, macro CONFIG_LSX_OPT
and CONFIG_LASX_OPT is added here to detect whether gcc supports
built-in lsx/lasx macro.
Function buffer_zero_lsx() is added for 128bit simd fpu
On 2024/6/6 上午11:27, Richard Henderson wrote:
On 6/5/24 20:18, Richard Henderson wrote:
On 6/5/24 19:30, maobibo wrote:
On 2024/6/6 上午7:51, Richard Henderson wrote:
On 6/5/24 02:32, Bibo Mao wrote:
Different gcc versions have different features, macro CONFIG_LSX_OPT
and CONFIG_LASX_OPT
On 2024/6/6 上午11:42, Richard Henderson wrote:
On 6/5/24 20:36, maobibo wrote:
static biz_accel_fn const accel_table[] = {
buffer_is_zero_int_ge256,
#ifdef __loongarch_sx
buffer_is_zero_lsx,
#endif
#ifdef __loongarch_asx
buffer_is_zero_lasx,
#endif
};
static unsigned
On 2024/1/16 上午10:25, Song Gao wrote:
With hardware extioi, irq can be routed to four vcpus with hardware
extioi. This patch adds virt extension support, sot that irq can
be routed to 256 vcpus.
Signed-off-by: Song Gao
---
include/hw/intc/loongarch_extioi.h | 24 +-
include/hw/loonga
On 2024/1/22 下午2:09, Song Gao wrote:
The kernel had already support LSX and LASX [1],
but QEMU is disable LSX/LASX for kvm. This patch adds
kvm_check_cpucfg to check CPUCFG2.
[1]:
https://lore.kernel.org/all/cabgobfzhrf7e_7jk4uprmsyxty3eiuuywhc35jqncnl9s-z...@mail.gmail.com/
Signed-off-by:
On 2024/1/22 下午5:02, Song Gao wrote:
The kernel had already support LSX and LASX [1],
but QEMU is disable LSX/LASX for kvm. This patch adds
kvm_check_cpucfg2() to check CPUCFG2.
[1]:
https://lore.kernel.org/all/cabgobfzhrf7e_7jk4uprmsyxty3eiuuywhc35jqncnl9s-z...@mail.gmail.com/
Signed-off-b
On 2024/5/14 下午5:46, Song Gao wrote:
This patch adds PMU support, We just sets some cpucfg6 default value
to PMU config on kvm mode, and then check the PMU config with kvm ioctl
KVM_GET_DEVICE_ATTR.
e.g
'... -cpu max,pmu=on,pmnum=[1-16]';
'... -cpu max,pmu=on' (default pmnum = 4
Reviewed-by: Bibo Mao
On 2024/5/14 下午7:07, Song Gao wrote:
On kvm side, get_fpu/set_fpu save the vreg registers high 192bits,
but QEMU missing.
Signed-off-by: Song Gao
---
target/loongarch/kvm/kvm.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target/loongarch/kvm/kvm.c b/targ
On 2024/5/15 下午5:01, gaosong wrote:
在 2024/5/14 下午7:51, Bibo Mao 写道:
Add loongarch virt machine to the graph. It is a modified copy of
the existing riscv virtmachine in riscv-virt-machine.c
It contains a generic-pcihost controller, and an extra function
loongarch_config_qpci_bus() to configu
On 2024/5/14 下午5:07, Song Gao wrote:
On LoongArch, IRQs can be routed to four vcpus with hardware extioi.
This patch adds the extioi virt extension definition so that the IRQ can
route to 256 vcpus.
Signed-off-by: Song Gao
---
include/hw/intc/loongarch_extioi.h | 21 +++
hw/intc/loong
On 2024/5/14 下午5:07, Song Gao wrote:
This patch adds a new board attribute 'v-eiointc'.
A value of true enables the virt extended I/O interrupt controller.
VMs working in kvm mode have 'v-eiointc' enabled by default.
Signed-off-by: Song Gao
---
include/hw/loongarch/virt.h | 2 +
target/
On 2024/5/21 下午8:32, Song Gao wrote:
On LoongArch, IRQs can be routed to four vcpus with hardware extioi.
This patch adds the extioi virt extension definition so that the IRQ can
route to 256 vcpus.
Signed-off-by: Song Gao
---
include/hw/intc/loongarch_extioi.h | 21 +++
hw/intc/loonga
On 2024/5/21 下午8:32, Song Gao wrote:
Use MemTxAttrs interface read_with_attrs/write_with_attrs
for virt_iocsr_misc_ops.
Signed-off-by: Song Gao
---
hw/loongarch/virt.c | 26 --
1 file changed, 16 insertions(+), 10 deletions(-)
diff --git a/hw/loongarch/virt.c b/hw
Song will online next week.
Please correct me if there is something wrong, song.
On 2024/5/24 上午7:50, Jiaxun Yang wrote:
在2024年5月21日五月 下午1:32，Song Gao写道：
On LoongArch, IRQs can be routed to four vcpus with hardware extioi.
This patch adds the extioi virt extension support so that the IRQ ca
On 2024/6/7 上午8:24, Richard Henderson wrote:
Use inline assembly because no release compiler allows
per-function selection of the ISA.
Signed-off-by: Richard Henderson
---
.../loongarch64/host/bufferiszero.c.inc | 143 ++
1 file changed, 143 insertions(+)
create mo
On 2024/6/7 下午10:31, Peter Maydell wrote:
On Thu, 23 May 2024 at 02:48, Song Gao wrote:
From: Bibo Mao
Memory map table for fwcfg is used for UEFI BIOS, UEFI BIOS uses the first
entry from fwcfg memory map as the first memory HOB, the second memory HOB
will be used if the first memory HOB
It is interesting.
How to wakeup VM if it sleeps in S3/S4, from emulated keyboard or
ethernet magic packet or qemu monitor command in background?
Regards
Bibo Mao
On 2024/6/14 上午1:30, Jiaxun Yang wrote:
Hi all,
This series implemented S3 and S4 sleep for loongarch virt machine
and microv
On 2024/6/14 下午12:27, Jiaxun Yang wrote:
在2024年6月14日六月 上午4:32，maobibo写道：
It is interesting.
How to wakeup VM if it sleeps in S3/S4, from emulated keyboard or
ethernet magic packet or qemu monitor command in background?
Hi Bibo,
The best way to wake the guest is system_wakeup command in
On 2024/6/14 下午10:03, Daniel P. Berrangé wrote:
On Fri, Jun 14, 2024 at 01:17:39PM +0800, maobibo wrote:
On 2024/6/14 下午12:27, Jiaxun Yang wrote:
在2024年6月14日六月 上午4:32，maobibo写道：
It is interesting.
How to wakeup VM if it sleeps in S3/S4, from emulated keyboard or
ethernet magic packet
/linux_larch/vmlinux -initrd ramdisk -append "root=/dev/ram
rdinit=/sbin/init console=ttyS0,115200" --nographic
Regards
Bibo Mao
On 2024/9/5 上午11:12, Jason A. Donenfeld wrote:
On Tue, Oct 10, 2023 at 09:12:46AM +0800, maobibo wrote:
Thomas,
Thanks for reporting this issue.
It is the probl
On 2024/9/5 下午1:25, Thomas Weißschuh wrote:
On 2024-09-05 06:04:12+, Jason A. Donenfeld wrote:
On Thu, Sep 5, 2024 at 5:45 AM maobibo wrote:
Jason,
With the latest qemu 9.1 version, elf format booting is supported.
Thanks, I just figured this out too, about 4 minutes ago. Excellent
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