From: Helge Deller
When calculating the IOR for the exception handlers, the current
unwind_breg value is needed on 64-bit hppa machines.
Restore that value by calling cpu_restore_state() earlier, which in turn
calls hppa_restore_state_to_opc() which restores the unwind_breg for the
current
c: Charlie Jenkins
Cc: Helge Deller
Signed-off-by: Guenter Roeck
Reviewed-by: Richard Henderson
---
target/hppa/helper.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/target/hppa/helper.c b/target/hppa/helper.c
index 859644c47a..7b798d1227 100644
--- a/target/hpp
From: Helge Deller
Add the missing 64-bit hppa firmware blob so that it gets installed.
Signed-off-by: Helge Deller
Fixes: 7c0dfcf9395e ("target/hppa: Update SeaBIOS-hppa to version 16")
---
pc-bios/meson.build | 1 +
1 file changed, 1 insertion(+)
diff --git a/pc-bios/meson.build
From: Helge Deller
Signed-off-by: Helge Deller
---
pc-bios/README | 6 ++
1 file changed, 6 insertions(+)
diff --git a/pc-bios/README b/pc-bios/README
index b8a0210d24..6ffc46006e 100644
--- a/pc-bios/README
+++ b/pc-bios/README
@@ -75,3 +75,9 @@
initialize and run boot images stored
From: Helge Deller
Signed-off-by: Helge Deller
Suggested-by: Michael Tokarev
---
roms/Makefile | 7 +++
1 file changed, 7 insertions(+)
diff --git a/roms/Makefile b/roms/Makefile
index 67f709ba2d..8e5d8d26a9 100644
--- a/roms/Makefile
+++ b/roms/Makefile
@@ -68,6 +68,7 @@ default help
From: Helge Deller
Some fixes for the hppa64 target.
Add references to SeaBIOS-hppa and hppa-firmware into
pc-bios/README file and add rom make targets.
Patches 2-5 need review.
Guenter Roeck (1):
target/hppa: Fix unaligned double word accesses for hppa64
Helge Deller (4):
target/hppa
t when storing psw to solve the problem unconditionally.
Fixes: 931adff31478 ("target/hppa: Update cpu_hppa_get/put_psw for hppa64")
Cc: Richard Henderson
Cc: Charlie Jenkins
Cc: Helge Deller
Reviewed-by: Richard Henderson
Signed-off-by: Guenter Roeck
Signed-off-by: Helge Deller
From: Helge Deller
Signed-off-by: Helge Deller
Suggested-by: Michael Tokarev
Reviewed-by: Richard Henderson
---
roms/Makefile | 7 +++
1 file changed, 7 insertions(+)
diff --git a/roms/Makefile b/roms/Makefile
index 67f709ba2d..8e5d8d26a9 100644
--- a/roms/Makefile
+++ b/roms/Makefile
From: Helge Deller
Signed-off-by: Helge Deller
Reviewed-by: Richard Henderson
---
pc-bios/README | 6 ++
1 file changed, 6 insertions(+)
diff --git a/pc-bios/README b/pc-bios/README
index b8a0210d24..7ffb2f43a4 100644
--- a/pc-bios/README
+++ b/pc-bios/README
@@ -75,3 +75,9
From: Helge Deller
The following changes since commit e1007b6bab5cf97705bf4f2aaec1f607787355b8:
Merge tag 'pull-request-2024-03-01' of https://gitlab.com/thuth/qemu into
staging (2024-03-01 10:14:32 +)
are available in the Git repository at:
https://github.com/hdeller/qem
From: Helge Deller
Add the missing 64-bit hppa firmware blob so that it gets installed.
Signed-off-by: Helge Deller
Fixes: 7c0dfcf9395e ("target/hppa: Update SeaBIOS-hppa to version 16")
Reviewed-by: Richard Henderson
---
pc-bios/meson.build | 1 +
1 file changed, 1 insertion(+)
From: Helge Deller
When calculating the IOR for the exception handlers, the current
unwind_breg value is needed on 64-bit hppa machines.
Restore that value by calling cpu_restore_state() earlier, which in turn
calls hppa_restore_state_to_opc() which restores the unwind_breg for the
current
From: Helge Deller
Load the 64-bit SeaBIOS-hppa firmware by default when running on a 64-bit
machine. This will enable us to later support more than 4GB of RAM and is
required that the OS (or PALO bootloader) will start or install a 64-bit kernel
instead of a 32-bit kernel.
Note that SeaBIOS
From: Helge Deller
The Astro/Elroy chip can work in either Hard-Fail or Soft-Fail mode.
Hard fail means the system bus will send an HPMC (=crash) to the
processor, soft fail means the system bus will ignore timeouts of
MMIO-reads or MMIO-writes and return -1ULL.
The HF mode is controlled by a
From: Helge Deller
The BTLB helper function stores the BTLB info (four 32-bit ints) into
the memory of the guest. They are only available when emulating a 32-bit
CPU in the guest, so use "uint32_t" instead of "target_ulong" here.
Signed-off-by: Helge Deller
---
target/h
From: Helge Deller
Firmware and qemu reads and writes the MAC address for the LASI LAN via
registers in LASI. Allow those accesses and return zero even if LASI
LAN isn't enabled to avoid HPMCs (=crashes).
Signed-off-by: Helge Deller
---
hw/misc/lasi.c | 2 ++
1 file changed, 2 inser
From: Helge Deller
Add disassembly of opcodes for "HALT QEMU", "RESET QEMU" and
"RESTORE SHR" (restore shadow registers).
Signed-off-by: Helge Deller
---
disas/hppa.c | 4
1 file changed, 4 insertions(+)
diff --git a/disas/hppa.c b/disas/hppa.c
index cce4f
From: Helge Deller
For debugging purposes at the early stage of the bootup process,
the SeaBIOS-hppa firmware sometimes needs to output characters to the
serial console. Note that the serial console is the default output
method for parisc machines.
At this stage PCI busses and other devices
From: Helge Deller
Instead of stopping the emulation, report a MEMTX_DECODE_ERROR if the OS
tries to access non-existent registers.
Signed-off-by: Helge Deller
---
hw/pci-host/astro.c | 30 +-
1 file changed, 13 insertions(+), 17 deletions(-)
diff --git a/hw/pci
From: Helge Deller
CHECK_MOST_PRIVILEGED() should check the privilege level only when the PSW.P
bit is set.
Signed-off-by: Helge Deller
---
target/hppa/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index
From: Helge Deller
Linux writes zeroes at bootup into the default ports for LASI audio and
LASI floppy controller to reset those devices. Allow writing to those
registers to avoid HPMCs.
Signed-off-by: Helge Deller
---
hw/misc/lasi.c | 11 +++
include/hw/misc/lasi.h | 2
From: Helge Deller
The ssm and rsm instructions number the PSW_W and PSW_E bits differently
than how they are actually in the PSW. Both bits are relevant on 64-bit
CPUs only.
Fix the existing ssm and rsm instructions to handle the bits correctly.
For that drop the swap_system_mask() helper
From: Helge Deller
Some enhancements and fixes for the hppa target.
The major change is, that this patchset adds a new SeaBIOS-hppa firmware
which is built as 32- and 64-bit firmware.
The new 64-bit firmware is necessary to fully support 64-bit operating systems
(HP-UX, Linux, NetBSD
From: Helge Deller
HP-UX 11 and HP ODE tools use the "rsm 0,%reg" instruction in not priviledged
code paths to get the current PSW flags. The constant 0 means that no bits of
the PSW shall be reset, so this is effectively a read-only access to the PSW.
Allow this read-only access ev
From: Helge Deller
Add the do_transaction_failed() handler to tigger a HPMC to the CPU
in case of I/O transaction errors.
This is a preparation commit.
We still lack implementation for some registers, so do not yet enable sending
HPMCs. Having this hunk here now nevertheless helps for the
From: Helge Deller
Add the do_transaction_failed() handler to tigger a HPMC to the CPU
in case of I/O transaction errors.
This is a preparation commit.
We still lack implementation for some registers, so do not yet enable sending
HPMCs. Having this hunk here now nevertheless helps for the
From: Helge Deller
Add disassembly of opcodes for "HALT QEMU", "RESET QEMU" and
"RESTORE SHR" (restore shadow registers).
Signed-off-by: Helge Deller
Reviewed-by: Richard Henderson
---
disas/hppa.c | 4
1 file changed, 4 insertions(+)
diff --git a/dis
From: Helge Deller
Load the 64-bit SeaBIOS-hppa firmware by default when running on a 64-bit
machine. This will enable us to later support more than 4GB of RAM and is
required that the OS (or PALO bootloader) will start or install a 64-bit kernel
instead of a 32-bit kernel.
Note that SeaBIOS
From: Helge Deller
Linux writes zeroes at bootup into the default ports for LASI audio and
LASI floppy controller to reset those devices. Allow writing to those
registers to avoid HPMCs.
Signed-off-by: Helge Deller
---
hw/misc/lasi.c | 11 +++
include/hw/misc/lasi.h | 2
From: Helge Deller
For debugging purposes at the early stage of the bootup process,
the SeaBIOS-hppa firmware sometimes needs to output characters to the
serial console. Note that the serial console is the default output
method for parisc machines.
At this stage PCI busses and other devices
From: Helge Deller
SeaBIOS-hppa version 16 news & enhancements:
- Initial 64-bit firmware release
- Added fault handler to catch and report firmware bugs
- Use Qemu's builtin_console_out() via diag 0x101
- parisc-qemu-install Makefile target to install firmware in qemu
- Added -fw_cfg
From: Helge Deller
The BTLB helper function stores the BTLB info (four 32-bit ints) into
the memory of the guest. They are only available when emulating a 32-bit
CPU in the guest, so use "uint32_t" instead of "target_ulong" here.
Signed-off-by: Helge Deller
Reviewed-b
From: Helge Deller
Firmware and qemu reads and writes the MAC address for the LASI LAN via
registers in LASI. Allow those accesses and return zero even if LASI
LAN isn't enabled to avoid HPMCs (=crashes).
Signed-off-by: Helge Deller
---
hw/misc/lasi.c | 2 ++
1 file changed, 2 inser
From: Helge Deller
HP-UX 11 and HP ODE tools use the "rsm 0,%reg" instruction in not priviledged
code paths to get the current PSW flags. The constant 0 means that no bits of
the PSW shall be reset, so this is effectively a read-only access to the PSW.
Allow this read-only access ev
From: Helge Deller
Instead of stopping the emulation, report a MEMTX_DECODE_ERROR if the OS
tries to access non-existent registers.
Signed-off-by: Helge Deller
---
hw/pci-host/astro.c | 27 +++
1 file changed, 11 insertions(+), 16 deletions(-)
diff --git a/hw/pci-host
From: Helge Deller
Some enhancements and fixes for the hppa target.
The major change is, that this patchset adds a new SeaBIOS-hppa firmware
which is built as 32- and 64-bit firmware.
The new 64-bit firmware is necessary to fully support 64-bit operating systems
(HP-UX, Linux, NetBSD,...).
v2
From: Helge Deller
The Astro/Elroy chip can work in either Hard-Fail or Soft-Fail mode.
Hard fail means the system bus will send an HPMC (=crash) to the
processor, soft fail means the system bus will ignore timeouts of
MMIO-reads or MMIO-writes and return -1ULL.
The HF mode is controlled by a
#x27;t complete.
Therefore set the register to 0x3b40, which means:
Link is up, Autonegotation complete, Full Duplex, 100MBit/s Link
speed.
Also clear the mask because this register is read only.
Signed-off-by: Sven Schnelle
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Helge Deller
Tested-b
From: Helge Deller
For debugging purposes at the early stage of the bootup process,
the SeaBIOS-hppa firmware sometimes needs to output characters to the
serial console. Note that the serial console is the default output
method for parisc machines.
At this stage PCI busses and other devices
From: Helge Deller
The following changes since commit 39a6e4f87e7b75a45b08d6dc8b8b7c2954c87440:
Merge tag 'pull-qapi-2024-02-03' of https://repo.or.cz/qemu/armbru into
staging (2024-02-03 13:31:58 +)
are available in the Git repository at:
https://github.com/hdeller/qem
From: Helge Deller
Add disassembly of opcodes for "HALT QEMU", "RESET QEMU" and
"RESTORE SHR" (restore shadow registers).
Signed-off-by: Helge Deller
Reviewed-by: Richard Henderson
---
disas/hppa.c | 4
1 file changed, 4 insertions(+)
diff --git a/dis
From: Helge Deller
The Astro/Elroy chip can work in either Hard-Fail or Soft-Fail mode.
Hard fail means the system bus will send an HPMC (=crash) to the
processor, soft fail means the system bus will ignore timeouts of
MMIO-reads or MMIO-writes and return -1ULL.
The HF mode is controlled by a
From: Helge Deller
HP-UX 11 and HP ODE tools use the "rsm 0,%reg" instruction in not priviledged
code paths to get the current PSW flags. The constant 0 means that no bits of
the PSW shall be reset, so this is effectively a read-only access to the PSW.
Allow this read-only access ev
From: Helge Deller
Add the do_transaction_failed() handler to tigger a HPMC to the CPU
in case of I/O transaction errors.
This is a preparation commit.
We still lack implementation for some registers, so do not yet enable sending
HPMCs. Having this hunk here now nevertheless helps for the
From: Helge Deller
The BTLB helper function stores the BTLB info (four 32-bit ints) into
the memory of the guest. They are only available when emulating a 32-bit
CPU in the guest, so use "uint32_t" instead of "target_ulong" here.
Signed-off-by: Helge Deller
Reviewed-b
From: Helge Deller
Linux writes zeroes at bootup into the default ports for LASI audio and
LASI floppy controller to reset those devices. Allow writing to those
registers to avoid HPMCs.
Signed-off-by: Helge Deller
---
hw/misc/lasi.c | 11 +++
include/hw/misc/lasi.h | 2
From: Helge Deller
Firmware and qemu reads and writes the MAC address for the LASI LAN via
registers in LASI. Allow those accesses and return zero even if LASI
LAN isn't enabled to avoid HPMCs (=crashes).
Signed-off-by: Helge Deller
---
hw/misc/lasi.c | 2 ++
1 file changed, 2 inser
From: Helge Deller
Instead of stopping the emulation, report a MEMTX_DECODE_ERROR if the OS
tries to access non-existent registers.
Signed-off-by: Helge Deller
Reviewed-by: Richard Henderson
---
hw/pci-host/astro.c | 27 +++
1 file changed, 11 insertions(+), 16
From: Helge Deller
Load the 64-bit SeaBIOS-hppa firmware by default when running on a 64-bit
machine. This will enable us to later support more than 4GB of RAM and is
required that the OS (or PALO bootloader) will start or install a 64-bit kernel
instead of a 32-bit kernel.
Note that SeaBIOS
#x27;t complete.
Therefore set the register to 0x3b40, which means:
Link is up, Autonegotation complete, Full Duplex, 100MBit/s Link
speed.
Also clear the mask because this register is read only.
Signed-off-by: Sven Schnelle
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Helge Deller
Tested-b
From: Helge Deller
Add disassembly of opcodes for "HALT QEMU", "RESET QEMU" and
"RESTORE SHR" (restore shadow registers).
Signed-off-by: Helge Deller
Reviewed-by: Richard Henderson
---
disas/hppa.c | 4
1 file changed, 4 insertions(+)
diff --git a/dis
From: Helge Deller
The following changes since commit 39a6e4f87e7b75a45b08d6dc8b8b7c2954c87440:
Merge tag 'pull-qapi-2024-02-03' of https://repo.or.cz/qemu/armbru into
staging (2024-02-03 13:31:58 +)
are available in the Git repository at:
https://github.com/hdeller/qem
From: Helge Deller
The Astro/Elroy chip can work in either Hard-Fail or Soft-Fail mode.
Hard fail means the system bus will send an HPMC (=crash) to the
processor, soft fail means the system bus will ignore timeouts of
MMIO-reads or MMIO-writes and return -1ULL.
The HF mode is controlled by a
#x27;t complete.
Therefore set the register to 0x3b40, which means:
Link is up, Autonegotation complete, Full Duplex, 100MBit/s Link
speed.
Also clear the mask because this register is read only.
Signed-off-by: Sven Schnelle
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Helge Deller
Tested-b
From: Helge Deller
Load the 64-bit SeaBIOS-hppa firmware by default when running on a 64-bit
machine. This will enable us to later support more than 4GB of RAM and is
required that the OS (or PALO bootloader) will start or install a 64-bit kernel
instead of a 32-bit kernel.
Note that SeaBIOS
From: Helge Deller
Linux writes zeroes at bootup into the default ports for LASI audio and
LASI floppy controller to reset those devices. Allow writing to those
registers to avoid HPMCs.
Signed-off-by: Helge Deller
---
hw/misc/lasi.c | 11 +++
include/hw/misc/lasi.h | 2
From: Helge Deller
Firmware and qemu reads and writes the MAC address for the LASI LAN via
registers in LASI. Allow those accesses and return zero even if LASI
LAN isn't enabled to avoid HPMCs (=crashes).
Signed-off-by: Helge Deller
---
hw/misc/lasi.c | 2 ++
1 file changed, 2 inser
From: Helge Deller
For debugging purposes at the early stage of the bootup process,
the SeaBIOS-hppa firmware sometimes needs to output characters to the
serial console. Note that the serial console is the default output
method for parisc machines.
At this stage PCI busses and other devices
From: Helge Deller
Instead of stopping the emulation, report a MEMTX_DECODE_ERROR if the OS
tries to access non-existent registers.
Signed-off-by: Helge Deller
Reviewed-by: Richard Henderson
---
hw/pci-host/astro.c | 27 +++
1 file changed, 11 insertions(+), 16
From: Helge Deller
Add the do_transaction_failed() handler to tigger a HPMC to the CPU
in case of I/O transaction errors.
This is a preparation commit.
We still lack implementation for some registers, so do not yet enable sending
HPMCs. Having this hunk here now nevertheless helps for the
From: Helge Deller
The BTLB helper function stores the BTLB info (four 32-bit ints) into
the memory of the guest. They are only available when emulating a 32-bit
CPU in the guest, so use "uint32_t" instead of "target_ulong" here.
Signed-off-by: Helge Deller
Reviewed-b
From: Helge Deller
HP-UX 11 and HP ODE tools use the "rsm 0,%reg" instruction in not priviledged
code paths to get the current PSW flags. The constant 0 means that no bits of
the PSW shall be reset, so this is effectively a read-only access to the PSW.
Allow this read-only access ev
From: Helge Deller
The following changes since commit fd1952d814da738ed107e05583b3e02ac11e88ff:
Update version for v9.1.0 release (2024-09-03 09:18:26 -0700)
are available in the Git repository at:
https://github.com/hdeller/qemu-hppa.git tags/hppa-v9.1-fixes-pull-request
for you to
From: Helge Deller
The linux-user hppa target crashes randomly for me since commit
081a0ed188d8 ("target/hppa: Do not mask in copy_iaoq_entry").
That commit dropped the masking of the IAOQ addresses while copying them
from other registers and instead keeps them with all 64 bits up
From: Helge Deller
While adding hppa64 support, the psw_v variable got extended from 32 to 64
bits. So, when packaging the PSW-V bit from the psw_v variable for interrupt
processing, check bit 31 instead the 63th (sign) bit.
This fixes a hard to find Linux kernel boot issue where the loss of
From: Helge Deller
Report the new number of TLB entries (without BTLBs) to the
guest and drop reporting of BTLB entries which weren't used at all.
Clear all BTLB and TLB entries at machine reset.
Signed-off-by: Helge Deller
---
hw/hppa/machine.c | 10 +-
1 file changed, 5 inser
From: Helge Deller
Reserve 16 out of the 256 TLB entries for Block-TLBs.
Signed-off-by: Helge Deller
---
target/hppa/cpu.h | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index fa13694dab..23852d89b2 100644
--- a/target/hppa
From: Helge Deller
Change the TLB code to store the Block-TLBs at the beginning
of the TLB table. New 4k TLB entries which are added later
shall not overwrite any of the BTLB entries.
Make sure that when the TLB is cleared by the OS via the ptlbe
instruction, the Block-TLBs will not be dropped
From: Helge Deller
All 32-bit hppa CPUs allow a fixed number of TLB entries to have a
different page size than the default 4k.
Those are called "Block-TLBs" and are created at startup by the
operating system and managed by the firmware of hppa machines
through the firmware PDC_BLOC
From: Helge Deller
Extract the immediate value given by the diagnose CPU instruction.
This is needed to distinguish the various diagnose calls.
Signed-off-by: Helge Deller
---
target/hppa/insns.decode | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/hppa/insns.decode
From: Helge Deller
Wire up the hppa diag instruction to support Block-TLBs
when called with the 0x100 value.
The diag_btlb() helper function does all necessary steps
to emulate the PDC BTLB firmware function, which includes
providing BTLB info, adding a new BTLB, deleting a BTLB
and removing
From: Helge Deller
The following changes since commit 9ef497755afc252fb8e060c9ea6b0987abfd20b6:
Merge tag 'pull-vfio-20230911' of https://github.com/legoater/qemu into
staging (2023-09-11 09:13:08 -0400)
are available in the Git repository at:
https://github.com/hdeller/qem
From: Helge Deller
Report the new number of TLB entries (without BTLBs) to the
guest and drop reporting of BTLB entries which weren't used at all.
Clear all BTLB and TLB entries at machine reset.
Signed-off-by: Helge Deller
---
hw/hppa/machine.c | 10 +-
1 file changed, 5 inser
From: Helge Deller
Extract the immediate value given by the diagnose CPU instruction.
This is needed to distinguish the various diagnose calls.
Signed-off-by: Helge Deller
---
target/hppa/insns.decode | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/hppa/insns.decode
From: Helge Deller
Wire up the hppa diag instruction to support Block-TLBs
when called with the 0x100 value.
The diag_btlb() helper function does all necessary steps
to emulate the PDC BTLB firmware function, which includes
providing BTLB info, adding a new BTLB, deleting a BTLB
and removing
From: Mikulas Patocka
The code in setup_rt_frame reads two words at haddr, but locks only one.
This patch fixes it to lock both.
Signed-off-by: Mikulas Patocka
Acked-by: Helge Deller
Cc: qemu-sta...@nongnu.org
Signed-off-by: Helge Deller
---
linux-user/hppa/signal.c | 5 +++--
1 file
From: Helge Deller
Reserve 16 out of the 256 TLB entries for Block-TLBs.
Signed-off-by: Helge Deller
---
target/hppa/cpu.h | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index fa13694dab..23852d89b2 100644
--- a/target/hppa
From: Helge Deller
Change the TLB code to store the Block-TLBs at the beginning
of the TLB table. New 4k TLB entries which are added later
shall not overwrite any of the BTLB entries.
Make sure that when the TLB is cleared by the OS via the ptlbe
instruction, the Block-TLBs will not be dropped
rupts a thread when the 'N'
flag is set, the flag remains set at the beginning of the signal handler
and the first instruction of the signal handler is skipped.
Signed-off-by: Mikulas Patocka
Acked-by: Helge Deller
Cc: qemu-sta...@nongnu.org
Signed-off-by: Helge Deller
---
linux-us
From: Helge Deller
Wire up the hppa diag instruction to support Block-TLBs
when called with the 0x100 value.
The diag_btlb() helper function does all necessary steps
to emulate the PDC BTLB firmware function, which includes
providing BTLB info, adding a new BTLB, deleting a BTLB
and removing
From: Helge Deller
Report the new number of TLB entries (without BTLBs) to the
guest and drop reporting of BTLB entries which weren't used at all.
Clear all BTLB and TLB entries at machine reset.
Signed-off-by: Helge Deller
---
hw/hppa/machine.c | 10 +-
1 file changed, 5 inser
From: Helge Deller
Reserve 16 out of the 256 TLB entries for Block-TLBs.
Signed-off-by: Helge Deller
---
target/hppa/cpu.h | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index fa13694dab..23852d89b2 100644
--- a/target/hppa
From: Mikulas Patocka
The code in setup_rt_frame reads two words at haddr, but locks only one.
This patch fixes it to lock both.
Signed-off-by: Mikulas Patocka
Acked-by: Helge Deller
Cc: qemu-sta...@nongnu.org
Signed-off-by: Helge Deller
---
linux-user/hppa/signal.c | 5 +++--
1 file
From: Helge Deller
The following changes since commit 9ef497755afc252fb8e060c9ea6b0987abfd20b6:
Merge tag 'pull-vfio-20230911' of https://github.com/legoater/qemu into
staging (2023-09-11 09:13:08 -0400)
are available in the Git repository at:
https://github.com/hdeller/qem
rupts a thread when the 'N'
flag is set, the flag remains set at the beginning of the signal handler
and the first instruction of the signal handler is skipped.
Signed-off-by: Mikulas Patocka
Acked-by: Helge Deller
Cc: qemu-sta...@nongnu.org
Signed-off-by: Helge Deller
---
linux-us
From: Helge Deller
Extract the immediate value given by the diagnose CPU instruction.
This is needed to distinguish the various diagnose calls.
Signed-off-by: Helge Deller
---
target/hppa/insns.decode | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/hppa/insns.decode
From: Helge Deller
Change the TLB code to store the Block-TLBs at the beginning
of the TLB table. New 4k TLB entries which are added later
shall not overwrite any of the BTLB entries.
Make sure that when the TLB is cleared by the OS via the ptlbe
instruction, the Block-TLBs will not be dropped
From: Helge Deller
Report the new number of TLB entries (without BTLBs) to the
guest and drop reporting of BTLB entries which weren't used at all.
Clear all BTLB and TLB entries at machine reset.
Signed-off-by: Helge Deller
---
hw/hppa/machine.c | 10 +-
1 file changed, 5 inser
From: Helge Deller
Reserve 16 out of the 256 TLB entries for Block-TLBs.
Signed-off-by: Helge Deller
---
target/hppa/cpu.h | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index fa13694dab..23852d89b2 100644
--- a/target/hppa
From: Helge Deller
Wire up the hppa diag instruction to support Block-TLBs
when called with the 0x100 value.
The diag_btlb() helper function does all necessary steps
to emulate the PDC BTLB firmware function, which includes
providing BTLB info, adding a new BTLB, deleting a BTLB
and removing
From: Helge Deller
Change the TLB code to store the Block-TLBs at the beginning
of the TLB table. New 4k-TLB entries which which are added later
shall not overwrite those BTLB entries.
Make sure that when the TLB is cleared by the OS via the ptlbe
instruction, the Block-TLBs will not be dropped
From: Helge Deller
All 32-bit hppa CPUs allow a fixed number of TLB entries to have a
different page size than the default 4k.
Those are called "Block-TLBs" and are created at startup by the
operating system and managed by the firmware of hppa machines
through the firmware PDC_BLOC
From: Helge Deller
Extract the immediate value given by the diagnose CPU instruction.
This will be needed to distinguish the various diagnose calls.
Signed-off-by: Helge Deller
---
target/hppa/insns.decode | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/hppa
From: Helge Deller
The new SeaBIOS-hppa version 10 includes initial support
for PA2.0 CPUs.
Additionally update copyright and drop commented-out code.
Signed-off-by: Helge Deller
---
hw/hppa/machine.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/hw/hppa
From: Helge Deller
The following changes since commit 63011373ad22c794a013da69663c03f1297a5c56:
Merge tag 'pull-riscv-to-apply-20231012-1' of
https://github.com/alistair23/qemu into staging (2023-10-12 10:24:44 -0400)
are available in the Git repository at:
https://github.c
From: Helge Deller
Those PS/2 ports are created with the LASI controller when
a 32-bit PA-RISC machine is created.
Mark them not user-createable to avoid showing them in
the qemu device list.
Signed-off-by: Helge Deller
Cc: qemu-sta...@nongnu.org
---
hw/input/lasips2.c | 10 ++
1
From: Helge Deller
Provide necessary info to SeaBIOS-hppa.
Signed-off-by: Helge Deller
---
hw/hppa/machine.c | 22 +++---
1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
index c6d8deffcf..de925259ea 100644
--- a/hw/hppa
From: Helge Deller
Add the new HP C3700 machine, the new Astro PCI host and
add the missing entry for the seabios-hppa directory.
Signed-off-by: Helge Deller
---
MAINTAINERS | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index ceea4c2bf2
From: Helge Deller
For SeaBIOS-hppa, the RTC and DebugOutputPort were in the I/O area of
the LASI chip of the emulated B160L machine.
Since we will add other machines without a LASI chip, move the emulated
devices into the I/O area of CPU#0 instead.
Signed-off-by: Helge Deller
---
hw/hppa
From: Helge Deller
The 64-bit PA-RISC machines use a Astro system bus adapter (SBA)
with Elroy PCI host chips.
Later generation Astro chips were named Pluto, Ike and REO.
Signed-off-by: Helge Deller
---
hw/pci-host/astro.c | 885
hw/pci-host/trace
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