.
Chen Fan (8):
pcie_aer: fix typos in pcie_aer_inject_error comment
vfio-pci: add aer capability support
pcie_aer: expose pcie_aer_msg() interface
vfio-pci: pass the aer error to guest
pcie_aer: fix a trivial typo in PCIEAERMsg comments
vfio_pci: fix a wrong check in vfio_pci_reset
Signed-off-by: Chen Fan
---
hw/vfio/pci.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index 54eb6b4..65247ee 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
@@ -134,6 +134,12 @@ typedef struct VFIOMSIXInfo {
void *mmap
Refer to "PCI Express Base Spec3.0", this comments can't
fit the description in spec, so we should fix them.
Signed-off-by: Chen Fan
---
hw/pci/pcie_aer.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
index 1
if we detect the aer capability in vfio device, then
we should initialize the vfio device aer rigister bits.
so guest OS can set this bits as needed.
Signed-off-by: Chen Fan
---
hw/vfio/pci.c | 72 +++
1 file changed, 72 insertions
Signed-off-by: Chen Fan
---
include/hw/pci/pcie_aer.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/hw/pci/pcie_aer.h b/include/hw/pci/pcie_aer.h
index 648df73..6c4bf3b 100644
--- a/include/hw/pci/pcie_aer.h
+++ b/include/hw/pci/pcie_aer.h
@@ -51,7 +51,7 @@ struct
-off-by: Chen Fan
---
hw/vfio/pci.c | 34 --
1 file changed, 28 insertions(+), 6 deletions(-)
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index 2072261..8c81bb3 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
@@ -3141,18 +3141,40 @@ static void vfio_put_device
for old machine types, we should disable aercap feature.
Signed-off-by: Chen Fan
---
hw/vfio/pci.c | 13 ++---
include/hw/compat.h | 4
2 files changed, 14 insertions(+), 3 deletions(-)
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index 65247ee..0d830e6 100644
--- a/hw/vfio
On 01/12/2015 11:24 PM, Alex Williamson wrote:
On Mon, 2015-01-12 at 11:04 +0800, Chen Fan wrote:
when the vfio device encounters an uncorrectable error in host,
the vfio_pci driver will signal the eventfd registered by this
vfio device, the results in the qemu eventfd handler getting
On 2015/1/28 19:12, Wei Liu wrote:
On Wed, Jan 28, 2015 at 08:42:56AM +0800, Chen, Tiejun wrote:
On 2015/1/27 22:40, Ian Jackson wrote:
Chen, Tiejun writes ("Re: [Qemu-devel] [RFC][PATCH 1/1] libxl: add one machine
property to support IGD GFX passthrough"):
On 2015/1/23 8:43, Ch
On 2015/1/29 18:50, Wei Liu wrote:
On Thu, Jan 29, 2015 at 08:41:24AM +0800, Chen, Tiejun wrote:
On 2015/1/28 19:12, Wei Liu wrote:
On Wed, Jan 28, 2015 at 08:42:56AM +0800, Chen, Tiejun wrote:
On 2015/1/27 22:40, Ian Jackson wrote:
Chen, Tiejun writes ("Re: [Qemu-devel] [RFC][PATC
On 2015/1/30 20:26, Wei Liu wrote:
On Fri, Jan 30, 2015 at 08:56:48AM +0800, Chen, Tiejun wrote:
[...]
Just remember to handle old option in libxl if your old option is already
released by some older version of QEMUs.
I just drop that old option, -gfx_passthru, if we're under qemu ups
When we're working to support IGD GFX passthrough with qemu
upstream, instead of "-gfx_passthru" we'd like to make that
a machine option, "-machine xxx,-igd-passthru=on". This need
to bring a change on tool side.
Signed-off-by: Tiejun Chen
---
v2:
* Based on some
On 2015/2/2 19:08, Ian Campbell wrote:
On Mon, 2015-02-02 at 09:17 +0800, Tiejun Chen wrote:
When we're working to support IGD GFX passthrough with qemu
upstream, instead of "-gfx_passthru" we'd like to make that
a machine option, "-machine xxx,-igd-passthru=on".
On 2015/2/2 20:19, Wei Liu wrote:
On Mon, Feb 02, 2015 at 09:17:23AM +0800, Tiejun Chen wrote:
When we're working to support IGD GFX passthrough with qemu
upstream, instead of "-gfx_passthru" we'd like to make that
a machine option, "-machine xxx,-igd-passthru=on"
On 2015/2/2 20:54, Ian Jackson wrote:
Wei Liu writes ("Re: [v2][PATCH] libxl: add one machine property to support IGD GFX
passthrough"):
On Mon, Feb 02, 2015 at 09:17:23AM +0800, Tiejun Chen wrote:
When we're working to support IGD GFX passthrough with qemu
upstr
On 2015/2/3 18:19, Wei Liu wrote:
On Tue, Feb 03, 2015 at 09:01:53AM +0800, Chen, Tiejun wrote:
On 2015/2/2 20:19, Wei Liu wrote:
On Mon, Feb 02, 2015 at 09:17:23AM +0800, Tiejun Chen wrote:
When we're working to support IGD GFX passthrough with qemu
upstream, instead of "-gfx_pass
On 2015/2/3 19:07, Ian Campbell wrote:
On Tue, 2015-02-03 at 09:04 +0800, Chen, Tiejun wrote:
On 2015/2/2 20:54, Ian Jackson wrote:
Wei Liu writes ("Re: [v2][PATCH] libxl: add one machine property to support IGD GFX
passthrough"):
On Mon, Feb 02, 2015 at 09:17:23AM +0800, Tiejun
On 02/03/2015 04:16 AM, Alex Williamson wrote:
On Wed, 2015-01-28 at 16:37 +0800, Chen Fan wrote:
when vfio device support FLR, then when device reset,
we call VFIO_DEVICE_RESET ioctl to reset the device first,
at kernel side, we also can see the order of reset:
3330 rc = pcie_flr(dev
On 2015/2/4 18:41, Ian Campbell wrote:
On Wed, 2015-02-04 at 09:34 +0800, Chen, Tiejun wrote:
"-machine xxx,igd-passthru=on", to enable/disable that feature.
And we also remove that old option, "-gfx_passthru", just from
the case of LIBXL_DEVICE_MO
On 2015/2/5 17:52, Ian Campbell wrote:
On Thu, 2015-02-05 at 09:22 +0800, Chen, Tiejun wrote:
Indeed this is not something workaround, and I think in any type of VGA
devices, we'd like to diminish this sort of thing gradually, right?
This mightn't come true in real world :)
It&#x
Actually we define these device IDs in virtio standard, so
we'd better put them into one common place to manage conveniently.
Here I also add VIRTIO_ID_RESERVE according to virtio spec.
Signed-off-by: Tiejun Chen
---
hw/9pfs/virtio-9p.h| 2 --
include/hw/virtio/virtio-ball
build the srat table for preboot cpus before resume all cpu
on destination.
Thanks,
Chen
Regards,
Andreas
Sorry please ignore this to review another revision.
Thanks
Tiejun
On 2015/2/6 13:24, Tiejun Chen wrote:
Actually we define these device IDs in virtio standard, so
we'd better put them into one common place to manage conveniently.
Here I also add VIRTIO_ID_RESERVE according to virtio
Actually we define these device IDs in virtio standard, so
we'd better put them into one common place to manage conveniently.
Here I also add VIRTIO_ID_RESERVE according to virtio spec.
Signed-off-by: Tiejun Chen
---
hw/9pfs/virtio-9p.h| 2 --
include/hw/virtio/virtio-ball
On 02/03/2015 04:15 AM, Alex Williamson wrote:
On Wed, 2015-01-28 at 16:37 +0800, Chen Fan wrote:
if we detect the aer capability in vfio device, then
we should initialize the vfio device aer rigister bits.
so guest OS can set this bits as needed.
s/rigister/register/
Signed-off-by: Chen
On 02/03/2015 04:16 AM, Alex Williamson wrote:
On Wed, 2015-01-28 at 16:37 +0800, Chen Fan wrote:
when the vfio device encounters an uncorrectable error in host,
the vfio_pci driver will signal the eventfd registered by this
vfio device, the results in the qemu eventfd handler getting
invoked
On 2015/2/6 9:01, Chen, Tiejun wrote:
On 2015/2/5 17:52, Ian Campbell wrote:
On Thu, 2015-02-05 at 09:22 +0800, Chen, Tiejun wrote:
Indeed this is not something workaround, and I think in any type of VGA
devices, we'd like to diminish this sort of thing gradually, right?
This mightn&#
On 2015/2/6 20:14, Cornelia Huck wrote:
On Fri, 6 Feb 2015 13:41:26 +0800
Tiejun Chen wrote:
Actually we define these device IDs in virtio standard, so
we'd better put them into one common place to manage conveniently.
Here I also add VIRTIO_ID_RESERVE according to virtio spec.
Signe
On 2015/2/7 0:28, Stefan Hajnoczi wrote:
On Fri, Feb 06, 2015 at 01:41:26PM +0800, Tiejun Chen wrote:
Actually we define these device IDs in virtio standard, so
we'd better put them into one common place to manage conveniently.
Here I also add VIRTIO_ID_RESERVE according to virtio spec.
S
On 2015/2/8 18:48, Michael S. Tsirkin wrote:
On Fri, Feb 06, 2015 at 01:14:46PM +0100, Cornelia Huck wrote:
On Fri, 6 Feb 2015 13:41:26 +0800
Tiejun Chen wrote:
Actually we define these device IDs in virtio standard, so
we'd better put them into one common place to manage conveniently.
On 2015/2/9 15:02, Michael S. Tsirkin wrote:
On Mon, Feb 09, 2015 at 03:01:15PM +0800, Chen, Tiejun wrote:
On 2015/2/8 18:48, Michael S. Tsirkin wrote:
On Fri, Feb 06, 2015 at 01:14:46PM +0100, Cornelia Huck wrote:
On Fri, 6 Feb 2015 13:41:26 +0800
Tiejun Chen wrote:
Actually we define
differ from alias id. we can use apic_id + maxcpus
as the instance_id. so during migration we can find the corresponding
cpu with instance_id regardless new/old scheme.
I has made a patch and test migrating from old version to new version.
it seems work fine. pls have a look at the attach file.
>From pcie spec, the bits attributes are RW1CS in Correctable
Error Status Register, so this patch fix a wrong definition
for PCI_ERR_COR_STATUS register with w1cmask type.
Signed-off-by: Chen Fan
---
hw/pci/pcie_aer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/
SERR# for bridge control register in firmware.
2. initilize aer capability for vfio device.
3. fix some trivial bug.
Chen Fan (10):
pcie_aer: fix typos in pcie_aer_inject_error comment
aer: fix a wrong init PCI_ERR_COR_STATUS w1cmask type register
aer: introduce pcie_aer_setup to setup
Refer to "PCI Express Base Spec3.0", this comments can't
fit the description in spec, so we should fix them.
Signed-off-by: Chen Fan
---
hw/pci/pcie_aer.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
index 1
because function pcie_aer_init() is for adding a new aer capability,
but for vfio device, we only need to capture the aer capability from
vfio device configuration space, so here we introduce pcie_aer_setup()
to init all raw devices.
Signed-off-by: Chen Fan
---
hw/pci/pcie_aer.c | 63
because at i440FX platform, all pcie device don't support aer capability,
so for all vfio device, we don't need to expose the aer capability.
Signed-off-by: Chen Fan
---
hw/i386/pc_piix.c | 16
1 file changed, 16 insertions(+)
diff --git a/hw/i386/pc_piix.c b/hw/i386
Signed-off-by: Chen Fan
---
include/hw/pci/pcie_aer.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/hw/pci/pcie_aer.h b/include/hw/pci/pcie_aer.h
index 15ede17..227427e 100644
--- a/include/hw/pci/pcie_aer.h
+++ b/include/hw/pci/pcie_aer.h
@@ -51,7 +51,7 @@ struct
Introduce an independent enum structure to define the features bitmap,
it would be good for adding new features definition.
Signed-off-by: Chen Fan
---
hw/vfio/pci.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index 75c932b..bf314a1
add a new "aercap" feature in vfio device, for controlling
whether expose aer capability.
Signed-off-by: Chen Fan
---
hw/vfio/pci.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index bf314a1..c21b40b 100644
--- a/hw/
-off-by: Chen Fan
---
hw/vfio/pci.c | 35 +--
1 file changed, 29 insertions(+), 6 deletions(-)
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index c21b40b..5ba4e52 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
@@ -3165,18 +3165,41 @@ static void vfio_put_device
when we detect extanded capability in vfio device, then
we should initialize the vfio device corresponding feature
register bits.
so guest OS can find it and set those bits as needed.
and initialize aer capability.
Signed-off-by: Chen Fan
---
hw/vfio/pci.c | 85
For vfio device, we need to propagate the aer error to
Guest OS. we use the pcie_aer_msg() to send aer error
to guest.
Signed-off-by: Chen Fan
---
hw/pci/pcie_aer.c | 2 +-
include/hw/pci/pcie_aer.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/pci/pcie_aer.c b
On 3/16/15 23:31, Richard Henderson wrote:
> On 03/13/2015 11:03 PM, Chen Gang wrote:
>> +static void decode_rrr_1_opcode_y0(struct DisasContext *dc,
>> + tilegx_bundle_bits bundle)
>> +{
>> +switch (get_RRROpcodeExtension
On 3/16/15 23:37, Richard Henderson wrote:
> On 03/15/2015 04:57 PM, Chen Gang wrote:
>> OK, thanks. And next, I shall try to send the whole tilegx patches again
>> (it is about 6-8 patches), within 2015-03-18.
>
> When you do so, make sure it's against the *current* ma
On 03/17/2015 06:39 PM, Andreas Färber wrote:
Am 17.03.2015 um 10:08 schrieb Chen Fan:
ICC bus was invented only to provide hotplug capability to
CPU and APIC because at the time being hotplug was available only for
BUS attached devices.
Now this patch is to drop ICC bus impl, and switch to
I think the _libxl_ message needs to be just "Unable to detect graphics
passthru kind". i.e. it can't/shouldn't reference anything to do with xl
config options etc (which would make no sense if libvirt was being
used).
That's not very user friendly though, so you may want to consider adding
a new
test.img -m 2560 -boot c -machine pc
As we discussed we need to create a separate machine to support current
IGD passthrough.
Michael S. Tsirkin (1):
i440fx: make types configurable at run-time
Tiejun Chen (9):
pc_init1: pass pa
From: "Michael S. Tsirkin"
IGD passthrough wants to supply a different pci and
host devices, inheriting i440fx devices. Make types
configurable.
Signed-off-by: Michael S. Tsirkin
Signed-off-by: Tiejun Chen
---
hw/i386/pc_piix.c| 4 +++-
hw/pci-host/piix.c | 9 -
inclu
Now we retrieve VGA bios like kvm stuff in qemu but we need to
fix Device Identification in case if its not matched with the
real IGD device since Seabios is always trying to compare this
ID to work out VGA BIOS.
Signed-off-by: Tiejun Chen
---
hw/xen/xen_pt.c | 10 ++
hw/xen
basic gfx passthrough support:
- add a vga type for gfx passthrough
- register/unregister legacy VGA I/O ports and MMIOs for passthrough GFX
Signed-off-by: Tiejun Chen
Signed-off-by: Yang Zhang
---
hw/core/machine.c| 20
hw/xen/Makefile.objs | 1 +
hw/xen/xen
Currently we just register this isa bridge when we use IGD
passthrough in Xen side.
Signed-off-by: Tiejun Chen
---
hw/xen/xen_pt.c | 18 ++
include/hw/xen/xen.h | 1 +
2 files changed, 19 insertions(+)
diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c
index fcc9f1c..2d5cebb
bably don't matter to the
Gfx driver, but obviously any difference in display port connections
will so it should be fine with any PCH in case of passthrough.
So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell)
scenarios, 0x9cc3 for BDW(Broadwell).
Signed-off-by: Tiejun Che
Implement a pci host bridge specific to passthrough. Actually
this just inherits the standard one. And we also just expose
a minimal real host bridge pci configuration subset.
Signed-off-by: Tiejun Chen
---
hw/pci-host/piix.c | 82
include
Pass types to configure pc_init1().
Signed-off-by: Tiejun Chen
---
hw/i386/pc_piix.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 07faec9..cea3a5c 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
The OpRegion shouldn't be mapped 1:1 because the address in the host
can't be used in the guest directly.
This patch traps read and write access to the opregion of the Intel
GPU config space (offset 0xfc).
The original patch is from Jean Guyader
Signed-off-by: Tiejun Chen
Signed-of
Just register that pci host bridge specific to passthrough.
Signed-off-by: Tiejun Chen
---
hw/i386/pc_piix.c | 19 +--
1 file changed, 17 insertions(+), 2 deletions(-)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 8fbfc09..eae2d20 100644
--- a/hw/i386/pc_piix.c
+++ b
We will try to reuse assign_dev_load_option_rom in xen side, and
especially its a good beginning to unify pci assign codes both on
kvm and xen in the future.
Signed-off-by: Tiejun Chen
---
hw/i386/Makefile.objs | 1 +
hw/i386/kvm/pci-assign.c | 82
After load elf64 binary, qemu tilegx can finish executing the first
system call (uname) successfully in _dl_discover_osversion(), and
return to __libc_start_main().
Chen Gang (6):
target-tilegx: Firstly add TILE-Gx with minimized features
linux-user: tilegx: Firstly add architecture related
It is the configure and build system support for TILE-Gx (tilegx will be
used in configure and real sub-directory name).
At present, it is linux-user only, and can finish the first system call
(uname) execution in __libc_start_main().
Signed-off-by: Chen Gang
---
configure
They are based on Linux kernel tilegx architecture for 64 bit binary,
also based on tilegx ABI reference document.
Signed-off-by: Chen Gang
---
linux-user/tilegx/syscall.h| 80
linux-user/tilegx/syscall_nr.h | 278
linux-user/tilegx
They are for target features within qemu which independent from outside.
Signed-off-by: Chen Gang
---
linux-user/tilegx/target_cpu.h | 35 +++
linux-user/tilegx/target_signal.h | 28 ++
linux-user/tilegx/target_structs.h | 48
Add tilegx architecture in "syscall_defs.h", all related features (ioctrl,
and stat) are based on Linux kernel tilegx 64-bit implementation.
Signed-off-by: Chen Gang
---
linux-user/syscall_defs.h | 38 ++
1 file changed, 34 insertions(+), 4 deletion
Add main working flow feature, system call processing feature, and elf64
tilegx binary loading feature, based on Linux kernel tilegx 64-bit
implementation.
Signed-off-by: Chen Gang
---
include/elf.h| 2 ++
linux-user/elfload.c | 23 ++
linux-user/main.c| 86
For tilegx, several syscall macros are not supported, so switch them to
avoid building break.
Signed-off-by: Chen Gang
---
linux-user/syscall.c | 50 +-
1 file changed, 49 insertions(+), 1 deletion(-)
diff --git a/linux-user/syscall.c b/linux
On 2015/3/18 18:21, Gerd Hoffmann wrote:
On Mi, 2015-03-18 at 17:06 +0800, Tiejun Chen wrote:
Implement a pci host bridge specific to passthrough. Actually
this just inherits the standard one. And we also just expose
a minimal real host bridge pci configuration subset.
+/* Here we just
On 03/18/2015 09:29 PM, Michael S. Tsirkin wrote:
On Thu, Mar 12, 2015 at 06:23:56PM +0800, Chen Fan wrote:
For vfio device, we need to propagate the aer error to
Guest OS. we use the pcie_aer_msg() to send aer error
to guest.
Signed-off-by: Chen Fan
Interesting.
pcie_aer_inject_error was
On 3/19/15 04:06, Richard Henderson wrote:
> On 03/18/2015 09:34 AM, Chen Gang wrote:
>> +static void gen_fnop(void)
>> +{
>> +qemu_log_mask(CPU_LOG_TB_IN_ASM, "(f)nop\n");
>> +}
>> +
>> +static void gen_cmpltui(struct DisasContext *dc,
>&
This duplicates the code from above. I think this would be best done as:
static int libxl__detect_gfx_passthru_kind(libxl__gc *gc, guest_config)
{
if (b_info->u.hvm.gfx_passthru_kind != LIBXL_GFX_PASSTHRU_KIND_DEFAULT)
return 0;
if (libxl__is_igd_vga_passthru(gc, guest_config)
On 03/17/2015 06:39 PM, Andreas Färber wrote:
Am 17.03.2015 um 10:08 schrieb Chen Fan:
ICC bus was invented only to provide hotplug capability to
CPU and APIC because at the time being hotplug was available only for
BUS attached devices.
Now this patch is to drop ICC bus impl, and switch to
On 03/18/2015 12:29 AM, Igor Mammedov wrote:
On Tue, 17 Mar 2015 17:08:30 +0800
Chen Fan wrote:
ICC bus was invented only to provide hotplug capability to
CPU and APIC because at the time being hotplug was available only for
BUS attached devices.
Now this patch is to drop ICC bus impl, and
On 2015/3/19 18:44, Ian Campbell wrote:
On Thu, 2015-03-19 at 10:07 +0800, Chen, Tiejun wrote:
This duplicates the code from above. I think this would be best done as:
static int libxl__detect_gfx_passthru_kind(libxl__gc *gc, guest_config)
{
if (b_info->u.hvm.gfx_passthru_k
+case LIBXL_GFX_PASSTHRU_KIND_DEFAULT:
+LOG(ERROR, "unable to detect required gfx_passthru_kind");
In this case you will now have logged twice. I'd suggest logging only
here and not in the helper.
+default:
And this case is subtly different to LIBXL_GF
On 2015/3/20 18:11, Ian Campbell wrote:
On Fri, 2015-03-20 at 18:08 +0800, Chen, Tiejun wrote:
+if (!xlu_cfg_get_string(config, "gfx_passthru_kind", &buf, 0)) {
+if (libxl_gfx_passthru_kind_from_string(buf,
+
&b_info->u.hvm.gfx_passthru_kind)) {
+
After load elf64 binary, qemu tilegx can finish executing the first
system call (uname) successfully in _dl_discover_osversion(), and
return to __libc_start_main().
Chen Gang (6):
target-tilegx: Firstly add TILE-Gx with minimized features
linux-user: tilegx: Firstly add architecture related
It is the configure and build system support for TILE-Gx (tilegx will be
used in configure and real sub-directory name).
At present, it is linux-user only, and can finish the first system call
(uname) execution in __libc_start_main().
Signed-off-by: Chen Gang
---
configure
They are based on Linux kernel tilegx architecture for 64 bit binary,
also based on tilegx ABI reference document.
Signed-off-by: Chen Gang
---
linux-user/tilegx/syscall.h| 80
linux-user/tilegx/syscall_nr.h | 278
linux-user/tilegx
They are for target features within qemu which independent from outside.
Signed-off-by: Chen Gang
---
linux-user/tilegx/target_cpu.h | 35 +++
linux-user/tilegx/target_signal.h | 28 ++
linux-user/tilegx/target_structs.h | 48
Add tilegx architecture in "syscall_defs.h", all related features (ioctrl,
and stat) are based on Linux kernel tilegx 64-bit implementation.
Signed-off-by: Chen Gang
---
linux-user/syscall_defs.h | 38 ++
1 file changed, 34 insertions(+), 4 deletion
Add main working flow feature, system call processing feature, and elf64
tilegx binary loading feature, based on Linux kernel tilegx 64-bit
implementation.
Signed-off-by: Chen Gang
---
include/elf.h| 2 ++
linux-user/elfload.c | 23 ++
linux-user/main.c| 86
For tilegx, several syscall macros are not supported, so switch them to
avoid building break.
Signed-off-by: Chen Gang
---
linux-user/syscall.c | 50 +-
1 file changed, 49 insertions(+), 1 deletion(-)
diff --git a/linux-user/syscall.c b/linux
After load elf64 binary, qemu tilegx can finish executing the first
system call (uname) successfully in _dl_discover_osversion(), and
return to __libc_start_main().
Chen Gang (6):
target-tilegx: Firstly add TILE-Gx with minimized features
linux-user: tilegx: Firstly add architecture related
Sorry, I sent send the mail by my another mail address (it is incorrect).
I should send them again by my xili_gchen_5...@hotmail.com.
Thanks.
On 3/20/15 23:18, Chen Gang wrote:
> After load elf64 binary, qemu tilegx can finish executing the first
> system call (uname) successfu
On 3/21/15 01:48, Peter Maydell wrote:
> On 20 March 2015 at 15:25, Chen Gang wrote:
>> It is the configure and build system support for TILE-Gx (tilegx will be
>> used in configure and real sub-directory name).
>>
>> At present, it is linux-user only, and can f
On 3/21/15 01:03, Richard Henderson wrote:
> On 03/18/2015 07:04 PM, Chen Gang wrote:
>> For me, I am not quite sure about it, the related functional description
>> is:
>>
>> rf[Dest] = signExtend32 ((int32_t) rf[SrcA] * (int32_t) rf[SrcB]);
>>
>> Do y
On 3/21/15 01:45, Richard Henderson wrote:
> On 03/20/2015 08:25 AM, Chen Gang wrote:
>> +/*
>> + * The related functional description for bfextu in isa document:
>> + *
>> + * uint64_t mask = 0;
>> + * mask = (-1ULL) ^ ((-1ULL << ((BFEnd - BFStart
On 3/21/15 07:30, Peter Maydell wrote:
> On 20 March 2015 at 22:52, Chen Gang wrote:
>> On 3/21/15 01:48, Peter Maydell wrote:
>>> On 20 March 2015 at 15:25, Chen Gang wrote:
>>>> 10 files changed, 3523 insertions(+)
>>>
>>> If you have any p
After load elf64 binary, qemu tilegx can finish executing the first
system call (uname) successfully in _dl_discover_osversion(), and
return to __libc_start_main().
Chen Gang (12):
linux-user: tilegx: Firstly add architecture related features
linux-user: tilegx: Add target features support
They are based on Linux kernel tilegx architecture for 64 bit binary,
also based on tilegx ABI reference document.
Signed-off-by: Chen Gang
---
linux-user/tilegx/syscall.h| 80
linux-user/tilegx/syscall_nr.h | 278
linux-user/tilegx
They are for target features within qemu which independent from outside.
Signed-off-by: Chen Gang
---
linux-user/tilegx/target_cpu.h | 35 +++
linux-user/tilegx/target_signal.h | 28 ++
linux-user/tilegx/target_structs.h | 48
Add tilegx architecture in "syscall_defs.h", all related features (ioctrl,
and stat) are based on Linux kernel tilegx 64-bit implementation.
Signed-off-by: Chen Gang
---
linux-user/syscall_defs.h | 38 ++
1 file changed, 34 insertions(+), 4 deletion
Add main working flow feature, system call processing feature, and elf64
tilegx binary loading feature, based on Linux kernel tilegx 64-bit
implementation.
Signed-off-by: Chen Gang
---
include/elf.h| 2 ++
linux-user/elfload.c | 23 ++
linux-user/main.c| 86
For tilegx, several syscall macros are not supported, so switch them to
avoid building break.
Signed-off-by: Chen Gang
---
linux-user/syscall.c | 50 +-
1 file changed, 49 insertions(+), 1 deletion(-)
diff --git a/linux-user/syscall.c b/linux
Add related configuration, make files for tilegx.
Signed-off-by: Chen Gang
---
configure | 3 +++
default-configs/tilegx-linux-user.mak | 1 +
target-tilegx/Makefile.objs | 1 +
3 files changed, 5 insertions(+)
create mode 100644 default-configs/tilegx
It implements minimized cpu features for linux-user.
Signed-off-by: Chen Gang
---
target-tilegx/cpu-qom.h | 73
target-tilegx/cpu.c | 149
target-tilegx/cpu.h | 94 ++
3 files changed
For supporting linux-user system call, tilegx need support exception
helper features for it.
Signed-off-by: Chen Gang
---
target-tilegx/helper.c | 31 +++
target-tilegx/helper.h | 1 +
2 files changed, 32 insertions(+)
create mode 100644 target-tilegx/helper.c
It is from Tilera Corporation, and copied from Linux kernel "arch/tile/
include/uapi/arch/opcode_tilegx.h".
Signed-off-by: Chen Gang
---
target-tilegx/opcode_tilegx.h | 1406 +
1 file changed, 1406 insertions(+)
create mode 100644 tar
Finish processing tilegx bundle, and reach to related pipes. At present,
the qemu tilegx can pass building.
Signed-off-by: Chen Gang
---
target-tilegx/translate.c | 515 ++
1 file changed, 515 insertions(+)
create mode 100644 target-tilegx
For the instructions which need tcg generation, the decoding functions
return directly, or they will direct to the exception.
Signed-off-by: Chen Gang
---
target-tilegx/translate.c | 704 ++
1 file changed, 704 insertions(+)
diff --git a/target
Generate related tcg instructions, and qemu tilegx can run to 1st system
call (uname) successfully in _dl_discover_osversion(), and return to
__libc_start_main().
Signed-off-by: Chen Gang
---
target-tilegx/translate.c | 543 ++
1 file changed, 543
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