me i was
able to bring up vhost-net on 32-bit ARM.
Is there any work still needed on this ?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
ooks like i'm going to be the first to do this. I hope you'll
complete the
integration soon because vGICv3 has to be based upon your work.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
//lists.gnu.org/archive/html/qemu-devel/2015-05/msg01505.html
I added Shlomo to cc because he might also be interested.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
Hello! I have published v3 3 days ago, and got no single reply. Was it lost?
I've
(hopefully) done everything you asked for, and sent it using git send-email
from the
command line. So should work.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
{
ret = kvm_vm_ioctl(s, KVM_CREATE_IRQCHIP);
if (ret < 0) {
fprintf(stderr, "Create kernel irqchip failed\n");
return ret;
}
}
--- cut ---
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
want, i can post my patches as RFC, i think now they are
more or less
OK.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
k at kvmtool, how it determines these IDs. But hardcoded
scheme is
definitely wrong.
Cc'ed Ashok because he might also be interested.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
references to "GIC architecture reference manual v3.0", which i was
unable to find. On ARM resource center i see only v2 of the manual. And it
looks like you have it because otherwise you would not get description of many
registers. Can you point me at a correct place ?
Kind regards,
Pavel
igned-off-by: Shlomo Pongratz
Signed-off-by: Pavel Fedin
---
hw/arm/virt.c| 6 +-
target-arm/cpu-qom.h | 3 +++
target-arm/cpu.c | 17 +
target-arm/helper.c | 9 +++--
target-arm/kvm64.c | 25 +
target-arm/psci.c
users.
Signed-off-by: Pavel Fedin
---
hw/arm/virt.c | 148 +++-
include/hw/boards.h | 1 +
2 files changed, 123 insertions(+), 26 deletions(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index a1186c5..15724b2 100644
--- a/hw/arm/virt.c
tions,
i have absolutely nothing against Ashok's approach. I just did not change this
yet because it would affect my testing environment. The aim of this RFC is to
focus on vGICv3 implementation and related changes. And yes, i agree that v2 and
v3 now have some copypasted code, and this is T
Signed-off-by: Pavel Fedin
---
hw/arm/exynos4_boards.c | 1 +
hw/arm/realview.c | 1 +
hw/arm/vexpress.c | 1 +
3 files changed, 3 insertions(+)
diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c
index d644db1..d4136bc 100644
--- a/hw/arm/exynos4_boards.c
+++ b/hw/arm
- Make use of kernel_irqchip_type in kvm_arch_irqchip_create()
- Instantiate "kvm-arm-gicv3" class (not implemented yet) for GICv3 with KVM
acceleration
Signed-off-by: Pavel Fedin
---
hw/arm/virt.c| 6 ++
include/sysemu/kvm.h | 3 ++-
kvm-all.c| 2 +-
s
Get/put routines are missing. Live migration is not possible.
Signed-off-by: Pavel Fedin
---
hw/intc/Makefile.objs | 1 +
hw/intc/arm_gicv3_kvm.c | 283
2 files changed, 284 insertions(+)
create mode 100644 hw/intc/arm_gicv3_kvm.c
diff
rest of the code would be again tedious (either ugly
casts or
another qemu-style object pointer). So i disliked it too.
I do not post new vGICv3 implementation right now because it relies on
Shlomo's GICv3
code and waits for it to be integrated.
Signed-off-by: Pavel Fedin
---
hw/in
Hello!
> Please find some more comments inline.
Since there are notes about code style, i would add one more thing. structures
of v3
implementation keep old names (like GICState), and i would suggest to rename
these things
(like GICv3State) in order to avoid confusion.
Kind regards,
Pa
is never
initialized, it is
not even assigned property name. So just remove this small fragment, it's not
needed now.
I have fixed this in my working tree 2 hours ago. parent_fiq is declared as:
--- cut ---
qemu_irq parent_fiq[GICV3_NCPU];
--- cut ---
Kind regards,
Pavel Fedin
Expert En
use of them. So, enabling host notifiers does not
make sense
without guest ones.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
> -Original Message-
> From: qemu-devel-bounces+p.fedin=samsung@nongnu.org [mailto:qemu-devel-
> bounces+p.fedi
specified machine type limit" from qemu.
I believe there can be some fix, but it seems to require much more changes
than simply
subclassing a machine. Does it worth that? And, by the way, libvirt has now
added
recognition of "virt-" prefix too.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
w
one
another, and CONTROL area has peripherial IDs at the end, so we can perfectly
merge them.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
I
think ITS implementation will look best in a separate file, as a separate
device, similar
to GICv2m one. Actually, in device tree ITS is also a separate entity.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
tral like msi_phandle ? It
will also be
used by GICv3 ITS implementation.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
e it.
Ok, i will know this for the future. Actually i would like to wait for
Shlomo's patch
integration, because otherwise i violate the main rule "the patchset should
apply to
current master", and i believe it's not good to specify that "this patches
applies on top
of YYY
ople... I have recently sent a
email about
my findings regarding this and didn't cc: to you...
https://lists.gnu.org/archive/html/qemu-devel/2015-05/msg04842.html
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
Hi!
> > +static const uint8_t gic_lpi_ids[] = {
> > +0x44, 0x00, 0x00, 0x00, 0x093, 0xB4, 0x3B, 0x00, 0x0D, 0xF0, 0x05, 0xB1
> > +};
Found one more thing. Shouldn't there be 0x091 instead of 0x093 (5th byte =
PIDR0) ? 0x93
is ITS while REDIST is 0x91.
Kind rega
ller.
Yes, exactly. In my implementation being developed i actually reused first
patch from this set, and indeed 'v2m_handle' appeared to be useful for ITS. My
code flow is something like:
if (gicv3)
create_its()
else
create_v2m()
Kind regards,
Pavel Fedin
Expert Engineer
Samsu
_BZ GTI base.
0x5 GTI_CC GTI counter control.
0x6 GTI_CTL GTI control.
0x7 GTI_RD GTI counter read.
0x8 GTI_WC GTI watchdog control.
--- cut ---
Linaro guys (Peter, Eric, Christoffer, anyone), please judge us, who is
correct?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
arm in increasing v2m area.
P.S. And yes, VIRT_GIC_DIST_SPI should be VIRT_GIC_DIST_MBI instead
(Reviewed-by: Eric Auger ), just this fragment is from
my old integration branch, which i currently don't work on, because my new test
environment doesn't use GICv2 at all.
Kind regar
I do not see anything extra from PCIDevice * going through. I studied APIC
code, looks
like they encode all the stuff into MSI data.
Does this mean that qemu currently lacks support for device identifiers in MSI
?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
seem to have such thing as bus number,
therefore we
use only devfn. This is OK for platforms with only one PCI bus instance. Perhaps
additional property should be implemented when we emulate some GICv3-based
machine with
more than one bus.
Signed-off-by: Pavel Fedin
---
hw/pci/msix.c
GICv3 ITS distinguishes between devices by using hardwired device IDs passed on
the bus.
This patch implements passing these IDs in qemu.
SMMU is also known to use stream IDs, therefore this addition can also be
useful for
implementing platforms with SMMU.
Signed-off-by: Pavel Fedin
Reviewed
, because i think it's ready for application, but my
message
seems to have been lost. Looks like i forgot Cc to the maintainer. My current
vGICv3
work-in-progress is based on this.
If Shlomo does not respond until friday, i think i'll post a new vGICv3 series
based on
master.
Kind
x27;t
it ?
> I guess we should give people time to do the respin or other things.
I am giving it. A week has passed. Actually one of goals of my project here at
Samsung is
to upstream our changes, that's why i worry about it.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
locate name_no_array only once and not every time for every property (there
can be
thousands of them)
The modification decreases qemu startup time with 32 ARMv8 CPUs by a factor of
2 (~10 sec
vs ~20 sec).
Signed-off-by: Pavel Fedin
---
qom/object.c | 89 ++-
l
be the only change you need. It would default to 8 so that old machines don't
need to be
changed. But you could set it from inside virt before instantiating CPUs if you
want to
change it.
When CPUs are instantiated their IDs will be auto-generated from index (raw
order number)
a
sign, this is
why i made
my own solution. See kvm_arch_init_vcpu() in my patch - without this CPUs
beyond #7 will
not power up in KVM.
And when are you planning to post v3? I am waiting for it to be integrated, in
order to
add KVM vGICv3. Otherwise i'm afraid there are too many collisions.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
t; 0)
die("KVM_GET_ONE_REG failed (get_mpidr vcpu%ld", vcpu->cpu_id);
return mpidr;
}
--- cut ---
So i just decided to do the same thing in KVM. However, to tell the truth, i
actually do
not know whether it is possible to do it in reverse and assign MPIDR to VCPUs
using
KVM_SET_ONE_REG ioctl instead. I can try it if you think it's more appropriate.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
above 16 CPUs.
Yes, but fortunately the code which cares about it (PSCI and Shlomo's GICv3
software
emulation) is not used with KVM. So i think we have no other choice if we want
to be
compatible with current KVM APIs.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
hat PSCI accepts IDs set by qemu, but in this case
we would
have inconsistency between device tree and real IDs. And there seems to be no
way round.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
verted to something which KVM thinks must be. IIRC it is 16 CPUs per cluster,
starting from 0:0. So, currently you can do whatever you want only for TCG.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
This capability is useful to determine whether we can use KVM ITS
emulation on ARM
Signed-off-by: Pavel Fedin
---
include/sysemu/kvm.h | 9 +
kvm-all.c| 10 +-
2 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/include/sysemu/kvm.h b/include/sysemu
This temporary patch adds kernel API definitions. Use proper header update
procedure after these features are released.
Signed-off-by: Pavel Fedin
---
linux-headers/asm-arm64/kvm.h | 1 +
linux-headers/linux/kvm.h | 9 +++--
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a
/kvm/msg119567.html
Pavel Fedin (6):
kvm: Make KVM_CAP_SIGNAL_MSI globally available
hw/intc: Implement ITS base class
Add vGICv3 ITS definitions
kvm: Implement passing device ID to MSI routing functions
kvm_arm: Implement support for ITS emulation by KVM
arm/virt: Add ITS to the virt
Routing add/update functions now take additional PCIDevice pointer. Also,
in order to provide backwards compatibility with older kernels, a new
kvm_msi_flags global variable is provided, and machines, wishing to use
new MSI features, must set appropriates flags in it.
Signed-off-by: Pavel Fedin
This patch relies on new kernel API which is not released yet.
Signed-off-by: Pavel Fedin
---
hw/intc/Makefile.objs | 1 +
hw/intc/arm_gicv3_its_kvm.c | 88 +
2 files changed, 89 insertions(+)
create mode 100644 hw/intc/arm_gicv3_its_kvm.c
If supported by the configuration, ITS will be added automatically.
This patch also renames v2m_phandle to msi_phandle because it's now used
by both MSI implementations.
Signed-off-by: Pavel Fedin
---
hw/arm/virt.c | 47 +--
1 file change
This is the basic skeleton for both KVM and software-emulated ITS.
Currently it is mostly a placeholder, however in future it is going to
contain device state necessary for live migration
Signed-off-by: Pavel Fedin
---
hw/intc/Makefile.objs | 1 +
hw/intc
Hello! I have some strange problems, my emails don't make it to the list.
Please ignore this, i am
self-testing.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
it resets its MPIDR value to something that it wants it to be. IIRC
the hardcoded
assignment is 16 CPUs per cluster starting from 0:0.
I have some strange problem with delivering mails, my emails do not seem to
make it to the list.
Please reply me privately if you got this.
Kind regards,
not go to the list indeed... Don't understand why.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
Just a test, please ignore.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
during machine model creation. And this has nothing to do with
KVM. KVM code is executed after default MPIDR is assigned and overrides IDs
with whatever it gets from the kernel. All you can do with current kernels is
to patch device tree with new IDs.
Kind regards,
Pavel Fedin
Expert Enginee
This actually implements pre_save and post_load methods for in-kernel
vGICv3.
Signed-off-by: Pavel Fedin
---
hw/intc/arm_gicv3_kvm.c | 391 +++-
1 file changed, 387 insertions(+), 4 deletions(-)
diff --git a/hw/intc/arm_gicv3_kvm.c b/hw/intc
This temporary patch adds kernel API definitions. Use proper header update
procedure after these features are released.
Signed-off-by: Pavel Fedin
---
linux-headers/asm-arm64/kvm.h | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/linux-headers/asm-arm64/kvm.h b
software emulation of GICv3
with v2 backwards compatilibity mode.
Signed-off-by: Pavel Fedin
---
hw/intc/arm_gicv3_common.c | 135 +++-
hw/intc/gicv3_internal.h | 152 +
include/hw/intc/arm_gicv3_common.h | 76
Add state structure descriptors and actually enable live migration.
Signed-off-by: Pavel Fedin
---
hw/intc/arm_gicv3_common.c | 64 +-
1 file changed, 63 insertions(+), 1 deletion(-)
diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc
er.
Since 'long' maps to something, i think that adding a specific code for it
would be too much anyway. May be add configure test for sizeof(long) ?
Pavel Fedin (4):
hw/intc/arm_gicv3_common: Add state information
kernel: Add definitions for GICv3 attributes
hw/intc/arm_gicv3_kvm: Im
-safe version. However, the code seems not to modify objects via
these functions.
Signed-off-by: Pavel Fedin
---
include/qom/object.h | 4 +--
qmp.c| 8 +++--
qom/object.c | 98 +++-
vl.c | 4 ++-
4 files ch
hugetlbfs mountpoint.
Signed-off-by: Damien Millescamps
Signed-off-by: Pavel Fedin
---
2 years passed since the last review of this, and the original author never
came back. So i decided
to pick up this work because my project is interested in this feature. I am
keeping patch version
numberin
Hello!
> Shouldn't this help similarly with the problem that 94649d423e worked
> around? (Although that patch has standalone merits of course.)
Yes, and also 6c76b37742d4db8176af37b667b5420727e79e2c.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
-safe version. However, the code seems not to modify objects via
these functions.
Signed-off-by: Pavel Fedin
---
v1 => v2:
- Fixed stupid bug in object_unparent(), use correct object
---
include/qom/object.h | 4 +--
qmp.c| 8 +++--
qom/object.c
//github.com/GNOME/glib/blob/master/glib/ghash.c#L212
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
Knock-knock!
PM: I remember we had a talk that we should settle down on migration data
format. Isn't it right
time?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
> -Original Message-
> From: qemu-devel-bounces+p.fedin=samsung
6219.html
http://www.spinics.net/lists/kvm/msg120483.html
http://www.spinics.net/lists/kvm-arm/msg16351.html
http://www.spinics.net/lists/kvm/msg121588.html
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
Hello!
> Nudge -- have you reported this as a kernel bug against the
> PCI generic driver yet?
Sorry, stopped tracking this topic after option upstreaming. Just sent out
patches, cc'ed to you.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
to
happen? I see there's some strong authorship-related conflict around it.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
series. I have seen that "ivshmem can now use host memory backend", but how
to set it up? I checked documentation patch, did not find good explanation
there. But, well, programmers never read docs :)
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
, i'm not really familiar in hugetlb
details. I only know that managing huge pages is done via hugetlbfs.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
the series?"
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
ke GIC_TEST_xxx, and cpu mask is always (1 << ncpu). So, can we safely
replace mask with just CPU number in these macros? It would solve the problem.
Shlomo, your word?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
Hello!
> One of the major problems with the emulation code is that it tried
> to keep the old GICv2 emulation datastructures, macros, etc. Don't
> try to use it as a guide for how to arrange the data structures.
Ok. I will redo this after finishing kernel API respin.
Kind regard
ion with my standalone patch, but i have checked
your series, it also doesn't touch SPAPR code.
Tested-by: Igor Skalkin
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
Hello!
> -Original Message-
> From: Daniel P. Berrange [mailto:berra...@redhat.com]
> Sent: Thursday, October 08, 2015 5:09 PM
> To: qemu-devel@nongnu.org
> Cc: Andreas Färber; Pavel Fedin; Daniel P. Berrange
> Subject: [PATCH v3 4/5] qom: replace object property li
This allows to override default affinity IDs on a per-machine basis, and
possibility to retrieve IDs will be used by vGICv3 live migration code.
Signed-off-by: Pavel Fedin
---
Since this popped up several times on the mailing list, i decided to publish
this early.
---
target-arm/cpu.c | 1 +
1
the same reason, we cannot also exchange data between host and VM.
Is it a flaw or do we just do something wrong?
Tested-by: Igor Skalkin
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
ve
your single-line-authorship conflict and get this awesome work in master. If i
have the authority, then...
Acked-by: Pavel Fedin
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
g thoroughly, but IIRC he did the same change some
time ago, which got drowned in reviewers' mailbox. Just pick it up with his
authorship and make a peace finally :)
> > Acked-by: Pavel Fedin
>
> Do you want me to ack every commit? I guess it's enought as a overal
is passed from outside,
and not file name, isn't it?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
t versions of my GICv3 patches did use own #define,
but i was criticized for using GICV3_INTERNAL in my code and having
GIC_INTERNAL in kvm_arm_gic_set_irq(), which is shared by both KVM
implementations. So, i decided to use GIC_INTERNAL everywhere and inherited it
from v2.
Kind regards,
Pavel
ze()).
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
new option to enable the
> state, so that old clients will never see the state and new clients have
> expressed their interest in the state
With this kind of approach we would not be able to migrate ITS without this
option. Because it's not external clients being interested in th
This allows to signal migration notifiers that the migration has entered
final phase. The condition is set after vm_stop_force_state().
This will be necessary for ITS live migration on ARM, which will have to
dump its state into guest RAM at this point.
Signed-off-by: Pavel Fedin
---
include
igh, and not
everyone wants to get it.
> (Everything should still be cc'd to qemu-devel as well.)
I would drop this requirement, except for stuff which could touch core
functionality (qom, qobject).
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
Hello!
> > I can further test cases to do more coverage of object proprty handling
> > wrt to classes, if you want me to.
>
> No, if that is sorted out now, I'll drop v2 and need to review v4.
How is it? Any problems / advancements? Could i help somehow?
Kind rega
Hello!
> > include/hw/cpu/arm.h | 308
> > +++
>
> I think this would be hw/arm/cpu.h
Sorry for split-reply, forgot to look at this...
include/hw/arm is for board classes, isn't it?
Kind regards,
Pavel Fedin
rface.
Huh, indeed, it's so simple... I failed to notice this.
Peter, what do you think, if we indeed simply move gicv3 implementation from
common-obj-y to obj-y?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
behaves in the same way as if CONFIG_NUMA
was not defined. qemu will still fail if the user specifies some other
policy, so that the user knows it.
Signed-off-by: Pavel Fedin
---
backends/hostmem.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/backends/hostmem.c b/backends
Sorry, guys, i forgot to add "v2" and simply sent the mail. Log is:
v1 => v2:
- Removed unnecessary parenthesis
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
> -Original Message-
> From: qemu-devel-bounces+p.fedin=sam
behaves in the same way as if CONFIG_NUMA
was not defined. qemu will still fail if the user specifies some other
policy, so that the user knows it.
Signed-off-by: Pavel Fedin
---
backends/hostmem.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/backends/hostmem.c b/backends
anonymous. This is not very useful with ivshmem because it ends up in a
memory which cannot be accessed by something else.
Signed-off-by: Pavel Fedin
Tested-by: Igor Skalkin
---
backends/hostmem-file.c | 26 +-
exec.c | 36
Hello!
> If it is truly internal, then avoiding exposing the state to external
> clients is indeed the way to go.
Already done:
http://lists.nongnu.org/archive/html/qemu-devel/2015-10/msg06262.html, you
should have received it too.
Kind regards,
Pavel Fedin
Expert Engineer
S
ssible, because: a) we want to reduce amount of out-of-tree
patches for our project; b) these things affect qemu
core code, and upstreaming them makes sure that we do it right, and our
out-of-tree code will not diverge from the upstream too
much.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Elect
oblem. :)
So, Peter C, what is your final decision?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
dded afterwards, if necessary? Anyway,
my fix does not break anything (i hope).
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
g
> their obj-y privileges to access it.
Ok, so decided. I will convert my code, test the build and send a small patch
for this soon, perhaps today.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
ar thing to me, and
i silently agreed.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
pathname.
Signed-off-by: Pavel Fedin
Tested-by: Igor Skalkin
---
v1 => v2:
- Changed title to more generic one
- Do not introduce new property, check whether the given path is a
directory instead
---
exec.c| 34 +-
qemu-doc.texi | 2 +-
2 files changed,
re normally large (about 640K on my VM), but extremely sparse. So the
actually modified space during this callback would be
several pages, unlikely more.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
1 - 100 of 511 matches
Mail list logo
