Hello! > The value is taken from the gic-500 document in the re-distributer's table > (3-7). > I don't know where the value 0x91 comes from as GICD_PIDR0 is 0x92, > GICR_PIDR0 is 0x93 and > GITS_PIDR0 is 0x94. > In the GICv3 document section 5.4.21 it is also been written: > 0xFFE0 GICR_PIDR0 Bits [7:0]. Bits [7:0] of the ARM-defined DevID field. > This field is 0x93 in > ARM implementations of a GICv3 or later Re-distributor.
Hm, very interesting... Actually i still don't have architecture reference manual for GICv3. It's too slow and problematic to request it in a big company because of bureaucracy issues. :) So try to get around with: a) Linux source code. b) GIC-500 tech reference manual (from ARM InfoCenter) c) Hardware manual for my board (which seems to contain a part from arch manual, with all registers described). It's also under NDA, so i can't quote too much :) The doc (c) has this table regarding PIDR0[7:0] values for various things: --- cut --- PCC PIDR Part Number 0 Enumeration PCC_PIDR_PARTNUM0_E 0x0 NONE Reserved. 0x1 GICR GIC redistributor. 0x2 GICD GIC distributor. 0x3 GITS GIC ITS. 0x4 GTI_BZ GTI base. 0x5 GTI_CC GTI counter control. 0x6 GTI_CTL GTI control. 0x7 GTI_RD GTI counter read. 0x8 GTI_WC GTI watchdog control. --- cut --- Linaro guys (Peter, Eric, Christoffer, anyone), please judge us, who is correct? Kind regards, Pavel Fedin Expert Engineer Samsung Electronics Research center Russia
