Signed-off-by: Paulo Alcantara
---
tests/Makefile | 2 +
tests/tco-test.c | 252 +++
2 files changed, 254 insertions(+)
create mode 100644 tests/tco-test.c
diff --git a/tests/Makefile b/tests/Makefile
index 729b969..43950d0 100644
--- a
SMIs (NMI2SMI_EN bit), system intruder
detection (TCO interrupt due to INTRUDER# signal), etc. are not
implemented yet.
Signed-off-by: Paulo Alcantara
---
hw/acpi/Makefile.objs | 1 +
hw/acpi/ich9.c | 36 +
hw/acpi/tco.c
This patch initialises root complex register block BAR in order to
support TCO watchdog emulation features on QEMU.
Signed-off-by: Paulo Alcantara
---
src/fw/dev-q35.h | 3 +++
src/fw/pciinit.c | 4
2 files changed, 7 insertions(+)
diff --git a/src/fw/dev-q35.h b/src/fw/dev-q35.h
index
Signed-off-by: Paulo Alcantara
---
hw/i386/acpi-dsdt-pdrc.dsl| 46 ++
hw/i386/q35-acpi-dsdt.dsl | 1 +
tests/acpi-test-data/q35/DSDT | Bin 7666 -> 7795 bytes
3 files changed, 47 insertions(+)
create mode 100644 hw/i386/acpi-dsdt-pdrc.dsl
d
m intruder detection,
etc. are not implemented yet.
Signed-off-by: Paulo Alcantara
---
hw/acpi/Makefile.objs | 1 +
hw/acpi/ich9.c | 36 ++
hw/acpi/tco.c | 188 +
hw/isa/lpc_ich9.c | 10 +++
include/hw/acpi/ic
Signed-off-by: Paulo Alcantara
---
tests/Makefile | 2 +
tests/tco-test.c | 347 +++
2 files changed, 349 insertions(+)
create mode 100644 tests/tco-test.c
diff --git a/tests/Makefile b/tests/Makefile
index 729b969..43950d0 100644
--- a
On Wed, 27 May 2015 14:03:59 +0200
Paolo Bonzini wrote:
>
>
> On 27/05/2015 02:29, Paulo Alcantara wrote:
> > Signed-off-by: Paulo Alcantara
> > ---
> > hw/i386/acpi-dsdt-pdrc.dsl| 46
> > ++
>
> Why pdrc
> +{
> > +return 6LL;
> > +}
> > +
> > +static inline int is_valid_tco_time(uint32_t val)
> > +{
> > +/* values of 0 or 1 will be ignored by ICH */
> > +return val > 1;
> > +}
> > +
> > +static inline int can_start_tco_timer(TCOIORegs *tr)
> > +{
> > +return !(tr->tco.cnt1 & TCO_TMR_HLT) &&
> > is_valid_tco_time(tr->tco.tmr); +}
>
> These three inlines should be in the .c file.
OK.
>
> Don't be discouraged by the comments. It's good work!
Alright. Thank you for the comments! I'll send a v2 soon.
Paulo
--
Paulo Alcantara, C.E.S.A.R
Speaking for myself only.
n in ICH9 spec, it seems safe
to use that MMIO region for the 16KiB of chipset configuration
registers.
> Or is the firmware free to choose it?
Given that, I would say so.
Thanks,
Paulo
--
Paulo Alcantara, C.E.S.A.R
Speaking for myself only.
m intruder detection,
etc. are not implemented yet.
v1 -> v2:
* add migration support for TCO I/O device state
* wake up only when total time expired instead of every 0.6s
* some cleanup suggested by Paolo Bonzini
Signed-off-by: Paulo Alcantara
---
hw/acpi/Makefile.objs | 2 +-
h
v1 -> v2:
* s/PDRC/CCR/ for clarity and match ICH9 spec
* remove unnecessary OperationRegion for RCRB
Signed-off-by: Paulo Alcantara
---
hw/i386/q35-acpi-dsdt.dsl | 14 ++
tests/acpi-test-data/q35/DSDT | Bin 7666 -> 7723 bytes
2 files changed, 14 insertions(+)
diff
v1 -> v2:
* some cleanup
* added test for TCO_LOCK bit
Signed-off-by: Paulo Alcantara
---
tests/Makefile | 2 +
tests/tco-test.c | 419 +++
2 files changed, 421 insertions(+)
create mode 100644 tests/tco-test.c
diff --git a/te
On Wed, 24 Jun 2015 17:11:26 +0200
"Michael S. Tsirkin" wrote:
> On Mon, Jun 22, 2015 at 08:10:28PM -0300, Paulo Alcantara wrote:
> > This block is mapped into memory space, using the Root Complex Base
> > Address (RCBA) register of the PCI-to-LPC bridge. Accesses
m intruder detection,
etc. are not implemented yet.
Signed-off-by: Paulo Alcantara
---
v1 -> v2:
* add migration support for TCO I/O device state
* wake up only when total time expired instead of every 0.6s
* some cleanup suggested by Paolo Bonzini
v2 -> v3:
* set SECOND_TO_STS and
6) set and get of TCO control and status bits
Signed-off-by: Paulo Alcantara
---
v1 -> v2:
* some cleanup
* add test for TCO_LOCK bit
v2 -> v3:
* add tests for TCO control & status bits
* fix check of SECOND_TO_STS bit (it's set in TCO2_STS reg)
v3 -> v4:
* add m
m intruder detection,
etc. are not implemented yet.
Signed-off-by: Paulo Alcantara
---
v1 -> v2:
* add migration support for TCO I/O device state
* wake up only when total time expired instead of every 0.6s
* some cleanup suggested by Paolo Bonzini
v2 -> v3:
* set SECOND_TO_STS and
6) set and get of TCO control and status bits
Signed-off-by: Paulo Alcantara
---
v1 -> v2:
* some cleanup
* add test for TCO_LOCK bit
v2 -> v3:
* add tests for TCO control & status bits
* fix check of SECOND_TO_STS bit (it's set in TCO2_STS reg)
v3 -> v4:
* add m
pled low by default.
Signed-off-by: Paulo Alcantara
---
hw/acpi/tco.c | 3 ++-
hw/isa/lpc_ich9.c | 38 ++
include/hw/i386/ich9.h | 11 +++
3 files changed, 51 insertions(+), 1 deletion(-)
diff --git a/hw/acpi/tco.c b/hw/acpi/tco.c
ind
Looks like RCBA was confused by either RBCA (Receive Broadcast Packet,
TSEC), or they were all just typos.
This patch changes all incorrect namings from RBCA to RCBA.
Signed-off-by: Paulo Alcantara
---
hw/isa/lpc_ich9.c | 32
include/hw/i386/ich9.h | 2
On Sun, 28 Jun 2015 10:37:58 +0200
"Michael S. Tsirkin" wrote:
> On Sat, Jun 27, 2015 at 02:56:33PM -0300, Paulo Alcantara wrote:
> > If the signal is sampled high, this indicates that the system is
> > strapped to the "No Reboot" mode (ICH9 will disable the
ampled high by
default.
Signed-off-by: Paulo Alcantara
---
v7 -> v8:
* change property name to "noreboot"
* default "noreboot" property to high
* define property in dc->props
* update tco tests to support and exercise "noreboot" property
---
hw/acpi/tco.
6) set and get of TCO control and status bits
Signed-off-by: Paulo Alcantara
---
v1 -> v2:
* some cleanup
* add test for TCO_LOCK bit
v2 -> v3:
* add tests for TCO control & status bits
* fix check of SECOND_TO_STS bit (it's set in TCO2_STS reg)
v3 -> v4:
* add m
m intruder detection,
etc. are not implemented yet.
Signed-off-by: Paulo Alcantara
---
v1 -> v2:
* add migration support for TCO I/O device state
* wake up only when total time expired instead of every 0.6s
* some cleanup suggested by Paolo Bonzini
v2 -> v3:
* set SECOND_TO_STS and
On Wed, 1 Jul 2015 15:31:31 +0200
"Michael S. Tsirkin" wrote:
> On Wed, Jul 01, 2015 at 03:18:41PM +0200, Paolo Bonzini wrote:
> >
> >
> > On 28/06/2015 19:58, Paulo Alcantara wrote:
> > > If the signal is sampled high, this indicates that the system i
On Mon, June 1, 2015 4:16 am, Gerd Hoffmann wrote:
> On Sa, 2015-05-30 at 07:57 -0300, Paulo Alcantara wrote:
>> Hi Gerd,
>>
>> On Thu, 28 May 2015 09:13:35 +0200
>> Gerd Hoffmann wrote:
>>
>> > > +Scope(\_SB) {
>> > > +OperationRegion
On Mon, June 1, 2015 6:05 am, Paolo Bonzini wrote:
>
>
> On 31/05/2015 00:04, Paulo Alcantara wrote:
>> +case TCO_RLD:
>> +tr->timeouts_no = 0;
>> +if (can_start_tco_timer(tr)) {
>> +tr->tco.rld = tr->tco.tmr;
>> +
On Mon, 1 Jun 2015 10:38:32 -0300
"Paulo Alcantara" wrote:
> On Mon, June 1, 2015 6:05 am, Paolo Bonzini wrote:
> >
> >
> > On 31/05/2015 00:04, Paulo Alcantara wrote:
> >> +case TCO_RLD:
> >> +tr->timeouts_no = 0;
> >>
rove handling of TCO_LOCK bit in TCO1_CNT register
Signed-off-by: Paulo Alcantara
---
hw/acpi/Makefile.objs | 2 +-
hw/acpi/ich9.c | 59
hw/acpi/tco.c | 254 +
hw/isa/lpc_ich9.c | 10 ++
include/hw/acpi/ich9.h
v1 -> v2:
* s/PDRC/CCR/ for clarity and match ICH9 spec
* remove unnecessary OperationRegion for RCRB
Signed-off-by: Paulo Alcantara
---
hw/i386/q35-acpi-dsdt.dsl | 14 ++
tests/acpi-test-data/q35/DSDT | Bin 7666 -> 7723 bytes
2 files changed, 14 insertions(+)
diff
v1 -> v2:
* some cleanup
* add test for TCO_LOCK bit
v2 -> v3:
* add tests for TCO control & status bits
* fix check of SECOND_TO_STS bit (it's set in TCO2_STS reg)
Signed-off-by: Paulo Alcantara
---
tests/Makefile | 2 +
tests/t
This patch initialises root complex register block BAR in order to
support TCO watchdog emulation features (e.g. reboot upon NO_REBOOT bit
not set) on QEMU.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Paulo Alcantara
---
OvmfPkg/Include/IndustryStandard/Q35MchIch9.h
On Sat, 06 Jun 2015 22:13:21 -0700
Jordan Justen wrote:
> On 2015-06-06 12:10:03, Paulo Alcantara wrote:
> > This patch initialises root complex register block BAR in order to
> > support TCO watchdog emulation features (e.g. reboot upon NO_REBOOT
> > bit not set) on QEMU.
This patch initialises root complex register block BAR in order to
support TCO watchdog emulation features (e.g. reboot upon NO_REBOOT bit
not set) on QEMU.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Paulo Alcantara
---
OvmfPkg/Include/IndustryStandard/Q35MchIch9.h
On Mon, 08 Jun 2015 11:06:40 +0200
Laszlo Ersek wrote:
> On 06/06/15 21:10, Paulo Alcantara wrote:
> > This patch initialises root complex register block BAR in order to
> > support TCO watchdog emulation features (e.g. reboot upon NO_REBOOT
> > bit not set) on QEMU.
>
This patch initialises root complex register block BAR in order to
support TCO watchdog emulation features (e.g. reboot upon NO_REBOOT bit
not set) on QEMU.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Paulo Alcantara
---
OvmfPkg/Include/IndustryStandard/Q35MchIch9.h
This patch initialises root complex register block BAR in order to
support TCO watchdog emulation features (e.g. reboot upon NO_REBOOT bit
not set) on QEMU.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Paulo Alcantara
---
OvmfPkg/Include/IndustryStandard/Q35MchIch9.h
On Tue, 09 Jun 2015 01:09:19 +0200
Laszlo Ersek wrote:
> On 06/09/15 00:49, Jordan Justen wrote:
> > On 2015-06-08 15:07:13, Paulo Alcantara wrote:
> >> This patch initialises root complex register block BAR in order to
> >> support TCO watchdog emulation
This patch initialises root complex register block BAR in order to
support TCO watchdog emulation features (e.g. reboot upon NO_REBOOT bit
not set) on QEMU.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Paulo Alcantara
---
OvmfPkg/Include/IndustryStandard/Q35MchIch9.h
Make HostBridgeDevId global so MemMapInitialization() can also use it to
conditionally add RCRB MMIO address to HOB.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Paulo Alcantara
---
OvmfPkg/PlatformPei/Platform.c | 17 +++--
1 file changed, 11 insertions
On Mon, June 1, 2015 8:48 pm, Paulo Alcantara wrote:
> This interface provides some registers within a 32-byte range and can be
> acessed through PCI-to-LPC bridge interface (PMBASE + 0x60).
>
> It's commonly used as a watchdog timer to detect system lockups through
> SMIs that
This patch initialises root complex register block BAR in order to
support TCO watchdog emulation features on QEMU.
Cc: Kevin O'Connor
Cc: Gerd Hofmann
Cc: Paolo Bonzini
Signed-off-by: Paulo Alcantara
---
v1 -> v2:
- reserve RCBA address via e820 map
---
src/fw/dev-q35.h | 3 +++
By declaring another .subsections array for vmstate_tco_io_state made
vmstate_memhp_state not registered anymore. There must be only one
.subsections array for all subsections.
Cc: Michael S. Tsirkin
Cc: Amit Shah
Reported-by: Amit Shah
Signed-off-by: Paulo Alcantara
---
hw/acpi/ich9.c | 3
On Tue, 14 Jul 2015 15:55:24 +0200
Gerd Hoffmann wrote:
> On Do, 2015-07-09 at 21:04 -0300, Paulo Alcantara wrote:
> > This patch initialises root complex register block BAR in order to
> > support TCO watchdog emulation features on QEMU.
>
> qemu patches are merged, commi
On Wed, 17 Jun 2015 15:27:53 +0200
"Michael S. Tsirkin" wrote:
> On Mon, Jun 01, 2015 at 08:48:39PM -0300, Paulo Alcantara wrote:
> > This interface provides some registers within a 32-byte range and
> > can be acessed through PCI-to-LPC bridge interface (PMBASE + 0x60
On Wed, 17 Jun 2015 15:33:07 +0200
"Michael S. Tsirkin" wrote:
> On Mon, Jun 01, 2015 at 08:48:40PM -0300, Paulo Alcantara wrote:
> > v1 -> v2:
> > * s/PDRC/CCR/ for clarity and match ICH9 spec
> > * remove unnecessary OperationRegion for RCRB
>
> cha
On Wed, 17 Jun 2015 15:37:49 +0200
"Michael S. Tsirkin" wrote:
> On Mon, Jun 01, 2015 at 08:48:41PM -0300, Paulo Alcantara wrote:
> > v1 -> v2:
> > * some cleanup
> > * add test for TCO_LOCK bit
> > v2 -> v3:
> > * add tests for TCO control
-by: Paulo Alcantara
---
v1 -> v2:
* s/PDRC/CCR/ for clarity and match ICH9 spec
* remove unnecessary OperationRegion for RCRB
v2 -> v3: (no changes)
v3 -> v4:
* quote RCRB description from ICH9 spec to commit log
* fix indentation issue in _CRS() method declaration
* create hw/
m intruder detection,
etc. are not implemented yet.
Signed-off-by: Paulo Alcantara
---
v1 -> v2:
* add migration support for TCO I/O device state
* wake up only when total time expired instead of every 0.6s
* some cleanup suggested by Paolo Bonzini
v2 -> v3:
* set SECOND_TO_STS and
6) set and get of TCO control and status bits
Signed-off-by: Paulo Alcantara
---
v1 -> v2:
* some cleanup
* add test for TCO_LOCK bit
v2 -> v3:
* add tests for TCO control & status bits
* fix check of SECOND_TO_STS bit (it's set in TCO2_STS reg)
v3 -> v4:
* add m
On Mon, June 22, 2015 5:39 am, Michael S. Tsirkin wrote:
> On Sun, Jun 21, 2015 at 09:37:01PM -0300, Paulo Alcantara wrote:
>> diff --git a/hw/acpi/tco.c b/hw/acpi/tco.c
>> new file mode 100644
>> index 000..b6af1d9
>> --- /dev/null
>> +++
ernal project that needed TCO
to generate SMI so that my registered SW SMI handler in firmware would get
executed. If, at that time, I had it supported on QEMU that would
certainly have saved a lot of time instead testing it on bare hardware :-)
Given that, I think it's OK for me to enable it by default on pc-q35-2.4
and later.
Thanks,
Paulo
--
Paulo Alcantara, C.E.S.A.R
Speaking for myself only.
On Mon, June 22, 2015 5:40 am, Michael S. Tsirkin wrote:
> On Sun, Jun 21, 2015 at 09:37:02PM -0300, Paulo Alcantara wrote:
>> This block is mapped into memory space, using the Root Complex Base
>> Address (RCBA) register of the PCI-to-LPC bridge. Accesses in this space
>>
Besides, the rule you want is not enforceable because Fabrice Bellard
>> explicitly wanted TCG-related files to be BSD.
>>
>> Paolo
>
> It's not a big deal, but it's preferable if possible.
> Paulo do you have a problem switching to GPLv2+?
Hi Michael,
No, I r
On Sun, June 21, 2015 9:37 pm, Paulo Alcantara wrote:
> This interface provides some registers within a 32-byte range and can be
> acessed through PCI-to-LPC bridge interface (PMBASE + 0x60).
>
> It's commonly used as a watchdog timer to detect system lockups through
> SMI
-by: Paulo Alcantara
---
v1 -> v2:
* s/PDRC/CCR/ for clarity and match ICH9 spec
* remove unnecessary OperationRegion for RCRB
v2 -> v3: (no changes)
v3 -> v4:
* quote RCRB description from ICH9 spec to commit log
* fix indentation issue in _CRS() method declaration
* create hw/
m intruder detection,
etc. are not implemented yet.
Signed-off-by: Paulo Alcantara
---
v1 -> v2:
* add migration support for TCO I/O device state
* wake up only when total time expired instead of every 0.6s
* some cleanup suggested by Paolo Bonzini
v2 -> v3:
* set SECOND_TO_STS and
6) set and get of TCO control and status bits
Signed-off-by: Paulo Alcantara
---
v1 -> v2:
* some cleanup
* add test for TCO_LOCK bit
v2 -> v3:
* add tests for TCO control & status bits
* fix check of SECOND_TO_STS bit (it's set in TCO2_STS reg)
v3 -> v4:
* add m
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