On 2013-04-16 00:12, Igor Mammedov wrote:
> Implements alternative way for hot-adding CPU using cpu-add QMP command,
> wich could be useful until it would be possible to add CPUs via device_add.
Didn't track the full story: What prevents currently a device_add
approach? And that so effectively tha
On 2013-04-16 12:19, 李春奇 wrote:
> I looked up Intel manual for VM instruction error. Error number 7 means "VM
> entry with invalid control field(s)", which means in process of VM
> switching some control fields are not properly configured.
>
> I wonder why some emulated CPUs (e.g.Nehalem) can run
On 2013-04-17 10:39, Liu Ping Fan wrote:
> From: Liu Ping Fan
>
> Slirp and its peer can run on different context at the same time.
> Using lock to protect
What are the usage rules for this lock, what precisely is it protecting?
Is it ensured that we do not take the BQL while holding this one?
On 2013-04-17 10:39, Liu Ping Fan wrote:
> From: Liu Ping Fan
>
> slirps will run on dedicated thread, so need to protect the global
> list.
>
> Signed-off-by: Liu Ping Fan
> ---
> include/qemu/module.h |2 ++
> slirp/slirp.c | 20
> 2 files changed, 22 inser
On 2013-04-19 02:18, liu ping fan wrote:
> On Thu, Apr 18, 2013 at 3:13 PM, Jan Kiszka wrote:
>> On 2013-04-17 10:39, Liu Ping Fan wrote:
>>> From: Liu Ping Fan
>>>
>>> Slirp and its peer can run on different context at the same time.
>>> Using lock
On 2013-04-16 09:42, Gerd Hoffmann wrote:
> On 04/10/13 10:31, Jan Kiszka wrote:
>> On 2013-04-03 13:50, Gerd Hoffmann wrote:
>>> Hi,
>>>
>>>>> No, it is not, and yes, this is where the inconsistency comes
>>>>> from. We read wred+wgree
On 2012-07-27 17:02, Paolo Bonzini wrote:
> By first resetting the devices, lsi_soft_reset will find the queue
> already cleared so there is no need to do that forcibly (which may also
> leak SCSIRequests, and/or worse due to dangling references to the
> lsi_request in the hba_private field).
>
>
On 2013-04-23 18:43, Paolo Bonzini wrote:
> Il 23/04/2013 18:13, Paolo Bonzini ha scritto:
>> Il 23/04/2013 10:47, Jan Kiszka ha scritto:
>>>>> if (val & LSI_ISTAT0_SRST) {
>>>>> -lsi_soft_reset(s);
>>>>> +
On 2013-04-23 19:26, Peter Maydell wrote:
> On 23 April 2013 18:14, Paolo Bonzini wrote:
>> Il 23/04/2013 19:06, Peter Maydell ha scritto:
> /*
> + * memory_region_get_address: get current the address of a region
> + *
> + * Returns the absolute address of a region.
> + * May
port MP state. This assumption is not true anymore.
>
> Let's split up the two cases into two different variables. That way
> PPC can expose an in-kernel PIC, while not implementing MP state.
>
> Signed-off-by: Alexander Graf
> CC: Jan Kiszka
> ---
> cp
port MP state. This assumption is not true anymore.
>
> Let's split up the two cases into two different variables. That way
> PPC can expose an in-kernel PIC, while not implementing MP state.
>
> Signed-off-by: Alexander Graf
> CC: Jan Kiszka
>
> ---
>
> v1
On 2013-04-25 18:46, Alexander Graf wrote:
>
> On 25.04.2013, at 18:13, Jan Kiszka wrote:
>
>> On 2013-04-25 11:06, Alexander Graf wrote:
>>> On PPC, we don't support MP state. So far it's not necessary and I'm
>>> not convinced yet that we real
:omap_i2c_send: assertion failed: ((data & OMAP_I2C_CON_STP)
!= 0)
when sending an address word to the EEPROM.
Jan Kiszka (2):
i2c: Introduce device address mask
Add AT24Cxx I2C EEPROM device model
hw/arm/pxa2xx.c|3 +-
hw/arm/tosa.c |2 +-
hw/arm/z2.c|
backing block device. Device addresses are built from the device
number property. Write protection can be configured by declaring the
block device read-only.
Signed-off-by: Jan Kiszka
---
hw/nvram/Makefile.objs |2 +-
hw/nvram/at24.c| 347
one. Moreover,
the transmitted address is passed as additional parameter to the event
callback of the device.
Signed-off-by: Jan Kiszka
---
hw/arm/pxa2xx.c |3 ++-
hw/arm/tosa.c|2 +-
hw/arm/z2.c |2 +-
hw/audio/wm8750.c|2 +-
hw/display/ssd0303.c |2
On 2013-04-26 14:16, Peter Crosthwaite wrote:
> Hi Jan,
>
> On Fri, Apr 26, 2013 at 7:19 PM, Jan Kiszka wrote:
>> This implements I2C EEPROMs of the AT24Cxx series. Sizes from 1Kbit to
>> 1024Kbit are supported. Each EEPROM is backed by a block device. Its
>> size can
On 2014-06-12 04:27, Rusty Russell wrote:
> Henning Schild writes:
>> Hi,
>>
>> i am working on the jailhouse[1] project and am currently looking at
>> inter-VM communication. We want to connect guests directly with virtual
>> consoles based on shared memory. The code complexity in the hypervisor
On 2014-06-11 10:55, Samuel Thibault wrote:
> Before this patch, if sosendto fails, udp_input is executed as if the
> packet was sent. This could cause memory leak.
Cannot follow yet how this could leak (not saying I fully got what it
should NOT leak - nasty code). Can you elaborate on the before/
On 2014-05-28 01:10, Edgar E. Iglesias wrote:
> On Wed, May 14, 2014 at 01:22:25AM +, Edgar E. Iglesias wrote:
>> On Wed, May 14, 2014 at 03:13:09AM +0200, Samuel Thibault wrote:
>>> Do not special-case addresses with zero host part, as we do not
>>> necessarily know how big it is, and the gues
On 2014-06-13 02:47, Rusty Russell wrote:
> Jan Kiszka writes:
>> On 2014-06-12 04:27, Rusty Russell wrote:
>>> Henning Schild writes:
>>> It was also never implemented, and remains a thought experiment.
>>> However, implementing it in lguest should be fairly
On 2014-06-13 10:45, Paolo Bonzini wrote:
> Il 13/06/2014 08:23, Jan Kiszka ha scritto:
>>>> That would preserve zero-copy capabilities (as long as you can work
>>>> against the shared mem directly, e.g. doing DMA from a physical NIC or
>>>> storage device
On 2014-06-17 07:24, Paolo Bonzini wrote:
> Il 15/06/2014 08:20, Jan Kiszka ha scritto:
>>> > I think implementing Xen hypercalls in jailhouse for grant table and
>>> > event channels would actually make a lot of sense. The Xen
>>> > implementation is 2.5kL
From: Jan Kiszka
IA-32 SDM, Figure 10-14: Bits 27:0 are reserved as 1.
Fixes Jailhouse hypervisor start with in-kernel irqchips off.
Signed-off-by: Jan Kiszka
---
hw/intc/apic.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/intc/apic.c b/hw/intc/apic.c
index ef19e55
On 2014-08-11 09:04, Le Tan wrote:
> Add support for emulating Intel IOMMU according to the VT-d specification for
> the q35 chipset machine. Implement the logics for DMAR (DMA remapping) without
> PASID support. The emulation supports register-based invalidation and primary
> fault logging.
Some
On 2014-08-01 08:22, Danzer, Uwe wrote:
> Hi there,
>
> I'm implementing an emulated PCIe Memory class device, but can't get MSI-X
> interrupt emulation working.
>
> So far, the card appears in the guest system and the driver for the card
> recognises it and the emulation of 1MB of accessible r
.
Signed-off-by: Jan Kiszka
Reviewed-by: Paolo Bonzini
Reviewed-by: Michael S. Tsirkin
---
hw/pci/msi.c | 2 +-
hw/pci/msix.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/pci/msi.c b/hw/pci/msi.c
index a4a3040..52d2313 100644
--- a/hw/pci/msi.c
+++ b/hw/pci/msi.c
On 2014-08-13 08:14, Michael Tokarev wrote:
> 09.08.2014 18:05, Jan Kiszka wrote:
>> From: Jan Kiszka
>>
>> IA-32 SDM, Figure 10-14: Bits 27:0 are reserved as 1.
>>
>> Fixes Jailhouse hypervisor start with in-kernel irqchips off.
>
> Applied to -trivial
On 2014-08-14 13:06, Michael S. Tsirkin wrote:
> On Mon, Aug 11, 2014 at 03:05:00PM +0800, Le Tan wrote:
>> Expose Intel IOMMU to the BIOS. If object of TYPE_INTEL_IOMMU_DEVICE exists,
>> add DMAR table to ACPI RSDT table. For now the DMAR table indicates that
>> there
>> is only one hardware unit
On 2014-08-14 13:43, Michael S. Tsirkin wrote:
> On Thu, Aug 14, 2014 at 01:36:49PM +0200, Jan Kiszka wrote:
>> On 2014-08-14 13:06, Michael S. Tsirkin wrote:
>>> On Mon, Aug 11, 2014 at 03:05:00PM +0800, Le Tan wrote:
>>>> Expose Intel IOMMU to the BIOS. If obj
On 2014-08-14 13:15, Michael S. Tsirkin wrote:
> On Mon, Aug 11, 2014 at 03:04:57PM +0800, Le Tan wrote:
>> Hi,
>>
>> These patches are intended to introduce Intel IOMMU (VT-d) emulation to q35
>> chipset. The major job in these patches is to add support for emulating Intel
>> IOMMU according to th
On 2014-08-16 09:54, Knut Omang wrote:
> On Fri, 2014-08-15 at 19:37 +0800, Le Tan wrote:
>> Hi Knut,
>>
>> 2014-08-15 19:15 GMT+08:00 Knut Omang :
>>> On Fri, 2014-08-15 at 06:42 +0200, Knut Omang wrote:
>>>> On Thu, 2014-08-14 at 14:10 +0200, Jan Kiszka
On 2014-08-16 10:45, Jan Kiszka wrote:
> On 2014-08-16 09:54, Knut Omang wrote:
>> On Fri, 2014-08-15 at 19:37 +0800, Le Tan wrote:
>>> Hi Knut,
>>>
>>> 2014-08-15 19:15 GMT+08:00 Knut Omang :
>>>> On Fri, 2014-08-15 at 06:42 +0200, Knut Omang wro
On 2014-08-18 18:34, Knut Omang wrote:
> On Sat, 2014-08-16 at 10:47 +0200, Jan Kiszka wrote:
>> On 2014-08-16 10:45, Jan Kiszka wrote:
>>> On 2014-08-16 09:54, Knut Omang wrote:
>>>> On Fri, 2014-08-15 at 19:37 +0800, Le Tan wrote:
>>>>> Hi Knut,
>
On 2014-08-19 06:08, Knut Omang wrote:
>> Are you depending on interrupt remapping? If not, my patches are a bit
>> hacky and may cause their own issues if you are unlucky.
>
> It does not depend directly but interprets a NULL PciDevice pointer as
> the special bus number (0xff) for non-pci devic
On 2014-08-28 23:12, Michael S. Tsirkin wrote:
> On Sat, Aug 16, 2014 at 01:55:36PM +0800, Le Tan wrote:
>> Hi,
>>
>> These patches are intended to introduce Intel IOMMU (VT-d) emulation to q35
>> chipset. The major job in these patches is to add support for emulating Intel
>> IOMMU according to th
On 2013-07-25 07:47, Benjamin Herrenschmidt wrote:
> On Thu, 2013-07-25 at 15:26 +1000, Benjamin Herrenschmidt wrote:
>> On Mon, 2013-07-22 at 10:34 -0500, Anthony Liguori wrote:
>>>
>>> Really nice series. I'd prefer we simply got rid of the endianness
>>> flag
>>> entirely but this is a good ste
On 2013-07-25 13:44, Stefan Hajnoczi wrote:
> On Tue, Jul 23, 2013 at 10:51:06AM +0800, liu ping fan wrote:
>> On Mon, Jul 22, 2013 at 2:28 PM, Jan Kiszka wrote:
>>> On 2013-07-22 06:38, liu ping fan wrote:
>>>> On Sun, Jul 21, 2013 at 5:53 PM, Alex Bligh wrote:
>
On 2013-07-25 14:21, Alex Bligh wrote:
>
>
> --On 25 July 2013 14:05:30 +0200 Stefan Hajnoczi
> wrote:
>
>> Alex Bligh's series gives each AioContext its own rt_clock. This avoids
>> the need for synchronization in the simple case. If we require timer
>> access between threads then we really
On 2013-07-25 14:35, Paolo Bonzini wrote:
> Il 25/07/2013 14:32, Jan Kiszka ha scritto:
>> On 2013-07-25 14:21, Alex Bligh wrote:
>>>
>>>
>>> --On 25 July 2013 14:05:30 +0200 Stefan Hajnoczi
>>> wrote:
>>>
>>>> Alex Bligh's se
On 2013-07-25 14:41, Stefan Hajnoczi wrote:
> On Thu, Jul 25, 2013 at 2:38 PM, Jan Kiszka wrote:
>> On 2013-07-25 14:35, Paolo Bonzini wrote:
>>> Il 25/07/2013 14:32, Jan Kiszka ha scritto:
>>>> On 2013-07-25 14:21, Alex Bligh wrote:
>>>>>
>&g
On 2013-07-25 15:02, Paolo Bonzini wrote:
> Il 25/07/2013 14:48, Jan Kiszka ha scritto:
>> The concept of clocks (with start/stop property) and active timers shall
>> not be mixed, they are independent.
>
> Are you referring to this in particular:
>
>
On 2013-07-25 15:31, Stefan Hajnoczi wrote:
> On Thu, Jul 25, 2013 at 3:06 PM, Jan Kiszka wrote:
>> On 2013-07-25 15:02, Paolo Bonzini wrote:
>>> Il 25/07/2013 14:48, Jan Kiszka ha scritto:
>>>> The concept of clocks (with start/stop property) and active timers sha
On 2013-07-25 20:53, Alex Bligh wrote:
>
>
> --On 25 July 2013 14:32:59 +0200 Jan Kiszka wrote:
>
>>> I would happily at a QEMUClock of each type to AioContext. They are
>>> after
>>> all pretty lightweight.
>>
>> What's the point of ad
n by Fabien Chouteau.
Signed-off-by: Jan Kiszka
---
v2: Rebase over master
gdbstub.c | 10 ++
1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/gdbstub.c b/gdbstub.c
index 35ca7c2..4a6cc51 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -42,6 +42,12 @@
#include "syse
On 2013-07-27 16:10, Andreas Färber wrote:
> Am 24.07.2013 09:48, schrieb Andreas Färber:
>> Signed-off-by: Andreas Färber
>> ---
>> hw/arm/musicpal.c | 15 +++
>> 1 file changed, 11 insertions(+), 4 deletions(-)
>>
>> diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
>> index 293ab2
s);
> qemu_console_resize(s->con, 128*3, 64*3);
>
> -qdev_init_gpio_in(&dev->qdev, musicpal_lcd_gpio_brigthness_in, 3);
> +qdev_init_gpio_in(&dev->qdev, musicpal_lcd_gpio_brightness_in, 3);
>
> return 0;
> }
>
Reviewed-by: Jan Kiszka
signature.asc
Description: OpenPGP digital signature
On 2013-07-29 16:59, Andreas Färber wrote:
> Am 16.07.2013 17:31, schrieb Paolo Bonzini:
>> From: Jan Kiszka
>>
>> This restore the behavior prior to b018ddf633 which accidentally changed
>> the return code to 0. Specifically guests probing for register existen
Hi Igor,
just noticed by chance that error handling in cpu_x86_create is likely
broken after your changes. Any error after cpu = ...object_new() will
not properly release the CPU object again nor report NULL to the caller.
That means errors should slip through, no? And cpu_x86_init looks similar.
Hi all,
I'm tracking down a nasty stall of tap input over a custom 1.3.x QEMU
version. Under certain load, our tap backend stops reading from the char
device, and that even if we reset the guest. The frontend device
(pcnet32) is able to receive (can_receive would return > 0), but the
tap's fd is n
On 2013-08-01 19:15, Jan Kiszka wrote:
> Hi all,
>
> I'm tracking down a nasty stall of tap input over a custom 1.3.x QEMU
> version. Under certain load, our tap backend stops reading from the char
> device, and that even if we reset the guest. The frontend device
> (pcne
On 2013-08-02 09:33, Stefan Hajnoczi wrote:
> On Thu, Aug 01, 2013 at 07:24:13PM +0200, Jan Kiszka wrote:
>> On 2013-08-01 19:15, Jan Kiszka wrote:
>>> Hi all,
>>>
>>> I'm tracking down a nasty stall of tap input over a custom 1.3.x QEMU
>>>
On 2013-08-02 13:46, Stefan Hajnoczi wrote:
> On Thu, Aug 01, 2013 at 07:15:54PM +0200, Jan Kiszka wrote:
>> I was digging into the involved code and found something fishy:
>>
>> net/tap.c:
>> static void tap_send(void *opaque)
>> {
>> ...
>>
On 2013-07-30 14:21, Igor Mammedov wrote:
> On Tue, 30 Jul 2013 13:00:40 +0200
> Jan Kiszka wrote:
>
>> Hi Igor,
>>
>> just noticed by chance that error handling in cpu_x86_create is likely
>> broken after your changes. Any error after cpu = ...object_new() wil
On 2013-08-02 14:45, Jan Kiszka wrote:
> On 2013-08-02 13:46, Stefan Hajnoczi wrote:
>> On Thu, Aug 01, 2013 at 07:15:54PM +0200, Jan Kiszka wrote:
>>> I was digging into the involved code and found something fishy:
>>>
>>> net/tap.c:
&
On 2013-08-02 14:45, Jan Kiszka wrote:
> On 2013-08-02 13:46, Stefan Hajnoczi wrote:
>> On Thu, Aug 01, 2013 at 07:15:54PM +0200, Jan Kiszka wrote:
>>> I was digging into the involved code and found something fishy:
>>>
>>> net/tap.c:
&
From: Jan Kiszka
Each networking client has a queue for packets that could not yet be
delivered to that client. Calling this queue "send_queue" is highly
confusing as it has nothing to to with packets send from this client but
to it. Avoid this confusing by renaming it to "
From: Jan Kiszka
Analogously to other NICs, we have to inform the network layer when
the can_receive handler will no longer report 0. Without this, we may
get stuck waiting on queued incoming packets.
Signed-off-by: Jan Kiszka
---
hw/net/pcnet.c |4
1 files changed, 4 insertions
From: Jan Kiszka
This reverts commit 9b8c69243585a32d14b9bb9fcd52c37b0b5a1b71.
The commit was wrong: We only return -1 on invalid accesses, not on
valid but unbacked ones. This broke various corner cases.
Signed-off-by: Jan Kiszka
---
memory.c |2 +-
1 files changed, 1 insertions(+), 1
From: Jan Kiszka
Accesses to unassigned io ports shall return -1 on read and be ignored
on write. Ensure these properties via dedicated ops, decoupling us from
the memory core's handling of unassigned accesses.
Signed-off-by: Jan Kiszka
---
exec.c|3 ++-
include
On 2013-08-05 10:45, Andreas Färber wrote:
> Am 05.08.2013 00:04, schrieb Aurélien Jarno:
>> On Mon, Jul 29, 2013 at 10:35:31PM +0200, Stefan Weil wrote:
>>> Am 27.07.2013 22:58, schrieb Stefan Weil:
Am 27.07.2013 22:43, schrieb Andreas Färber:
> Am 27.07.2013 21:37, schrieb Stefan Weil:
>
On 2013-08-05 11:34, Andreas Färber wrote:
> Am 03.08.2013 10:31, schrieb Jan Kiszka:
>> From: Jan Kiszka
>>
>> Accesses to unassigned io ports shall return -1 on read and be ignored
>> on write. Ensure these properties via dedicated ops, decoupling us from
>&
On 2013-08-05 11:59, Peter Maydell wrote:
> On 5 August 2013 10:34, Andreas Färber wrote:
>> Am 03.08.2013 10:31, schrieb Jan Kiszka:
>>> From: Jan Kiszka
>>>
>>> Accesses to unassigned io ports shall return -1 on read and be ignored
>>> on wri
On 2013-08-05 12:36, Peter Maydell wrote:
> On 5 August 2013 11:30, Jan Kiszka wrote:
>> On 2013-08-05 11:59, Peter Maydell wrote:
>>> Or do you mean that if we had:
>>>
>>> [ system memory region, with its own default read/write ops ]
>>
>>
On 2013-08-05 12:51, Peter Maydell wrote:
> On 5 August 2013 11:44, Jan Kiszka wrote:
>> On 2013-08-05 12:36, Peter Maydell wrote:
>>> On 5 August 2013 11:30, Jan Kiszka wrote:
>>>> On 2013-08-05 11:59, Peter Maydell wrote:
>>>>> Or do you mean that i
On 2013-08-05 13:35, Andreas Färber wrote:
> Am 05.08.2013 13:03, schrieb Jan Kiszka:
>> On 2013-08-05 12:51, Peter Maydell wrote:
>>> On 5 August 2013 11:44, Jan Kiszka wrote:
>>>> On 2013-08-05 12:36, Peter Maydell wrote:
>>>>> On 5 August 2013 11:3
otherwise documented).
>>
>> Therefore cpu_x86_create() must unref the new X86CPU itself, and
>> pc_new_cpu() must check for an Error rather than NULL return value.
>>
>> While at it, clean up a superfluous NULL check.
>>
>> Reported-by: Jan Kiszka
>&
On 2013-08-08 17:23, Peter Maydell wrote:
> On 3 August 2013 09:31, Jan Kiszka wrote:
>> From: Jan Kiszka
>>
>> This reverts commit 9b8c69243585a32d14b9bb9fcd52c37b0b5a1b71.
>>
>> The commit was wrong: We only return -1 on invalid accesses, not on
>> vali
On 2013-08-08 17:13, Peter Maydell wrote:
> On 16 July 2013 13:45, Jan Kiszka wrote:
>> This restore the behavior prior to b018ddf633 which accidentally changed
>> the return code to 0. Specifically guests probing for register existence
>> were affected by this.
>>
&
On 2013-08-08 17:33, Peter Maydell wrote:
> On 3 August 2013 09:31, Jan Kiszka wrote:
>> --- a/ioport.c
>> +++ b/ioport.c
>> @@ -44,6 +44,22 @@ typedef struct MemoryRegionPortioList {
>> MemoryRegionPortio ports[];
>> } MemoryRegionPortioList;
>>
>
On 2013-08-08 23:41, Alex Bligh wrote:
> This patch series adds support for timers attached to an AioContext clock
> which get called within aio_poll.
>
> In doing so it removes alarm timers and moves to use ppoll where possible.
>
> This patch set 'sort of' passes make check (see below for cavea
On 2013-08-09 10:24, liu ping fan wrote:
> Hi Jan, do you work on pushing hpet onto dedicated thread? If you do,
> I will cease my current work.
No, the HPET is not needed for our current use case, just the MC146818.
Jan
--
Siemens AG, Corporate Technology, CT RTC ITP SES-DE
Corporate Competenc
This just binds both patches properly together and fixes up the return
value size of unassigned_io_read as suggested. Please merge before the
1.6 release.
Jan Kiszka (2):
memory: Provide separate handling of unassigned io ports accesses
Revert "memory: Return -1 again on reads from uns
Accesses to unassigned io ports shall return -1 on read and be ignored
on write. Ensure these properties via dedicated ops, decoupling us from
the memory core's handling of unassigned accesses.
Signed-off-by: Jan Kiszka
---
exec.c|3 ++-
include/exec/ioport.h |
This reverts commit 9b8c69243585a32d14b9bb9fcd52c37b0b5a1b71.
The commit was wrong: We only return -1 on invalid accesses, not on
valid but unbacked ones. This broke various corner cases.
Signed-off-by: Jan Kiszka
---
memory.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff
Accesses to unassigned io ports shall return -1 on read and be ignored
on write. Ensure these properties via dedicated ops, decoupling us from
the memory core's handling of unassigned accesses.
Signed-off-by: Jan Kiszka
---
Changes in v2:
- avoid breakage in ioport.h for user build
e
On 2013-08-11 18:43, Alex Bligh wrote:
> Split QEMUClock into QEMUClock and QEMUTimerList so that we can
> have more than one QEMUTimerList associated with the same clock.
>
> Introduce a main_loop_timerlist concept and make existing
> qemu_clock_* calls that actually should operate on a QEMUTimer
On 2013-08-12 18:25, Alex Bligh wrote:
>
> On 12 Aug 2013, at 17:14, Jan Kiszka wrote:
>
>> The typedef part is a duplication of what we already have in
>> qemu/typedefs.h and breaks the build for me. Just declare the struct here.
>
> You mean one can'
On 2013-08-11 18:43, Alex Bligh wrote:
> include/qemu/timer.h has no need to include main-loop.h and
> doing so causes an issue for the next patch. Unfortunately
> various files assume including timers.h will pull in main-loop.h.
> Untangle this mess.
>
Hmm, this triggers a double typedef of AioC
Accesses to unassigned io ports shall return -1 on read and be ignored
on write. Ensure these properties via dedicated ops, decoupling us from
the memory core's handling of unassigned accesses.
Signed-off-by: Jan Kiszka
---
Please fix your scripting to support in-thread patch updates.
e
On 2013-08-12 19:04, Alex Bligh wrote:
> Jan,
>
> On 12 Aug 2013, at 17:40, Jan Kiszka wrote:
>
>> On 2013-08-11 18:43, Alex Bligh wrote:
>>> include/qemu/timer.h has no need to include main-loop.h and
>>> doing so causes an issue for the next patch. Un
Hi Stefan,
in the attempt to use Alex' ppoll-based timer rework for decoupled,
real-time capable timer device models I'm now scratching my head over
the aio_poll interface. I'm looking at dataplane/virtio-blk.c, just finding
static void *data_plane_thread(void *opaque)
{
VirtIOBlockDataPlane
On 2013-08-13 05:15, Liu Ping Fan wrote:
> Each slirp has its own time to caculate timeout.
>
> Signed-off-by: Liu Ping Fan
> ---
> slirp/slirp.c | 22 ++
> slirp/slirp.h | 3 +++
> 2 files changed, 13 insertions(+), 12 deletions(-)
>
> diff --git a/slirp/slirp.c b/slirp/sl
On 2013-08-13 05:15, Liu Ping Fan wrote:
> Signed-off-by: Liu Ping Fan
> ---
> slirp/slirp.c | 7 +--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/slirp/slirp.c b/slirp/slirp.c
> index 55654d5..1deaad9 100644
> --- a/slirp/slirp.c
> +++ b/slirp/slirp.c
> @@ -47,6 +47,9
On 2013-08-13 05:15, Liu Ping Fan wrote:
> If slirp needs to emulate tcp timeout, then the timeout value
> for mainloop should be more precise, which is determined by
> slirp's fasttimo or slowtimo.
>
> Signed-off-by: Liu Ping Fan
> ---
> main-loop.c | 2 +-
> slirp/slirp.c | 18 +
On 2013-08-13 10:25, liu ping fan wrote:
> On Tue, Aug 13, 2013 at 4:19 PM, Jan Kiszka wrote:
>> On 2013-08-13 05:15, Liu Ping Fan wrote:
>>> If slirp needs to emulate tcp timeout, then the timeout value
>>> for mainloop should be more precise, which is determined
On 2013-08-13 07:43, Liu Ping Fan wrote:
> From: Paolo Bonzini
>
> This lets the read-side access run outside the BQL.
>
> Signed-off-by: Paolo Bonzini
> ---
> include/qemu/seqlock.h | 72
> ++
> 1 file changed, 72 insertions(+)
> create mode 1
On 2013-08-13 10:39, liu ping fan wrote:
> On Tue, Aug 13, 2013 at 4:26 PM, Jan Kiszka wrote:
>> On 2013-08-13 07:43, Liu Ping Fan wrote:
>>> From: Paolo Bonzini
>>>
>>> This lets the read-side access run outside the BQL.
>>>
>>> Signed-off-
On 2013-08-11 18:42, Alex Bligh wrote:
> [ This patch set is available from git at:
>https://github.com/abligh/qemu/tree/aio-timers10
> As autogenerated patch 30 of the series is too large for the mailing list. ]
>
> This patch series adds support for timers attached to an AioContext clock
> w
Now that cpu_in/out is just a wrapper around address_space_rw, we can
also call the latter directly. As host endianness == guest endianness,
there is no need for the memory access helpers st*_p/ld*_p as well.
Signed-off-by: Jan Kiszka
---
kvm-all.c | 28 ++--
1 files
On 2013-08-13 14:44, Alex Bligh wrote:
>
> On 13 Aug 2013, at 13:22, Jan Kiszka wrote:
>
>> With tweaking I mean:
>>
>> bool aio_poll(AioContext *ctx, bool blocking,
>> void (*blocking_cb)(bool, void *),
>> void *blocking_cb_opa
On 2013-08-13 15:12, Alex Bligh wrote:
>
> On 13 Aug 2013, at 13:22, Jan Kiszka wrote:
>
>> Another trick necessary to make this work is the following:
>>
>> static int rtc_aio_flush_true(EventNotifier *e)
>> {
>>return 1;
>> }
On 2013-08-13 15:39, Alex Bligh wrote:
> Jan,
>
> On 13 Aug 2013, at 14:25, Jan Kiszka wrote:
>
>> To my understanding, the use case behind the current behavior is
>> qemu_aio_wait() which is only supposed to block when there are pending
>> requests for the main aio
On 2013-08-13 15:45, Stefan Hajnoczi wrote:
> On Tue, Aug 13, 2013 at 09:56:17AM +0200, Jan Kiszka wrote:
>> in the attempt to use Alex' ppoll-based timer rework for decoupled,
>> real-time capable timer device models I'm now scratching my head over
>> the aio
On 2013-08-13 16:26, Alex Bligh wrote:
>
> On 13 Aug 2013, at 15:22, Stefan Hajnoczi wrote:
>
>> We can change the semantics of aio_poll() so long as we don't break
>> existing callers and tests. It would make sense to do that after
>> merging the io_flush and AioContext timers series.
>
> Whil
On 2013-08-13 16:52, Paolo Bonzini wrote:
> Il 13/08/2013 11:09, Jan Kiszka ha scritto:
>>>>>>>>
>>>>>>
>>>>>> As the usage pattern is
>>>>>>
>>>>>> seqlock_read_begin()
>>>&g
On 2013-08-13 16:45, Paolo Bonzini wrote:
> Il 13/08/2013 09:56, Jan Kiszka ha scritto:
>> Hi Stefan,
>>
>> in the attempt to use Alex' ppoll-based timer rework for decoupled,
>> real-time capable timer device models I'm now scratching my head over
>
On 2013-08-14 05:02, Liu Ping Fan wrote:
> If slirp needs to emulate tcp timeout, then the timeout value
> for mainloop should be more precise, which is determined by
> slirp's fasttimo or slowtimo. Achieve this by swap the logic
> sequence of slirp_pollfds_fill and slirp_update_timeout.
>
> Signe
On 2013-08-14 04:49, Peter Cheung wrote:
> Hi2. I have compile my qemu to --target-list=x86_64-softmmu , in gdb, why
> the registers is 32 bits?
> (gdb) i reax0x0 0ecx0xf7247edx
> 0x19a804 1681412ebx0x137 311esp0x19a0d0
On 2013-08-14 10:52, Stefan Hajnoczi wrote:
> On Tue, Aug 13, 2013 at 04:13:03PM +0200, Jan Kiszka wrote:
>> On 2013-08-13 15:45, Stefan Hajnoczi wrote:
>>> On Tue, Aug 13, 2013 at 09:56:17AM +0200, Jan Kiszka wrote:
>>> The details depend on your device, do you ha
This was once introduced by commit 100d9891d6 but was never used in-tree
and then got broken by commit 32e0c8260d. Time to clean up.
Signed-off-by: Jan Kiszka
---
hw/timer/mc146818rtc.c |9 +
1 files changed, 1 insertions(+), 8 deletions(-)
diff --git a/hw/timer/mc146818rtc.c b/hw
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