Signed-off-by: Huacai Chen
---
Makefile.target |2 +-
hw/pci_ids.h|8 +
hw/vt82c686.c | 579 +++
hw/vt82c686.h | 11 +
4 files changed, 599 insertions(+), 1 deletions(-)
create mode 100644 hw/vt82c686.c
create mode 100644
Signed-off-by: Huacai Chen
---
hw/usb-uhci.c | 20
hw/usb-uhci.h |1 +
2 files changed, 21 insertions(+), 0 deletions(-)
diff --git a/hw/usb-uhci.c b/hw/usb-uhci.c
index 624d55b..feb44e6 100644
--- a/hw/usb-uhci.c
+++ b/hw/usb-uhci.c
@@ -1152,6 +1152,16 @@ static int
Signed-off-by: Huacai Chen
---
target-mips/mips-defs.h |4
target-mips/translate_init.c | 35 +++
2 files changed, 39 insertions(+), 0 deletions(-)
diff --git a/target-mips/mips-defs.h b/target-mips/mips-defs.h
index c57de02..38594da 100644
--- a
Signed-off-by: Huacai Chen
---
Makefile.target|2 +-
hw/mips_fulong2e.c | 402
2 files changed, 403 insertions(+), 1 deletions(-)
create mode 100644 hw/mips_fulong2e.c
diff --git a/Makefile.target b/Makefile.target
index 92ba282
Signed-off-by: Huacai Chen
---
Makefile.objs|1 +
default-configs/mips64el-softmmu.mak |1 +
hw/ide.h |1 +
hw/ide/via.c | 176 ++
4 files changed, 179 insertions(+), 0
Signed-off-by: Huacai Chen
---
Makefile.target |1 +
default-configs/mips64el-softmmu.mak |1 +
hw/bonito.c | 816 ++
hw/mips.h|3 +
4 files changed, 821 insertions(+), 0
Signed-off-by: Huacai Chen
---
Makefile.target |1 +
default-configs/mips64el-softmmu.mak |1 +
hw/bonito.c | 808 ++
hw/mips.h|3 +
4 files changed, 813 insertions(+), 0
Signed-off-by: Huacai Chen
---
Makefile.objs|1 +
default-configs/mips64el-softmmu.mak |1 +
hw/ide.h |1 +
hw/ide/via.c | 191 ++
4 files changed, 194 insertions(+), 0
Signed-off-by: Huacai Chen
---
hw/usb-uhci.c | 29 +
hw/usb-uhci.h |1 +
2 files changed, 30 insertions(+), 0 deletions(-)
diff --git a/hw/usb-uhci.c b/hw/usb-uhci.c
index 624d55b..91d827e 100644
--- a/hw/usb-uhci.c
+++ b/hw/usb-uhci.c
@@ -1149,6 +1149,25
Signed-off-by: Huacai Chen
---
Makefile.target|2 +-
hw/mips_fulong2e.c | 402
2 files changed, 403 insertions(+), 1 deletions(-)
create mode 100644 hw/mips_fulong2e.c
diff --git a/Makefile.target b/Makefile.target
index 92ba282
Signed-off-by: Huacai Chen
---
Makefile.target |2 +-
hw/pci_ids.h|8 +
hw/vt82c686.c | 567 +++
hw/vt82c686.h | 11 +
4 files changed, 587 insertions(+), 1 deletions(-)
create mode 100644 hw/vt82c686.c
create mode 100644
Signed-off-by: Huacai Chen
---
target-mips/mips-defs.h |4
target-mips/translate_init.c | 35 +++
2 files changed, 39 insertions(+), 0 deletions(-)
diff --git a/target-mips/mips-defs.h b/target-mips/mips-defs.h
index c57de02..38594da 100644
--- a
Signed-off-by: Huacai Chen
---
Makefile.target |1 +
default-configs/mips64el-softmmu.mak |1 +
hw/bonito.c | 809 ++
hw/mips.h|3 +
4 files changed, 814 insertions(+), 0
Signed-off-by: Huacai Chen
---
hw/usb-uhci.c | 29 +
hw/usb-uhci.h |1 +
2 files changed, 30 insertions(+), 0 deletions(-)
diff --git a/hw/usb-uhci.c b/hw/usb-uhci.c
index 624d55b..accfe2e 100644
--- a/hw/usb-uhci.c
+++ b/hw/usb-uhci.c
@@ -1149,6 +1149,25
Signed-off-by: Huacai Chen
---
Makefile.target |2 +-
hw/pci_ids.h|8 +
hw/vt82c686.c | 569 +++
hw/vt82c686.h | 11 +
4 files changed, 589 insertions(+), 1 deletions(-)
create mode 100644 hw/vt82c686.c
create mode 100644
Signed-off-by: Huacai Chen
---
Makefile.objs|1 +
default-configs/mips64el-softmmu.mak |1 +
hw/ide.h |1 +
hw/ide/via.c | 191 ++
4 files changed, 194 insertions(+), 0
Signed-off-by: Huacai Chen
---
target-mips/mips-defs.h |4
target-mips/translate_init.c | 35 +++
2 files changed, 39 insertions(+), 0 deletions(-)
diff --git a/target-mips/mips-defs.h b/target-mips/mips-defs.h
index a7f4697..bf094a3 100644
--- a
Signed-off-by: Huacai Chen
---
Makefile.target|2 +-
hw/mips_fulong2e.c | 416
2 files changed, 417 insertions(+), 1 deletions(-)
create mode 100644 hw/mips_fulong2e.c
diff --git a/Makefile.target b/Makefile.target
index 4b23e6d
Signed-off-by: Huacai Chen
---
Makefile.target |2 +-
hw/pci_ids.h|8 +
hw/vt82c686.c | 597 +++
hw/vt82c686.h | 11 +
4 files changed, 617 insertions(+), 1 deletions(-)
create mode 100644 hw/vt82c686.c
create mode 100644
Signed-off-by: Huacai Chen
---
hw/usb-uhci.c | 28
hw/usb-uhci.h |1 +
2 files changed, 29 insertions(+), 0 deletions(-)
diff --git a/hw/usb-uhci.c b/hw/usb-uhci.c
index 624d55b..3eb9832 100644
--- a/hw/usb-uhci.c
+++ b/hw/usb-uhci.c
@@ -1152,6 +1152,24
Signed-off-by: Huacai Chen
---
target-mips/mips-defs.h |4
target-mips/translate_init.c | 35 +++
2 files changed, 39 insertions(+), 0 deletions(-)
diff --git a/target-mips/mips-defs.h b/target-mips/mips-defs.h
index a7f4697..bf094a3 100644
--- a
Signed-off-by: Huacai Chen
---
Makefile.target |1 +
default-configs/mips64el-softmmu.mak |1 +
hw/bonito.c | 809 ++
hw/mips.h|3 +
4 files changed, 814 insertions(+), 0
Signed-off-by: Huacai Chen
---
Makefile.target|2 +-
hw/mips_fulong2e.c | 416
2 files changed, 417 insertions(+), 1 deletions(-)
create mode 100644 hw/mips_fulong2e.c
diff --git a/Makefile.target b/Makefile.target
index caabacd
Signed-off-by: Huacai Chen
---
Makefile.objs|1 +
default-configs/mips64el-softmmu.mak |1 +
hw/ide.h |1 +
hw/ide/via.c | 191 ++
4 files changed, 194 insertions(+), 0
to 0, PMON can't
work, but if set pci_mem_base to 0x1000, Linux can't access PCI. So I make
this patch to make both cases works.
However, I don't know whether the modification will break other archs, so
request for comments here.
Signed-off-by: Huacai Chen
---
hw/pci.c |
This mistake makes PCI devices can't work correctly.
Signed-off-by: Huacai Chen
---
hw/bonito.c |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/hw/bonito.c b/hw/bonito.c
index 8b81032..dcf0311 100644
--- a/hw/bonito.c
+++ b/hw/bonito.c
@@ -775,7 +775,6 @@ P
resend by git send-email to avoid line-wrapping
Signed-off-by: Huacai Chen
---
Makefile.target |2 +-
hw/pc.h |7 +
hw/pci_ids.h|8 +
hw/vt82c686.c | 786 +++
4 files changed, 802 insertions(+), 1 deletions
resend by git send-email to avoid line-wrapping
Signed-off-by: Huacai Chen
---
Makefile.target |2 +-
hw/mips_fulong2e.c | 420 ++
target-mips/translate_init.c | 35
3 files changed, 456 insertions(+), 1 deletions
resend by git send-email to avoid line-wrapping
Signed-off-by: Huacai Chen
---
hw/usb-uhci.c | 30 ++
hw/usb-uhci.h |1 +
2 files changed, 31 insertions(+), 0 deletions(-)
diff --git a/hw/usb-uhci.c b/hw/usb-uhci.c
index 624d55b..5fd5388 100644
--- a/hw/usb
resend by git send-email to avoid line-wrapping
Signed-off-by: Huacai Chen
---
Makefile.target |1 +
default-configs/mips64el-softmmu.mak |1 +
hw/bonito.c | 950 ++
hw/mips.h
resend by git send-email to avoid line-wrapping
Signed-off-by: Huacai Chen
---
Makefile.objs|1 +
default-configs/mips64el-softmmu.mak |1 +
hw/ide.h |1 +
hw/ide/via.c | 185
Signed-off-by: Huacai Chen
---
Makefile.target |1 +
default-configs/mips64el-softmmu.mak |1 +
hw/bonito.c | 950 ++
hw/mips.h|3 +
4 files changed, 955 insertions(+), 0
Signed-off-by: Huacai Chen
---
Makefile.target |2 +-
hw/pc.h |7 +
hw/pci_ids.h|8 +
hw/vt82c686.c | 786 +++
4 files changed, 802 insertions(+), 1 deletions(-)
create mode 100644 hw/vt82c686.c
diff --git a
Signed-off-by: Huacai Chen
---
Makefile.objs|1 +
default-configs/mips64el-softmmu.mak |1 +
hw/ide.h |1 +
hw/ide/via.c | 185 ++
4 files changed, 188 insertions(+), 0
Signed-off-by: Huacai Chen
---
hw/usb-uhci.c | 30 ++
hw/usb-uhci.h |1 +
2 files changed, 31 insertions(+), 0 deletions(-)
diff --git a/hw/usb-uhci.c b/hw/usb-uhci.c
index 624d55b..5fd5388 100644
--- a/hw/usb-uhci.c
+++ b/hw/usb-uhci.c
@@ -1152,6 +1152,26
Signed-off-by: Huacai Chen
---
Makefile.target |2 +-
hw/mips_fulong2e.c | 421 ++
target-mips/translate_init.c | 35
3 files changed, 457 insertions(+), 1 deletions(-)
create mode 100644 hw/mips_fulong2e.c
diff --git a
Hi, all,
On Fri, Aug 12, 2022 at 10:26 AM gaosong wrote:
>
> CC: Huacai Chen
>
> On 2022/8/11 下午9:24, Waldemar Brodkorb wrote:
> > Hi Qemu developers,
> >
> > I am trying to bootup a loongarch64 Linux kernel in Qemu 7.1.0-rc2.
> > The problem is I get no
Hi, Jiaxun,
Rename loongarch_ipi to loongson_ipi? It will be shared by both MIPS
and LoongArch in your series.
Huacai
On Sun, May 21, 2023 at 6:24 PM Jiaxun Yang wrote:
>
> As per "Loongson 3A5000/3B5000 Processor Reference Manual",
> Loongson 3A5000's IPI implementation have 4 mailboxes per
>
Reviewed-by: Huacai Chen
On Tue, Aug 30, 2022 at 7:39 AM Philippe Mathieu-Daudé wrote:
>
> Hi Alex,
>
> (+Aleksandar/Huacai)
>
> On 26/8/22 19:21, Alex Bennée wrote:
> > It's becoming harder to maintain a cross-compiler to test this host
> > architecture a
On Wed, Jul 3, 2024 at 3:51 PM Jiaxun Yang wrote:
>
>
>
> 在2024年7月1日七月 下午2:57，Jiaxun Yang写道：
> > 在2024年5月30日五月 上午7:49，Bibo Mao写道：
> >> Loongson Binary Translation (LBT) is used to accelerate binary
> >> translation, which contains 4 scratch registers (scr0 to scr3), x86/ARM
> >> eflags (eflags) an
On Sat, Sep 7, 2024 at 9:44 AM maobibo wrote:
>
> Add huacai who is maintainer of Loongarch Linux kernel.
>
> On 2024/9/6 下午10:55, Jason A. Donenfeld wrote:
> > Hi,
> >
> > It appears that as of QEMU 9.1, it's possible to boot LoongArch machines
> > that don't provide EFI or ACPI.
> >
> > Would yo
Preparing for Loongson-3 virtualization, add KVM target support for
MIPS64 in configure script.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
configure | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configure b/configure
index 23b5e93..7581e65 100755
--- a
a VZ
platform. Thus, null-machine also need the kvm_type() hook.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
hw/core/Makefile.objs | 2 +-
hw/core/null-machine.c | 4
hw/mips/Makefile.objs | 2 +-
hw/mips/common.c | 29 +
include/hw/mips
Currently, KVM/MIPS only deliver I/O interrupt via IP2, this patch add
IP2 delivery as well, because Loongson-3 based machine use both IRQ2
(CPU's IP2) and IRQ3 (CPU's IP3).
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
hw/mips/mips_int.c | 6 ++
1 file changed, 2
G7, so add their bit-fields as well.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
target/mips/cpu.h| 28 ++
target/mips/internal.h | 2 ++
target/mips/mips-defs.h | 7 --
target/mips/translate.c | 2 ++
t
Add more CP0 register for save/restore, including: EBase, XContext,
PageGrain, PWBase, PWSize, PWField, PWCtl, Config*, KScratch1~KScratch6.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
target/mips/kvm.c | 212 ++
target/mips
Add Loongson-3 based machine support, it use i8259 as the interrupt
controler and use GPEX as the pci controller. Currently it can only
work with KVM, but we will add TCG support in future.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
default-configs/mips64el-softmmu.mak | 1
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index aa9a057..efe840b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1080,6 +1080,12 @@ F: hw/isa/vt82c686.c
F: hw/pci-host/bonito.c
F
Hi, Aleksandar,
On Wed, Apr 29, 2020 at 3:10 AM Aleksandar Markovic
wrote:
>
> пон, 27. апр 2020. у 11:36 Huacai Chen је написао/ла:
> >
> > Add more CP0 register for save/restore, including: EBase, XContext,
> > PageGrain, PWBase, PWSize, PWField, PWCtl, Conf
than
> one example is better than only one.
>
> Specifically, can you explicitly say what is your KVM setup, so that
> anyone could repro it?
>
> Good health to people from China!
>
Thank you very much, I will improve that in V2.
> Yours,
> Aleksandar
>
>
t; wrote:
> > >
> > > On 4/27/20 11:33 AM, Huacai Chen wrote:
> > > > Currently, KVM/MIPS only deliver I/O interrupt via IP2, this patch add
> > > > IP2 delivery as well, because Loongson-3 based machine use both IRQ2
> > > > (CPU's IP2) an
pr 28, 2020 at 2:34 PM Philippe Mathieu-Daudé
> > wrote:
> > >
> > > Hi Huacai,
> > >
> > > On 4/27/20 11:33 AM, Huacai Chen wrote:
> > > > Loongson-3 CPU family include Loongson-3A R1/R2/R3/R4 and Loongson-3B
> > > > R1/R2. Loongson-3A
4:09 PM Philippe Mathieu-Daudé wrote:
>
> On 4/29/20 5:51 AM, Huacai Chen wrote:
> > Hi, Aleksandar,
> >
> > I've tried translate.google.com, and documents are available here:
> > Loongson-3A R1 (Loongson-3A1000)
> > User Manual Part 1:
> > h
Hi, Philippe,
I think that this CPU definition is for Guest, not for Host (Maybe I'm wrong?).
On Wed, Apr 29, 2020 at 4:58 PM Philippe Mathieu-Daudé wrote:
>
> On 4/29/20 10:27 AM, Huacai Chen wrote:
> > Hi, Philippe,
> >
> > The major differences of R3 and R4 are
Hi, Philippe,
On Wed, Apr 29, 2020 at 5:30 PM Philippe Mathieu-Daudé wrote:
>
> On 4/29/20 11:25 AM, Huacai Chen wrote:
> > Hi, Philippe,
> >
> > I think that this CPU definition is for Guest, not for Host (Maybe I'm
> > wrong?).
>
> OK, it was not ob
Hi, Philippe,
On Wed, Apr 29, 2020 at 5:18 PM Philippe Mathieu-Daudé wrote:
>
> On 4/29/20 3:52 AM, Huacai Chen wrote:
> > Hi, Philippe and Aleksandar,
> >
> > I'm not refusing to change my patch, but I have two questions:
> > 1, Why we should identify Loong
ips64el -M loongson3,accel=tcg -cpu Loongson-3A1000 -kernel
-append ...
Use QEMU with KVM (available at present):
qemu-system-mips64el -M loongson3,accel=kvm -cpu Loongson-3A4000 -kernel
-append ...
The "-cpu" parameter can be omitted here and QEMU will use the correct ty
Currently, KVM/MIPS only deliver I/O interrupt via IP2, this patch add
IP3 delivery as well, because Loongson-3 based machine use both IRQ2
(CPU's IP2) and IRQ3 (CPU's IP3).
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
hw/mips/mips_int.c | 6 ++
1 file changed, 2
Preparing for Loongson-3 virtualization, add KVM target support for
MIPS64 in configure script.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
configure | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configure b/configure
index 23b5e93..7581e65 100755
--- a
add their bit-fields as well.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
target/mips/cpu.h| 28 ++
target/mips/internal.h | 2 +
target/mips/mips-defs.h | 7 +++-
target/mips/translate.c | 2 +
target/mips/trans
a VZ
platform. Thus, null-machine also need the kvm_type() hook.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
hw/core/Makefile.objs | 2 +-
hw/core/null-machine.c | 4
hw/mips/Makefile.objs | 2 +-
hw/mips/common.c | 29 +
include/hw/mips
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
MAINTAINERS | 5 +
1 file changed, 5 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index aa9a057..66c5a41 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1080,6 +1080,11 @@ F: hw/isa/vt82c686.c
F: hw/pci-host/bonito.c
F
Add more CP0 register for save/restore, including: EBase, XContext,
PageGrain, PWBase, PWSize, PWField, PWCtl, Config*, KScratch1~KScratch6.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
target/mips/kvm.c | 212 ++
target/mips
be omitted here and QEMU will use the correct type
for TCG/KVM automatically.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
default-configs/mips64el-softmmu.mak | 1 +
hw/mips/Kconfig | 10 +
hw/mips/Makefile.objs| 1 +
hw/mips/mips_l
de be guarded by CONFIG_CPU_LOONGSON64.
V2 -> V3:
1, Emulate a reduced feature list of CPUCFG.
2, Fix all possible checkpatch.pl errors and warnings.
Xing Li(2):
KVM: MIPS: Define KVM_ENTRYHI_ASID to cpu_asid_mask(&boot_cpu_data)
KVM: MIPS: Fix VPN2_MASK definition for variable cpu_vm
definition.
Cc: sta...@vger.kernel.org
Signed-off-by: Xing Li
[Huacai: Improve commit messages]
Signed-off-by: Huacai Chen
---
arch/mips/include/asm/kvm_host.h | 4
1 file changed, 4 insertions(+)
diff --git a/arch/mips/include/asm/kvm_host.h b/arch/mips/include/asm/kvm_host.h
index a01cee9
rder to support variable ASID_MASK, KVM_ENTRYHI_ASID should also
be changed to cpu_asid_mask(&boot_cpu_data).
Cc: sta...@vger.kernel.org
Signed-off-by: Xing Li
[Huacai: Change current_cpu_data to boot_cpu_data for optimization]
Signed-off-by: Huacai Chen
---
arch/mips/include/asm/kvm_host.
Loongson-3 based machines can have as many as 16 CPUs, and so does
memory slots, so increase KVM_MAX_VCPUS and KVM_USER_MEM_SLOTS to 16.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
arch/mips/include/asm/kvm_host.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
Add EVENTFD support for KVM/MIPS, which is needed by VHOST. Tested on
Loongson-3 platform.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
arch/mips/kvm/Kconfig | 1 +
arch/mips/kvm/Makefile| 2 +-
arch/mips/kvm/trap_emul.c | 3 +++
arch/mips/kvm/vz.c| 3 +++
4
Loongson-3 can use lddir/ldpte instuctions to accelerate page table
walking, so use them to lookup gpa_mm.pgd.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
arch/mips/kvm/entry.c | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/arch/mips/kvm
Loongson-3 has lddir/ldpte instructions and their related CP0 registers
are the same as HTW. So we introduce a cpu_guest_has_ldpte flag and use
it to indicate whether we need to save/restore HTW related CP0 registers
(PWBase, PWSize, PWField and PWCtl).
Signed-off-by: Huacai Chen
Co-developed-by
s all guest mappings be cacheable mappings. Thus, we use root tlb
to control guest's CCA for Loongson-3.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
arch/mips/kvm/vz.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/mips/kvm/vz.c b/arch/mips/kvm/vz.c
ind
Loongson-3's indexed cache operations need a node-id in the address,
but in KVM guest the node-id may be incorrect. So, let indexed cache
operations cause guest exit on Loongson-3.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
arch/mips/kvm/vz.c | 8 ++--
1 file chang
This patch add Loongson-3 Virtual IPI interrupt support in the kernel,
because emulate it in QEMU is too expensive for performance.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
arch/mips/include/asm/kvm_host.h | 32 ++
arch/mips/kvm/Makefile | 3 +
arch/mips/kvm
mapping tables: kvm_loongson3_priority_to_irq[] for
Loongson-3, and kvm_default_priority_to_irq[] for others. The virtual
interrupt infrastructure is updated to deliver all types of interrupts
from IP2, IP3, IP4, IP6 and IP7.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
arch/mips
duced feature list (which means the virtual CPU doesn't
have any other advanced features, including CSR) in KVM.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
arch/mips/include/asm/kvm_host.h | 3 ++
arch/mips/include/uapi/asm/inst.h | 11 ++
arch/mips/kvm/mips.c
Loongson-3 has CONFIG6 and DIAG registers which need to be emulate.
CONFIG6 is mostly used to enable/disable FTLB and SFB, while DIAG is
mostly used to flush BTB, ITLB, DTLB, VTLB and FTLB.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
arch/mips/include/asm/kvm_host.h | 7
VCPUs.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
arch/mips/Kconfig| 1 +
arch/mips/kernel/cpu-probe.c | 1 +
arch/mips/kvm/vz.c | 2 +-
3 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 9f15539..9c4bdac
This patch add more MMIO load/store instructions emulation, which can
be observed in QXL and some other device drivers:
1, LWL, LWR, LDW, LDR, SWL, SWR, SDL and SDR for all MIPS;
2, GSLBX, GSLHX, GSLWX, GSLDX, GSSBX, GSSHX, GSSWX and GSSDX for
Loongson-3.
Signed-off-by: Huacai Chen
Co
type
for TCG/KVM automatically.
V1 -> V2:
1, Add a cover letter;
2, Improve CPU definitions;
3, Remove LS7A-related things (Use GPEX instead);
4, Add a description of how to run QEMU/Loongson-3.
V2 -> V3:
1, Fix all possible checkpatch.pl errors and warnings.
Huacai Chen(7):
configure: Ad
Preparing for Loongson-3 virtualization, add KVM target support for
MIPS64 in configure script.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
configure | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configure b/configure
index 23b5e93..7581e65 100755
--- a
a VZ
platform. Thus, null-machine also need the kvm_type() hook.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
hw/core/Makefile.objs | 2 +-
hw/core/null-machine.c | 4
hw/mips/Makefile.objs | 2 +-
hw/mips/common.c | 31 +++
include/hw/mips
Currently, KVM/MIPS only deliver I/O interrupt via IP2, this patch add
IP3 delivery as well, because Loongson-3 based machine use both IRQ2
(CPU's IP2) and IRQ3 (CPU's IP3).
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
hw/mips/mips_int.c | 4 ++--
1 file changed, 2
be omitted here and QEMU will use the correct type
for TCG/KVM automatically.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
default-configs/mips64el-softmmu.mak | 1 +
hw/mips/Kconfig | 10 +
hw/mips/Makefile.objs| 1 +
hw/mips/mips_l
add their bit-fields as well.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
target/mips/cpu.h| 28 +
target/mips/internal.h | 2 +
target/mips/mips-defs.h | 7 +++-
target/mips/translate.c | 2 +
target/mips/trans
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
MAINTAINERS | 5 +
1 file changed, 5 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index fc3d1b0..8d5cfec 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1084,6 +1084,11 @@ F: hw/isa/vt82c686.c
F: hw/pci-host/bonito.c
F
Add more CP0 register for save/restore, including: EBase, XContext,
PageGrain, PWBase, PWSize, PWField, PWCtl, Config*, KScratch1~KScratch6.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
target/mips/kvm.c | 212 ++
target/mips
ptional here and QEMU will use the correct type for
TCG/KVM automatically.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
default-configs/mips64el-softmmu.mak | 1 +
hw/mips/Kconfig | 11 +
hw/mips/Makefile.objs| 1 +
hw/mips/loon
MIPS has two types of KVM: TE & VZ, and TE is the default type. Now we
can't create a VZ guest in QEMU because it lacks the kvm_type() hook in
MachineClass. This patch add the the kvm_type() hook to support both of
the two types.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Huacai
Loongson-3 has an integrated liointc (Local I/O interrupt controller).
It is similar to goldfish interrupt controller, but more powerful (e.g.,
it can route external interrupt to multi-cores).
Signed-off-by: Huacai Chen
Signed-off-by: Jiaxun Yang
---
hw/intc/Kconfig| 3 +
hw/intc
3-virt" machine to drop any ISA things;
5, Rework "hw/mips: Implement the kvm_type() hook in MachineClass";
6, Add Jiaxun Yang as a reviewer of Loongson-3.
Huacai Chen(4):
hw/mips: Implement the kvm_type() hook in MachineClass
hw/intc: Add Loongson liointc support
hw/mips: Add Loong
Add myself as a maintainer of Loongson-3 virtual platform, and also add
Jiaxun Yang as a reviewer.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index f0cb1fd..293188e 100644
--- a
Hi, Aleksandar,
On Tue, Jun 23, 2020 at 9:58 PM Aleksandar Markovic
wrote:
>
>
>
> уторак, 23. јун 2020., је написао/ла:
>>
>> Patchew URL:
>> https://patchew.org/QEMU/1592914438-30317-1-git-send-email-che...@lemote.com/
>>
>>
>>
>> Hi,
>>
>> This series seems to have some coding style problems
Hi, Aleksandar,
On Tue, Jun 23, 2020 at 9:50 PM Aleksandar Markovic
wrote:
>
>
>
> уторак, 23. јун 2020., Huacai Chen је написао/ла:
>>
>> Add myself as a maintainer of Loongson-3 virtual platform, and also add
>> Jiaxun Yang as a reviewer.
>>
>> Sign
Hi, Aleksandar,
On Tue, Jun 23, 2020 at 10:04 PM Aleksandar Markovic
wrote:
>
>
>
> уторак, 23. јун 2020., Huacai Chen је написао/ла:
>>
>> Add Loongson-3 based machine support, it use i8259 as the interrupt
>> controler and use GPEX as the pci controller. Currentl
MIPS has two types of KVM: TE & VZ, and TE is the default type. Now we
can't create a VZ guest in QEMU because it lacks the kvm_type() hook in
MachineClass. This patch add the the kvm_type() hook to support both of
the two types.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Huacai
3-virt" machine to drop any ISA things;
5, Rework "hw/mips: Implement the kvm_type() hook in MachineClass";
6, Add Jiaxun Yang as a reviewer of Loongson-3.
V5 -> V6:
1, Fix license preamble;
2, Improve commit messages;
3, Add hw/intc/loongson_liointc.c to MAINTAINERS;
4, Fix all pos
-cpu Loongson-3A4000
-kernel -append ...
The "-cpu" parameter is optional here and QEMU will use the correct type for
TCG/KVM automatically.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
default-configs/mips64el-softmmu.mak | 1 +
hw/mips/Kconfig
Add myself as a maintainer of Loongson-3 virtual platform, and also add
Jiaxun Yang as a reviewer.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 51a4570..0226a74 100644
--- a
quot;I/O中断" section of Loongson-3's user mannual, part 1.
Signed-off-by: Huacai Chen
Signed-off-by: Jiaxun Yang
---
hw/intc/Kconfig| 3 +
hw/intc/Makefile.objs | 1 +
hw/intc/loongson_liointc.c | 241 +
3 files changed, 245 i
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