On 08/15/2013 03:23 PM, Peter Maydell wrote:
On 15 August 2013 23:18, Guenter Roeck wrote:
But doesn't that mean that there is _currently_ no problem ? If so,
we can introduce the additional code when the problem really shows up.
Being Preemptive is good, but if it is not really needed to
On Thu, Aug 15, 2013 at 11:23:58PM +0100, Peter Maydell wrote:
> On 15 August 2013 23:18, Guenter Roeck wrote:
> > But doesn't that mean that there is _currently_ no problem ? If so,
> > we can introduce the additional code when the problem really shows up.
> > Being Pre
On 08/11/2013 03:04 PM, Russell King - ARM Linux wrote:
On Sun, Aug 11, 2013 at 08:54:43AM -0700, Guenter Roeck wrote:
Hi,
trying to boot arm versatile images with qemu results in the following error
if I try to boot with a disk image.
sym0: <895a> rev 0x0 at pci :00:0d.0
On Mon, Aug 12, 2013 at 11:12:50PM +0100, Russell King - ARM Linux wrote:
> On Mon, Aug 12, 2013 at 10:36:17PM +0100, Peter Maydell wrote:
> > On this point, yes. Equivalent bit from the PB926 TRM:
> > http://infocenter.arm.com/help/topic/com.arm.doc.dui0224i/Cacdijji.html
> >
> > (There are diffe
On Mon, Aug 12, 2013 at 11:12:50PM +0100, Russell King - ARM Linux wrote:
> On Mon, Aug 12, 2013 at 10:36:17PM +0100, Peter Maydell wrote:
> > On this point, yes. Equivalent bit from the PB926 TRM:
> > http://infocenter.arm.com/help/topic/com.arm.doc.dui0224i/Cacdijji.html
> >
> > (There are diffe
uenter
---
>From 1e07521e935267f2d63ed3635fb93c7e325e0936 Mon Sep 17 00:00:00 2001
From: Guenter Roeck
Date: Mon, 12 Aug 2013 16:20:18 -0700
Subject: [PATCH] arm: Fix map_irq function for ARM versatile hardware
Booting the ARM versatile in qemu fails with the SCSI controller
timing out as follows:
sym0: <895a
On 08/14/2013 05:44 AM, Peter Maydell wrote:
On 14 August 2013 11:33, Russell King - ARM Linux
wrote:
On Mon, Aug 12, 2013 at 04:04:08PM -0700, Guenter Roeck wrote:
Hacked diff is below. Can I write that up as clean patch and submit it,
or do we need a test on real hardware ?
Well, if we
On Thu, Aug 15, 2013 at 05:45:42PM +0100, Peter Maydell wrote:
> On 13 August 2013 04:40, Guenter Roeck wrote:
> > Patch tested and working with qemu 1.5.2, using the configuration file
> > from the yocto project. Patch applied on top of kernel version 3.11-rc5.
>
> OK, I
On Thu, Aug 15, 2013 at 07:05:22PM +0100, Peter Maydell wrote:
> On 15 August 2013 18:54, Guenter Roeck wrote:
> > On Thu, Aug 15, 2013 at 05:45:42PM +0100, Peter Maydell wrote:
> >> On 13 August 2013 04:40, Guenter Roeck wrote:
> >> > Patch tested and work
On Thu, Aug 15, 2013 at 07:05:22PM +0100, Peter Maydell wrote:
> On 15 August 2013 18:54, Guenter Roeck wrote:
> > On Thu, Aug 15, 2013 at 05:45:42PM +0100, Peter Maydell wrote:
> >> On 13 August 2013 04:40, Guenter Roeck wrote:
> >> > Patch tested and work
On 08/15/2013 02:49 PM, Peter Maydell wrote:
On 15 August 2013 21:50, Guenter Roeck wrote:
On Thu, Aug 15, 2013 at 07:05:22PM +0100, Peter Maydell wrote:
It needs to go in the same patch, because a kernel with the fixed
irq remapping must also tell QEMU it is fixed; if you split the
two then
- 8001
... INITRD_SIZE - 00a01b00
Booting machvec: RTS7751R2D
initrd must be page aligned
initrd disabled
Fix by writing boot parameters with appropriate endianness conversion.
Signed-off-by: Guenter Roeck
---
hw/sh4/r2d.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff
On 10/19/2014 06:58 AM, Chen Gang wrote:
On 10/19/14 21:38, Max Filippov wrote:
On Sun, Oct 19, 2014 at 5:37 PM, Chen Gang wrote:
- running:
./arm-softmmu/qemu-system-arm -M arm-generic-fdt -nographic -smp 2
-machine linux=on -serial mon:stdio -dtb ../linux-xlnx/system.dtb \
On 10/20/2014 08:23 AM, Chen Gang wrote:
On 10/19/2014 10:58 PM, Guenter Roeck wrote:
This doesn't use devicetree, but the configurations are known to be working
with kernel releases all the way back to kernel version 3.10.
Yeah, really it is !
After try upstream qemu and upstream k
On Tue, Oct 21, 2014 at 06:41:14PM +0800, Chen Gang wrote:
> On 10/21/14 12:37, Guenter Roeck wrote:
> > On 10/20/2014 08:23 AM, Chen Gang wrote:
> >> On 10/19/2014 10:58 PM, Guenter Roeck wrote:
> >>>
> >>> This doesn't use devicetree, but th
Michal,
commit 34b9c07a3 (microblaze: Disable stack protection from bootloader) results
in the following qemu crash in 3.14-rc1.
/opt/buildbot/bin/qemu-system-microblaze -M petalogix-s3adsp1800 -kernel
arch/microblaze/boot/linux.bin -no-reboot -append "console=ttyUL0,115200 "
-nographic
qemu: f
On 02/07/2014 06:31 PM, Edgar E. Iglesias wrote:
On Fri, Feb 07, 2014 at 03:17:31PM -0800, Guenter Roeck wrote:
Michal,
commit 34b9c07a3 (microblaze: Disable stack protection from bootloader) results
in the following qemu crash in 3.14-rc1.
/opt/buildbot/bin/qemu-system-microblaze -M
The TCSR register has only 11 valid bits. This is now used by the
linux kernel to auto-detect endianness, and causes Linux 3.15-rc1
and later to hang when run under qemu-microblaze. Mask valid bits
before writing the register to solve the problem.
Signed-off-by: Guenter Roeck
---
hw/timer
The MER register only has two valid bits. This is now used by
the linux kernel to auto-detect endianness, and causes Linux 3.15-rc1
and later to hang when run under qemu-microblaze. Mask valid bits before
writing the register to solve the problem.
Signed-off-by: Guenter Roeck
---
hw/intc
On 10/03/2015 02:31 PM, Peter Crosthwaite wrote:
Hi,
I have done an audit of the ARMv7 boards to see what can boot a
vanilla linux kernel. The basic approach is to build ARM
multi_v7_defconfig kernel and boot QEMU using the DTBs built out by
the kernel. The intersection of what mainline Linux ha
On 10/04/2015 12:56 PM, Beniamino Galvani wrote:
On Sat, Oct 03, 2015 at 02:31:08PM -0700, Peter Crosthwaite wrote:
QEMU cubieboard has no usable storage media, but the real hardware
does have AHCI sata. I added sysbus-ahci at the right place but turns
out the SATA controller has some custom pow
On 10/04/2015 02:38 PM, Beniamino Galvani wrote:
On Sun, Oct 04, 2015 at 02:11:35PM -0700, Guenter Roeck wrote:
What is your qemu command line ?
qemu-system-arm \
-M cubieboard \
-kernel ../linux/zImage-dtb \
-serial stdio \
-append "co
On 10/04/2015 07:21 PM, Peter Crosthwaite wrote:
On Sun, Oct 4, 2015 at 6:08 PM, Guenter Roeck wrote:
On 10/04/2015 02:38 PM, Beniamino Galvani wrote:
On Sun, Oct 04, 2015 at 02:11:35PM -0700, Guenter Roeck wrote:
What is your qemu command line ?
qemu-system-arm \
-M
On 11/02/2015 08:25 PM, Peter Crosthwaite wrote:
From: Guenter Roeck
Add support for the Xilinx XADC core used in Zynq 7000.
Hi Peter,
Wow ... thanks for doing my job!
Owe you a beer or two.
Guenter
References:
- Zynq-7000 All Programmable SoC Technical Reference Manual
- 7 Series FPGAs
("arm64: kernel: enforce pmuserenr_el0 initialization and
restore")
Signed-off-by: Lorenzo Pieralisi
Reported-by: Guenter Roeck
Tested-by: Guenter Roeck
Cc: Will Deacon
Cc: Peter Maydell
Cc: Mark Rutland
Hi,
this patch is still missing in mainline.
Did it get lost ?
Thank
On Thu, Nov 12, 2015 at 09:54:55AM -0800, Peter Crosthwaite wrote:
> From: Guenter Roeck
>
> Add support for the Xilinx XADC core used in Zynq 7000.
>
> References:
> - Zynq-7000 All Programmable SoC Technical Reference Manual
> - 7 Series FPGAs and Zynq-7000 All Programma
On 11/27/2015 12:26 PM, Peter Crosthwaite wrote:
On Fri, Nov 27, 2015 at 11:54 AM, Jean-Christophe DUBOIS
wrote:
Le 27/11/2015 03:39, Peter Crosthwaite a écrit :
On Wed, Nov 25, 2015 at 11:16 PM, Jean-Christophe Dubois
wrote:
Signed-off-by: Jean-Christophe Dubois
This seems to slow down bo
t
> implemented in the core.
>
> Signed-off-by: Lorenzo Pieralisi
> Reported-by: Guenter Roeck
With qemu 2.5:
Tested-by: Guenter Roeck
> Cc: Will Deacon
> Cc: Peter Maydell
> Cc: Mark Rutland
> ---
> Based on arm64 for-next/perf branch.
>
> Tested on QEMU and Ju
Hi all,
since commit 60792ad349f3 ("arm64: kernel: enforce pmuserenr_el0 initialization
and restore"), my arm64 qemu tests of linux-next are failing. After this commit,
qemu does not display any output.
Qemu version is 2.5.0. Linux kernel configuration is arm64:defconfig.
qemu command line is a
On 01/07/2016 07:53 AM, Lorenzo Pieralisi wrote:
On Thu, Jan 07, 2016 at 01:25:35PM +, Peter Maydell wrote:
On 24 December 2015 at 00:52, Guenter Roeck wrote:
Hi all,
since commit 60792ad349f3 ("arm64: kernel: enforce pmuserenr_el0
initialization
and restore"), my arm64 qem
On 01/07/2016 08:56 AM, Peter Maydell wrote:
On 7 January 2016 at 16:37, Lorenzo Pieralisi wrote:
On Thu, Jan 07, 2016 at 03:58:15PM +, Peter Maydell wrote:
On 7 January 2016 at 15:53, Lorenzo Pieralisi wrote:
Ok, thanks for looking into this. I wonder why reading pmcr_el0 does
not suffe
With Linux kernel version 3.3 or later, qemu fails with the following message:
sh_serial: unsupported read from 0x18
Aborted
Reported-and-analyzed-by: Rob Landley
Signed-off-by: Guenter Roeck
---
See http://lists.nongnu.org/archive/html/qemu-devel/2012-07/msg03870.html
for Rob's analys
On 09/08/2013 12:51 AM, Peter Maydell wrote:
On 8 September 2013 08:39, Guenter Roeck wrote:
With Linux kernel version 3.3 or later, qemu fails with the following message:
sh_serial: unsupported read from 0x18
Aborted
Reported-and-analyzed-by: Rob Landley
Signed-off-by: Guenter Roeck
On 09/08/2013 12:39 AM, Guenter Roeck wrote:
With Linux kernel version 3.3 or later, qemu fails with the following message:
sh_serial: unsupported read from 0x18
Aborted
Reported-and-analyzed-by: Rob Landley
Signed-off-by: Guenter Roeck
ping ...
---
See http://lists.nongnu.org/archive
* 20 / 2) = 33 Khz to make Linux happy.
Signed-off-by: Guenter Roeck
---
hw/misc/zynq_slcr.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/misc/zynq_slcr.c b/hw/misc/zynq_slcr.c
index 964f253..d3e1ce0 100644
--- a/hw/misc/zynq_slcr.c
+++ b/hw/misc/zynq_slcr.c
If host and target endianness does not match, loding an initramfs does not work.
Fix by writing boot parameters with appropriate endianness conversion.
Signed-off-by: Guenter Roeck
---
hw/sh4/r2d.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/sh4/r2d.c b/hw/sh4
devicetree
files zynq-zc702.dtb and zynq-zc706.dtb, and kernel configuration
multi_v7_defconfig.
Signed-off-by: Guenter Roeck
---
hw/arm/xilinx_zynq.c | 5 +
hw/misc/Makefile.objs | 1 +
hw/misc/zynq_xadc.c | 305 ++
3 files changed, 311
Hi Edgar,
On 09/08/2015 11:39 AM, Edgar E. Iglesias wrote:
On Wed, Aug 12, 2015 at 02:33:47PM -0700, Guenter Roeck wrote:
Add support for the Xilinx XADC core used in Zynq 7000.
References:
- Zynq-7000 All Programmable SoC Technical Reference Manual
- 7 Series FPGAs and Zynq-7000 All
Hi Peter,
On Thu, Sep 10, 2015 at 04:26:13PM -0700, Peter Crosthwaite wrote:
> On Wed, Aug 12, 2015 at 7:24 AM, Guenter Roeck wrote:
> > The Linux kernel only accepts 34 Khz and 67 Khz clock rates, and
> > may crash if the actual clock rate is too low. The clock rate use
* 20 / 2) = 33 Khz for to make Linux happy.
Limit the change to Linux boots only.
Signed-off-by: Guenter Roeck
---
v2: Limit scope of change to Linux boots.
hw/misc/zynq_slcr.c | 29 +++--
1 file changed, 27 insertions(+), 2 deletions(-)
diff --git a/hw/misc
devicetree
files zynq-zc702.dtb and zynq-zc706.dtb, and kernel configuration
multi_v7_defconfig.
Signed-off-by: Guenter Roeck
---
v2: Use extract32()
Merge zynq_xadc_reset() and _zynq_xadc_reset() into one function
Use "xlnx,zynq_xadc"
Move device model to include/hw/misc/z
On 09/13/2015 01:22 PM, Peter Crosthwaite wrote:
On Sat, Sep 12, 2015 at 2:06 PM, Guenter Roeck wrote:
The Linux kernel only accepts 34 Khz and 67 Khz clock rates, and
may crash if the actual clock rate is too low. The clock rate used to be
(ps-clk-frequency * 26 / 4), which resulted
Peter,
On 09/13/2015 01:47 PM, Peter Maydell wrote:
On 13 September 2015 at 21:22, Peter Crosthwaite
wrote:
On Sat, Sep 12, 2015 at 2:06 PM, Guenter Roeck wrote:
The Linux kernel only accepts 34 Khz and 67 Khz clock rates, and
may crash if the actual clock rate is too low. The clock
On 09/14/2015 06:17 AM, Nathan Rossi wrote:
On Mon, Sep 14, 2015 at 10:07 PM, Peter Maydell
wrote:
On 13 September 2015 at 23:42, Peter Crosthwaite
wrote:
On Sun, Sep 13, 2015 at 1:47 PM, Peter Maydell wrote:
On 13 September 2015 at 21:22, Peter Crosthwaite
wrote:
There may be more change
upt before
starting to send data, causing transmit stalls until there is an interrupt
for another reason.
Signed-off-by: Guenter Roeck
---
hw/char/imx_serial.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/hw/char/imx_serial.c b/hw/char/imx_serial.c
index f3fbc77..8dc7
Hi,
when running qemu version 2.6.0-rc3, I get the following error message.
/opt/buildbot/qemu/qemu/tcg/tcg.c:1769: tcg fatal error
qemu command line is as follows.
qemu-system-ppc64 -M mpc8544ds \
-cpu e5500 \
-m 1024 -kernel arch/powerpc/boot/uImage -initrd busybox-ppc.cpio \
On Wed, Apr 27, 2016 at 08:57:24AM +0200, Aurelien Jarno wrote:
> On 2016-04-26 20:12, Guenter Roeck wrote:
> > Hi,
> >
> > when running qemu version 2.6.0-rc3, I get the following error message.
> >
> > /opt/buildbot/qemu/qemu/tcg/tcg.c:1769: tcg fatal error
Hi,
In qemu version 2.6.0-rc3, qemu-system-x86_64 hangs for me for some CPU/machine
combinations. Some affected combinations are SandyBridge (q35), Haswell (q35),
Opteron_G4 (pc), IvyBridge (q35). Some working combinations are core2duo (pc),
Nehalem (q35), phenom (pc), Opteron_G1 (q35).
On the br
On 7/24/23 00:18, Bernhard Beschow wrote:
Am 16. Juli 2023 19:53:37 UTC schrieb Bernhard Beschow :
Am 10. Juli 2023 16:01:46 UTC schrieb Bernhard Beschow :
Am 10. Juli 2023 10:16:35 UTC schrieb "Philippe Mathieu-Daudé"
:
On 9/7/23 10:09, Bernhard Beschow wrote:
Since commit c0a55a0c9da
On 8/1/23 09:01, Peter Maydell wrote:
On Sat, 24 Jun 2023 at 16:02, Guenter Roeck wrote:
On 6/24/23 07:23, Guenter Roeck wrote:
On 6/24/23 03:40, Peter Maydell wrote:
On Fri, 23 Jun 2023 at 20:33, Guenter Roeck wrote:
On 6/23/23 10:44, Peter Maydell wrote:
On Sat, 17 Jun 2023 at 17:29
Hi,
On Tue, Feb 13, 2024 at 02:42:29PM +0100, Marcin Juszkiewicz wrote:
>
> > > The one SA1110 machine:
> > >
> > > collie Sharp SL-5500 (Collie) PDA (SA-1110)
> > >
> > I do test collie.
>
> Can you share kernel/initrd/config? I wanted to boot something at 20th
> anniversary of
On Tue, Feb 13, 2024 at 03:14:21PM +, Peter Maydell wrote:
> On Mon, 12 Feb 2024 at 14:36, Guenter Roeck wrote:
> > On 2/12/24 04:32, Peter Maydell wrote:
> > > The machines I have in mind are:
> > >
> > > PXA2xx machines:
> > >
> > > a
Cc: Helge Deller
Signed-off-by: Guenter Roeck
---
target/hppa/helper.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/target/hppa/helper.c b/target/hppa/helper.c
index 859644c47a..7b798d1227 100644
--- a/target/hppa/helper.c
+++ b/target/hppa/helper.c
@@ -76,7 +76,
On 2/15/24 22:16, Richard Henderson wrote:
On 2/15/24 19:34, Guenter Roeck wrote:
- env->psw = psw & ~(PSW_N | PSW_V | PSW_CB);
+ if (hppa_is_pa20(env)) {
+ env->psw = psw & ~(PSW_N | PSW_V | PSW_CB | 0xffull);
+ } else {
+ env->psw = psw
ve the problem unconditionally.
Fixes: 931adff31478 ("target/hppa: Update cpu_hppa_get/put_psw for hppa64")
Cc: Richard Henderson
Cc: Charlie Jenkins
Cc: Helge Deller
Reviewed-by: Richard Henderson
Signed-off-by: Guenter Roeck
---
v2: Rework to not require conditional code [
On 2/17/24 01:06, Michael Tokarev wrote:
28.02.2023 20:11, Guenter Roeck wrote:
Host drivers do not necessarily set cdb_len in megasas io commands.
With commits 6d1511cea0 ("scsi: Reject commands if the CDB length
exceeds buf_len") and fe9d8927e2 ("scsi: Add buf_len parameter
Hi,
On Mon, Jan 08, 2024 at 02:03:25PM +, Nikita Ostrenkov wrote:
> Signed-off-by: Nikita Ostrenkov
> ---
This patch, with the "sabrelite" emulation and the Linux upstream kernel
(v6.8-rc1, using imx_v6_v7_defconfig), results in:
qemu-system-arm: ../system/memory.c:2750: memory_region_set_a
On Sat, Jan 27, 2024 at 11:11:58AM -0800, Guenter Roeck wrote:
> Hi,
>
> On Mon, Jan 08, 2024 at 02:03:25PM +, Nikita Ostrenkov wrote:
> > Signed-off-by: Nikita Ostrenkov
> > ---
>
> This patch, with the "sabrelite" emulation and the Lin
On Sat, Jan 27, 2024 at 11:11:58AM -0800, Guenter Roeck wrote:
> Hi,
>
> On Mon, Jan 08, 2024 at 02:03:25PM +, Nikita Ostrenkov wrote:
> > Signed-off-by: Nikita Ostrenkov
> > ---
>
> This patch, with the "sabrelite" emulation and the Lin
.
Fixes: d64e5eabc4c7 ("pci: Add support for Designware IP block")
Cc: Andrey Smirnov
Cc: Nikita Ostrenkov
Signed-off-by: Guenter Roeck
---
hw/pci-host/designware.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c
index dd9e
On Thu, Feb 01, 2024 at 02:58:40PM +, Peter Maydell wrote:
> On Mon, 29 Jan 2024 at 06:00, Guenter Roeck wrote:
> >
> > The latest version of qemu (v8.2.0-869-g7a1dc45af5) crashes when booting
> > the mcimx7d-sabre emulation with Linux v5.11 and later.
> >
>
Hi,
On Sat, Jan 13, 2024 at 06:57:20AM +0100, del...@kernel.org wrote:
> From: Helge Deller
>
> Recognize the qemu --nodefaults option, which will disable the
> following default devices on hppa:
> - lsi53c895a SCSI controller,
> - artist graphics card,
> - LASI 82596 NIC,
> - tulip PCI NIC,
> -
On Fri, Feb 02, 2024 at 10:54:20AM +0100, Helge Deller wrote:
> Hi Guenter,
>
> On 2/2/24 05:22, Guenter Roeck wrote:
> > On Sat, Jan 13, 2024 at 06:57:20AM +0100, del...@kernel.org wrote:
> > > From: Helge Deller
> > >
> > > Recognize the qemu -
Hi Helge,
On Thu, Feb 01, 2024 at 08:22:58PM -0800, Guenter Roeck wrote:
> Hi,
>
> On Sat, Jan 13, 2024 at 06:57:20AM +0100, del...@kernel.org wrote:
> > From: Helge Deller
> >
> > Recognize the qemu --nodefaults option, which will disable the
> >
On 2/12/24 04:32, Peter Maydell wrote:
QEMU includes some models of old Arm machine types which are
a bit problematic for us because:
* they're written in a very old way that uses numerous APIs that we
would like to get away from (eg they don't use qdev, they use
qemu_system_reset_reque
[ sorry for the earlier noise; accidentally hit "send" ]
On 2/12/24 04:32, Peter Maydell wrote:
QEMU includes some models of old Arm machine types which are
a bit problematic for us because:
* they're written in a very old way that uses numerous APIs that we
would like to get away from (eg
On Fri, Mar 08, 2024 at 03:41:48PM +, Peter Maydell wrote:
> On Tue, 13 Feb 2024 at 15:36, Guenter Roeck wrote:
> >
> > On Tue, Feb 13, 2024 at 03:14:21PM +, Peter Maydell wrote:
> > > On Mon, 12 Feb 2024 at 14:36, Guenter Roeck wrote:
> > > > O
Hi,
when testing usb-ohci with qemu's pci-ohci emulation, I keep getting
random usb interface timeouts. Sometimes the usb_hub_wq times out.
[9.555666] Waiting for root device /dev/sda...
[ 62.452625] INFO: task kworker/0:2:42 blocked for more than 30 seconds.
[ 62.453036] Tainted: G
Hi Alan,
On 4/23/24 10:30, Alan Stern wrote:
On Tue, Apr 23, 2024 at 10:04:17AM -0700, Guenter Roeck wrote:
Hi,
when testing usb-ohci
What is usb-ohci? Do you mean ohci-hcd?
with qemu's pci-ohci emulation, I keep getting
random usb interface timeouts. Sometimes the usb_hub_wq time
On 4/23/24 19:11, Alan Stern wrote:
[ ... ]
To avoid the overhead of repeated interrupts, it would be best to check the
interrupt status at the end of the routine and restart if any of the
enabled bits are set, as in your first patch.
If you would like to clean it up (get rid of the debugging s
On 4/24/24 04:16, Gerd Hoffmann wrote:
qemu hack:
hw/usb/hcd-ohci.c | 11 +++
hw/usb/hcd-ohci.h | 1 +
2 files changed, 12 insertions(+)
diff --git a/hw/usb/hcd-ohci.c b/hw/usb/hcd-ohci.c
index fc8fc91a1d..99e52ad13a 100644
--- a/hw/usb/hcd-ohci.c
+++ b/hw/usb/hcd-ohci.c
@@ -267,6
On 4/24/24 08:23, Guenter Roeck wrote:
On 4/24/24 04:16, Gerd Hoffmann wrote:
qemu hack:
hw/usb/hcd-ohci.c | 11 +++
hw/usb/hcd-ohci.h | 1 +
2 files changed, 12 insertions(+)
diff --git a/hw/usb/hcd-ohci.c b/hw/usb/hcd-ohci.c
index fc8fc91a1d..99e52ad13a 100644
--- a/hw/usb/hcd
Hi,
On Thu, Feb 08, 2024 at 07:12:40PM +0100, Philippe Mathieu-Daudé wrote:
> We should not wire IRQs on unrealized device.
>
> Signed-off-by: Philippe Mathieu-Daudé
> Reviewed-by: Peter Maydell
> Reviewed-by: Yoshinori Sato
qemu 9.0 fails to boot Linux from ide/ata drives with the sh4
and sh
On Fri, Oct 18, 2019 at 03:31:49PM +0100, Peter Maydell wrote:
> From: Guenter Roeck
>
> When booting a recent Linux kernel, the qemu message "Timer with delta
> zero, disabling" is seen, apparently because a ptimer is started before
> being initialized. Fix the pr
On Wed, Feb 12, 2020 at 10:39:30PM +0100, Philippe Mathieu-Daudé wrote:
> Cc'ing Jean-Christophe and Peter.
>
> On 2/12/20 7:46 PM, Guenter Roeck wrote:
> > Hi,
> >
> > I have been playing with pflash recently. For the most part it works,
> > but I
On 2/13/20 1:51 AM, Paolo Bonzini wrote:
On 13/02/20 08:40, Alexey Kardashevskiy wrote:
memory-region: system
- (prio 0, i/o): system
-01ff (prio 0, romd): omap_sx1.flash0-1
-01ff (prio 0, ro
On Thu, Feb 13, 2020 at 04:24:24PM +0100, Philippe Mathieu-Daudé wrote:
> On 2/13/20 3:39 PM, Peter Maydell wrote:
> > On Thu, 13 Feb 2020 at 14:26, Guenter Roeck wrote:
> > > What really puzzles me is that there is no trace output for
> > > flash data accesses
Xilinx USB devices are now instantiated through TYPE_CHIPIDEA,
and xlnx support in the EHCI code is no longer needed.
Signed-off-by: Guenter Roeck
---
hw/usb/hcd-ehci-sysbus.c | 17 -
1 file changed, 17 deletions(-)
diff --git a/hw/usb/hcd-ehci-sysbus.c b/hw/usb/hcd-ehci
Mass Storage device detected
scsi host0: usb-storage 1-1:1.0
Signed-off-by: Guenter Roeck
---
hw/arm/xilinx_zynq.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 3a0fa5b23f..b4a8b2f2c6 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/h
We need to be able to use OHCISysBusState outside hcd-ohci.c, so move it
to its include file.
Signed-off-by: Guenter Roeck
---
hw/usb/hcd-ohci.c | 15 ---
hw/usb/hcd-ohci.h | 16
2 files changed, 16 insertions(+), 15 deletions(-)
diff --git a/hw/usb/hcd-ohci.c b/hw
ohci-platform 1c14400.usb: irq 27, io mem 0x01c14400
ohci-platform 1c1c400.usb: Generic Platform OHCI controller
ohci-platform 1c1c400.usb: new USB bus registered, assigned bus number 4
ohci-platform 1c1c400.usb: irq 32, io mem 0x01c1c400
Signed-off-by: Guenter Roeck
---
hw/arm/allwinner-a10.c
2.0 started, EHCI 1.00
Signed-off-by: Guenter Roeck
---
hw/arm/allwinner-a10.c | 17 +
include/hw/arm/allwinner-a10.h | 2 ++
2 files changed, 19 insertions(+)
diff --git a/hw/arm/allwinner-a10.c b/hw/arm/allwinner-a10.c
index 818145428c..f8b963b5c3 100644
--- a/hw/arm
On 2/14/20 2:08 AM, Gerd Hoffmann wrote:
ehci-platform 1c1c000.usb: new USB bus registered, assigned bus number 2
ehci-platform 1c1c000.usb: irq 31, io mem 0x01c1c000
ehci-platform 1c1c000.usb: USB 2.0 started, EHCI 1.00
+for (i = 0; i < ARRAY_SIZE(s->ehci); i++) {
+object_
On 2/14/20 1:26 AM, Peter Maydell wrote:
On Fri, 14 Feb 2020 at 06:05, Guenter Roeck wrote:
USB ports must be instantiated as TYPE_CHIPIDEA to work.
Linux expects and checks various chipidea registers, which
do not exist with the basic ehci emulation.
Hi; I didn't see a cover letter
We'll use this property in a follow-up patch to insantiate an EHCI
bus with companion support.
Signed-off-by: Guenter Roeck
---
v2: Added patch
hw/usb/hcd-ehci-sysbus.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/usb/hcd-ehci-sysbus.c b/hw/usb/hcd-ehci-sysbus.c
index b5a01
rious high speed and full speed devices, and by
booting from USB drive.
v2: Add summary
Rewrite to instantiate OHCI in companion mode; add patch 2/3
Merge EHCI and OHCI instantiation into a single patch
--------
Guenter Roeck (3):
We need to be able to use OHCISysBusState outside hcd-ohci.c, so move it
to its include file.
Signed-off-by: Guenter Roeck
---
v2: no changes
hw/usb/hcd-ohci.c | 15 ---
hw/usb/hcd-ohci.h | 16
2 files changed, 16 insertions(+), 15 deletions(-)
diff --git a/hw/usb
detected
scsi host1: usb-storage 2-1:1.0
usb 3-1: new full-speed USB device number 2 using ohci-platform
input: QEMU QEMU USB Mouse as
/devices/platform/soc/1c14400.usb/usb3/3-1/3-1:1.0/0003:0627:0001.0001/input/input0
Signed-off-by: Guenter Roeck
---
v2: Instantiate EHCI and OHCI in a single
now obsolete explicit Xilinx
support from the EHCI code.
v2: Introduced summary
Guenter Roeck (2):
hw/arm/xilinx_zynq: Fix USB port instantiation
hw/usb/hcd-ehci-sysbus: Remove obsolete xlnx,ps7-usb class
hw/arm
512, setting to 64
usb-storage 1-1:1.0: USB Mass Storage device detected
scsi host0: usb-storage 1-1:1.0
Signed-off-by: Guenter Roeck
---
v2: No change
hw/arm/xilinx_zynq.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
Xilinx USB devices are now instantiated through TYPE_CHIPIDEA,
and xlnx support in the EHCI code is no longer needed.
Signed-off-by: Guenter Roeck
---
v2: No change
hw/usb/hcd-ehci-sysbus.c | 17 -
1 file changed, 17 deletions(-)
diff --git a/hw/usb/hcd-ehci-sysbus.c b/hw/usb
On 2/17/20 2:13 AM, Peter Maydell wrote:
On Sat, 15 Feb 2020 at 00:12, Guenter Roeck wrote:
[ ... ]
Hi; I tried to apply this patchset, but it doesn't apply to master.
In particular, master doesn't have a #define for AW_A10_CCM_REG_BASE.
> Is this patchset supposed to be
patch has been applied, access to PCI, ATA, and USB is still
working, and no negative impact has ben observed.
Signed-off-by: Guenter Roeck
---
hw/sh4/sh_pci.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/hw/sh4/sh_pci.c b/hw/sh4/sh_pci.c
index 71afd23b67..4ced54f1a5 100644
--- a/hw/sh4/sh
rious high speed and full speed devices, and by
booting from USB drive.
v3: Rebased to master
v2: Add summary
Rewrite to instantiate OHCI in companion mode; add patch 2/3
Merge EHCI and OHCI instantiation into a single patch
--------
Gue
We need to be able to use OHCISysBusState outside hcd-ohci.c, so move it
to its include file.
Reviewed-by: Gerd Hoffmann
Signed-off-by: Guenter Roeck
---
v3: Rebased to master
Added Gerd's Reviewed-by: tag
v2: no changes
hw/usb/hcd-ohci.c | 15 ---
hw/usb/hcd-ohci.h
We'll use this property in a follow-up patch to insantiate an EHCI
bus with companion support.
Reviewed-by: Gerd Hoffmann
Signed-off-by: Guenter Roeck
---
v3: Rebased to master
Added Gerd's Reviewed-by: tag
v2: Added patch
hw/usb/hcd-ehci-sysbus.c | 2 ++
1 file changed, 2
detected
scsi host1: usb-storage 2-1:1.0
usb 3-1: new full-speed USB device number 2 using ohci-platform
input: QEMU QEMU USB Mouse as
/devices/platform/soc/1c14400.usb/usb3/3-1/3-1:1.0/0003:0627:0001.0001/input/input0
Reviewed-by: Gerd Hoffmann
Signed-off-by: Guenter Roeck
---
v3: Rebased to
: Guenter Roeck
---
hw/arm/mainstone.c | 11 +--
1 file changed, 1 insertion(+), 10 deletions(-)
diff --git a/hw/arm/mainstone.c b/hw/arm/mainstone.c
index b01ce3ce08..6e64dfab50 100644
--- a/hw/arm/mainstone.c
+++ b/hw/arm/mainstone.c
@@ -138,19 +138,10 @@ static void
Up to now, the z2 machine only boots if a flash image is provided.
This is not really necessary; the machine can boot from initrd or from
SD without it. At the same time, having to provide dummy flash images
is a nuisance and does not add any real value. Make it optional.
Signed-off-by: Guenter
On Tue, Feb 18, 2020 at 04:33:49PM +, Peter Maydell wrote:
> On Mon, 17 Feb 2020 at 20:38, Guenter Roeck wrote:
> >
> > The memory alias sh_pci.isa is located at address 0x with
> > a length of 0x4. This results in the following memory tree.
> >
> > F
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