[PATCH v11 08/15] target/hexagon: add flex/bison/glib2 to qemu.yml

Note, the glib2-native mapping exists separately from the normal glib2 mapping. The latter uses a `foreign` cross-policy-default, and libvirt-ci is not able to support package mappings for multiple cross-compilation policies. This will probably change in the future. Signed-off-by: Alessandro Di F

[PATCH v11 01/15] target/hexagon: update MAINTAINERS for idef-parser

From: Alessandro Di Federico Signed-off-by: Alessandro Di Federico Signed-off-by: Anton Johansson Reviewed-by: Richard Henderson Reviewed-by: Taylor Simpson --- MAINTAINERS | 9 + 1 file changed, 9 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 5ce4227ff6..6435d54e33 100

[PATCH v11 03/15] target/hexagon: make slot number an unsigned

From: Paolo Montesel Signed-off-by: Alessandro Di Federico Signed-off-by: Paolo Montesel Acked-by: Richard Henderson Reviewed-by: Taylor Simpson --- target/hexagon/genptr.c | 24 +--- target/hexagon/macros.h | 2 +- 2 files changed, 14 insertions(+), 12 deletions(-) dif

[PATCH v11 09/15] target/hexagon: regenerate docker/cirrus files

This patch updates the docker and cirrus files with the new packages by running tests/lcitool/refresh Signed-off-by: Anton Johansson --- .gitlab-ci.d/cirrus/freebsd-12.vars | 2 +- .gitlab-ci.d/cirrus/freebsd-13.vars | 2 +- .gitlab-ci.d/cirrus/macos-11.vars

[PATCH v11 00/15] target/hexagon: introduce idef-parser

This patchset introduces the idef-parser for target/hexagon. It's the eleventh iteration of the patchset and includes fixes suggested in previous iterations. idef-parser is a build-time tool built using flex and bison. Its aim is to generate a large part of the tiny code generator frontend for He

[PATCH v11 02/15] target/hexagon: import README for idef-parser

From: Alessandro Di Federico Signed-off-by: Alessandro Di Federico Signed-off-by: Anton Johansson Reviewed-by: Taylor Simpson --- target/hexagon/README | 5 + target/hexagon/idef-parser/README.rst | 722 ++ 2 files changed, 727 insertions(+) create m

[PATCH v11 10/15] target/hexagon: manually add flex/bison/glib2 to remaining containers

Adds our build-time dependencies to containers which build qemu-hexagon, but aren't covered by libvirt-ci. Signed-off-by: Anton Johansson --- .gitlab-ci.d/windows.yml | 6 -- tests/docker/dockerfiles/debian-riscv64-cross.docker | 3 +++ tests/docker/dockerfiles/de

[PATCH v11 05/15] target/hexagon: introduce new helper functions

From: Niccolò Izzo These helpers will be employed by the idef-parser generated code, to correctly implement instruction semantics. "Helper" functions, in the context of this patch, refers to functions which provide a manual TCG implementation of certain features. Signed-off-by: Alessandro Di Fed

[PATCH v11 04/15] target/hexagon: make helper functions non-static

From: Paolo Montesel Make certain helper functions non-static, making them available outside genptr.c. These functions are required by code generated by the idef-parser. This commit also makes some functions in op_helper.c non-static in order to avoid having them marked as unused when using the

[PATCH v11 07/15] target/hexagon: prepare input for the idef-parser

From: Alessandro Di Federico Introduce infrastructure necessary to produce a file suitable for being parsed by the idef-parser. A build option is also added to fully disable the output of idef-parser, which is useful for debugging. Signed-off-by: Alessandro Di Federico Signed-off-by: Anton Joha

[PATCH v11 12/15] target/hexagon: prepare frontend for parser

This patch adds the necessary changes to the Hexagon frontend, required by idef-parser to deal with a :mem_noshuf packet with a store in slot 1 and predicated load in slot 0. Signed-off-by: Anton Johansson --- target/hexagon/cpu.h | 8 target/hexagon/translate.c | 22

[PATCH v11 06/15] target/hexagon: expose next PC in DisasContext

From: Paolo Montesel Signed-off-by: Alessandro Di Federico Signed-off-by: Paolo Montesel Reviewed-by: Richard Henderson Reviewed-by: Taylor Simpson --- target/hexagon/translate.c | 3 ++- target/hexagon/translate.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/target/h

[PATCH v11 11/15] target/hexagon: import lexer for idef-parser

From: Paolo Montesel Signed-off-by: Alessandro Di Federico Signed-off-by: Paolo Montesel Signed-off-by: Anton Johansson Reviewed-by: Taylor Simpson --- target/hexagon/idef-parser/idef-parser.h | 254 +++ target/hexagon/idef-parser/idef-parser.lex | 471 + target

[PATCH v11 15/15] target/hexagon: import additional tests

From: Niccolò Izzo Signed-off-by: Alessandro Di Federico Signed-off-by: Niccolò Izzo Signed-off-by: Anton Johansson Reviewed-by: Taylor Simpson --- tests/tcg/hexagon/Makefile.target | 28 - tests/tcg/hexagon/crt.S| 14 +++ tests/tcg/hexagon/test_abs.S | 17

[PATCH v11 13/15] target/hexagon: import parser for idef-parser

Signed-off-by: Alessandro Di Federico Signed-off-by: Paolo Montesel Signed-off-by: Anton Johansson Reviewed-by: Taylor Simpson --- target/hexagon/idef-parser/idef-parser.y| 964 target/hexagon/idef-parser/parser-helpers.c | 2351 +++ target/hexagon/idef-parser/par

[PATCH v11 14/15] target/hexagon: call idef-parser functions

From: Alessandro Di Federico Extend gen_tcg_funcs.py in order to emit calls to the functions emitted by the idef-parser, if available. Signed-off-by: Alessandro Di Federico Signed-off-by: Anton Johansson Reviewed-by: Taylor Simpson --- target/hexagon/gen_helper_funcs.py | 17 - target/

[PATCH 4/9] target: Use vaddr for hvf_arch_[insert|remove]_hw_breakpoint

Changes the signature of the target-defined functions for inserting/removing hvf hw breakpoints. The address and length arguments are now of vaddr type, which both matches the type used internally in accel/hvf/hvf-all.c and makes the api target-agnostic. Signed-off-by: Anton Johansson --- includ

[PATCH 3/9] target: Use vaddr for kvm_arch_[insert|remove]_hw_breakpoint

Changes the signature of the target-defined functions for inserting/removing kvm hw breakpoints. The address and length arguments are now of vaddr type, which both matches the type used internally in accel/kvm/kvm-all.c and makes the api target-agnostic. Signed-off-by: Anton Johansson --- includ

[PATCH 0/9] Replace remaining target_ulong in system-mode accel

This patchset replaces the remaining uses of target_ulong in the accel/ directory. Specifically, the address type of a few kvm/hvf functions is widened to vaddr, and the address type of the cpu_[st|ld]*() functions is changed to abi_ptr (which is re-typedef'd to vaddr in system mode). As a starti

[PATCH 5/9] Replace target_ulong with abi_ptr in cpu_[st|ld]*()

Changes the address type of the guest memory read/write functions from target_ulong to abi_ptr. (abi_ptr is currently typedef'd to target_ulong but that will change in a following commit.) This will reduce the coupling between accel/ and target/. Note: Function pointers that point to cpu_[st|ld]*(

[PATCH 9/9] accel/tcg: Update run_on_cpu_data static assert

As we are now using vaddr for representing guest addresses, update the static assert to check that vaddr fits in the run_on_cpu_data union. Signed-off-by: Anton Johansson --- accel/tcg/cputlb.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/accel/tcg/cputlb.c b/accel/tc

[PATCH 7/9] include/exec: Widen tlb_hit/tlb_hit_page()

tlb_addr is changed from target_ulong to uint64_t to match the type of a CPUTLBEntry value, and the addressed is changed to vaddr. Signed-off-by: Anton Johansson --- include/exec/cpu-all.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/exec/cpu-all.h b/include/ex

[PATCH 8/9] accel/tcg: Widen address arg. in tlb_compare_set()

Signed-off-by: Anton Johansson --- accel/tcg/cputlb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 8e9dc51cd1..2f97ae2fda 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1108,7 +1108,7 @@ static void tlb_add_large_p

[PATCH 2/9] accel/hvf: Widen pc/saved_insn for hvf_sw_breakpoint

Widens the pc and saved_insn fields of hvf_sw_breakpoint from target_ulong to vaddr. Other hvf_* functions accessing hvf_sw_breakpoint are also widened to match. Signed-off-by: Anton Johansson --- include/sysemu/hvf.h | 6 +++--- accel/hvf/hvf-accel-ops.c | 4 ++-- accel/hvf/hvf-all.c

[PATCH 1/9] accel/kvm: Widen pc/saved_insn for kvm_sw_breakpoint

Widens the pc and saved_insn fields of kvm_sw_breakpoint from target_ulong to vaddr. The pc argument of kvm_find_sw_breakpoint is also widened to match. Signed-off-by: Anton Johansson --- include/sysemu/kvm.h | 6 +++--- accel/kvm/kvm-all.c | 3 +-- 2 files changed, 4 insertions(+), 5 deletions

[PATCH 6/9] include/exec: typedef abi_ptr to vaddr in softmmu

In system mode, abi_ptr is primarily used for representing addresses when accessing guest memory with cpu_[st|ld]*(). Widening it from target_ulong to vaddr reduces the target dependence of these functions and is step towards building accel/ once for system mode. Signed-off-by: Anton Johansson --

Re: [PATCH v1 18/21] hexagon: correct typos

On 20/02/24, Philippe Mathieu-Daudé wrote: > On 20/2/24 09:52, Manos Pitsidianakis wrote: > > Correct typos automatically found with the `typos` tool > > > > > > Signed-off-by: Manos Pitsidianakis > > --- > > target/hexagon/idef-parser/macros.inc | 2 +- > > 1

Re: [PATCH 00/33] hw/core: Introduce CPUClass hook for mmu_index

On 30/01/24, Richard Henderson wrote: > While the primary use of mmu_index is for the softmmu index for > system-mode tcg, it has a secondary use in encoding cpu state for > the page table walker, and thus depending on the target may also > be used by memory_rw_debug with kvm et al. > > This is wh

Re: [PATCH v2 0/3] Hexagon (target/hexagon) Only pass env to generated helper when needed

On 06/02/24, Taylor Simpson wrote: > Currently, we pass env to every generated helper. When the semantics of > the instruction only depend on the arguments, this is unnecessary and > adds extra overhead to the helper call. > > Changes in v2 > - Separate patches to pass P0 and SP explici

Ideas on dealing with mttcg_enabled/use_icount globals

Hi Phil, I've been staring myself blind trying to deal with qemu_tcg_mttcg_enabled()/icount_enabled() and I'm wondering if you have an ideas. I'm leaning towards moving these globals to some TCG accelerator specific state (TCGState?) that's initialized once we know how many/what cpus are in the s

Re: [PATCH-for-9.1 1/8] target/microblaze: Use correct string format in do_unaligned_access()

On 19/03/24, Philippe Mathieu-Daudé wrote: > 'addr' is of type 'vaddr'; no need to cast, use the > corresponding format string. > > Fixes: ab0c8d0f5b ("target/microblaze: Use cc->do_unaligned_access") > Signed-off-by: Philippe Mathieu-Daudé > --- > target/microblaze/helper.c | 4 ++-- > 1 file c

Re: [PATCH-for-9.1 2/8] target/microblaze: Use hwaddr/vaddr in cpu_get_phys_page_attrs_debug()

On 19/03/24, Philippe Mathieu-Daudé wrote: > Signed-off-by: Philippe Mathieu-Daudé > --- > target/microblaze/helper.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c > index 0a12c4ea94..3f410fc7b5 100644 > --- a/t

Re: [PATCH-for-9.1 3/8] target/microblaze: Widen vaddr in mmu_translate()

On 19/03/24, Philippe Mathieu-Daudé wrote: > Use 'vaddr' type for virtual addresses. > > Signed-off-by: Philippe Mathieu-Daudé > --- > target/microblaze/mmu.h | 2 +- > target/microblaze/mmu.c | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/target/microblaze/mmu.h b/

Re: [PATCH-for-9.1 4/8] target/microblaze: Use 32-bit destination in gen_goto_tb()

On 19/03/24, Philippe Mathieu-Daudé wrote: > cpu_pc and jmp_dest are 32-bit. > > Signed-off-by: Philippe Mathieu-Daudé > --- > target/microblaze/translate.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c > i

Re: [PATCH-for-9.1 6/8] target/microblaze: Rename helper.c -> sys_helper.c

On 19/03/24, Philippe Mathieu-Daudé wrote: > helper.c only contains system emulation helpers, > rename it as sys_helper.c. > Adapt meson and remove pointless #ifdef'ry. > > Signed-off-by: Philippe Mathieu-Daudé > --- > target/microblaze/{helper.c => sys_helper.c} | 5 + > target/microblaze/m

Re: [PATCH-for-9.1 7/8] target/microblaze: Move MMU helpers to sys_helper.c

On 19/03/24, Philippe Mathieu-Daudé wrote: > MMU helpers are only used during system emulation, > move them to sys_helper.c. > > Signed-off-by: Philippe Mathieu-Daudé > --- > target/microblaze/op_helper.c | 48 -- > target/microblaze/sys_helper.c | 47 +++

Re: [PATCH-for-9.1 5/8] target/microblaze: Restrict 64-bit 'res_addr' to system emulation

On 19/03/24, Philippe Mathieu-Daudé wrote: > 'res_addr' is only used in system emulation, where we have > TARGET_LONG_BITS = 64, so we can directly use the native > uint64_t type instead of target_ulong. > > Signed-off-by: Philippe Mathieu-Daudé > --- > target/microblaze/cpu.h | 10 +--

Re: [RFC PATCH-for-9.1 8/8] target/microblaze: Widen $ear to 64-bit

On 19/03/24, Philippe Mathieu-Daudé wrote: > The Exception Address Register is 64-bit wide. > User emulation only access the 32 lower bits. > > Signed-off-by: Philippe Mathieu-Daudé > --- > target/microblaze/cpu.h | 2 +- > linux-user/elfload.c | 2 +- > target/microblaze/gdbstub.

Re: [PATCH 02/24] exec: Declare CPUBreakpoint/CPUWatchpoint type in 'breakpoint.h' header

On 18/04/24, Philippe Mathieu-Daudé wrote: > On 18/4/24 21:25, Philippe Mathieu-Daudé wrote: > > The CPUBreakpoint and CPUWatchpoint structures are declared > > in "hw/core/cpu.h", which contains declarations related to > > CPUState and CPUClass. Some source files only require the > > BP/WP definit

Re: [PATCH 07/24] exec: Un-inline tlb_vaddr_to_host() and declare it in 'exec/cputlb.h'

On 18/04/24, Philippe Mathieu-Daudé wrote: > Declare tlb_vaddr_to_host() in "exec/cputlb.h" with the CPU TLB > API. Un-inline the user emulation definition to avoid including > "exec/cpu_ldst.h" (which declares g2h) in "exec/cputlb.h". > > Signed-off-by: Philippe Mathieu-Daudé > --- > include/ex

Re: [PATCH 11/24] exec: Move tlb_reset_dirty*() declarations to 'exec/cputlb.h'

On 18/04/24, Philippe Mathieu-Daudé wrote: > Declare tlb_reset_dirty() and tlb_reset_dirty_range_all() > in "exec/cputlb.h". Restrict tlb_reset_dirty_range_all() > to TCG accel. > > Signed-off-by: Philippe Mathieu-Daudé > --- > include/exec/cputlb.h | 12 +++- > include/exec/exec-all.h

Re: [PATCH 09/24] physmem: Restrict TCG CPU IOTLB code to TCG accel

On 18/04/24, Philippe Mathieu-Daudé wrote: > Restrict iotlb_to_section(), address_space_translate_for_iotlb() > and memory_region_section_get_iotlb() to TCG. Declare them in > "exec/cputlb.h". Declare iotlb_to_section() using the > MemoryRegionSection typedef. > > Signed-off-by: Philippe Mathieu-D

Re: [PATCH 14/24] exec: Rename 'exec/user/guest-base.h' as 'user/guest-base.h'

On 18/04/24, Philippe Mathieu-Daudé wrote: > The include/user/ directory contains the user-emulation > specific headers. Move guest-base.h there too. > > Signed-off-by: Philippe Mathieu-Daudé > --- > include/exec/cpu-all.h | 2 +- > include/{exec => }/user/guest-base.h | 4 ++-- >

Re: [PATCH 15/24] exec: Restrict inclusion of 'user/guest-base.h'

On 18/04/24, Philippe Mathieu-Daudé wrote: > Declare 'have_guest_base' in "user/guest-base.h". > > Very few files require this header, so explicitly include > it there instead of "exec/cpu-all.h" which is used in many > source files. > > Assert this user-specific header is only included from user

Re: [PATCH 16/24] exec: Move GUEST_ADDR_MAX definition to 'cpu_ldst.h'

On 18/04/24, Philippe Mathieu-Daudé wrote: > GUEST_ADDR_MAX is only used in accel/tcg/user-exec.c > and "exec/cpu_ldst.h". Move it from "exec/cpu-all.h" > to "exec/cpu_ldst.h" so we can avoid including > "exec/cpu-all.h" in accel/tcg/user-exec.c. > > Signed-off-by: Philippe Mathieu-Daudé > --- >

Re: [PATCH 20/24] hw/xtensa: Include missing 'exec/cpu-common.h' in 'bootparam.h'

On 18/04/24, Philippe Mathieu-Daudé wrote: > cpu_physical_memory_write() is declared in "exec/cpu-common.h". > > Signed-off-by: Philippe Mathieu-Daudé > --- > hw/xtensa/bootparam.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/hw/xtensa/bootparam.h b/hw/xtensa/bootparam.h > index a

Re: [PATCH 07/24] exec: Un-inline tlb_vaddr_to_host() and declare it in 'exec/cputlb.h'

On 25/04/24, Anton Johansson via wrote: > On 18/04/24, Philippe Mathieu-Daudé wrote: > > Declare tlb_vaddr_to_host() in "exec/cputlb.h" with the CPU TLB > > API. Un-inline the user emulation definition to avoid including > > "exec/cpu_ldst.h&quo

[PATCH 1/4] target/hexagon: idef-parser remove unused defines

Before switching to GArray/g_string_printf we used fixed size arrays for output buffers and instructions arguments among other things. Macros defining the sizes of these buffers were left behind, remove them. Signed-off-by: Anton Johansson --- target/hexagon/idef-parser/idef-parser.h | 10 -

[PATCH 0/4] target/hexagon: Minor idef-parser cleanup

Was running idef-parser with valgrind and noticed we were leaking the init_list GArray, which is used to hold instruction arguments that may need initialization. This patchset fixes the leak, removes unused macros and undefined functions, and simplifies gen_inst_init_args() to only handle predicat

[PATCH 3/4] target/hexagon: idef-parser fix leak of init_list

gen_inst_init_args() is called for instructions using a predicate as an rvalue. Upon first call, the list of arguments which might need initialization init_list is freed to indicate that they have been processed. For instructions without an rvalue predicate, gen_inst_init_args() isn't called and in

[PATCH 4/4] target/hexagon: idef-parser simplify predicate init

Only predicate instruction arguments need to be initialized by idef-parser. This commit removes registers from the init_list and simplifies gen_inst_init_args() slightly. Signed-off-by: Anton Johansson --- target/hexagon/idef-parser/idef-parser.y| 2 -- target/hexagon/idef-parser/parser-hel

[PATCH 2/4] target/hexagon: idef-parser remove undefined functions

Signed-off-by: Anton Johansson --- target/hexagon/idef-parser/parser-helpers.h | 13 - 1 file changed, 13 deletions(-) diff --git a/target/hexagon/idef-parser/parser-helpers.h b/target/hexagon/idef-parser/parser-helpers.h index 7c58087169..2087d534a9 100644 --- a/target/hexagon/idef

Re: [PATCH 3/4] target/hexagon: idef-parser fix leak of init_list

On 06/05/24, ltaylorsimp...@gmail.com wrote: > > > > -Original Message- > > From: Anton Johansson > > Sent: Monday, May 6, 2024 1:31 PM > > To: qemu-devel@nongnu.org > > Cc: a...@rev.ng; ltaylorsimp...@gmail.com; bc...@quicinc.com > > Subject: [PATCH 3/4] target/hexagon: idef-parser fix

Re: [PATCH 4/4] target/hexagon: idef-parser simplify predicate init

On 06/05/24, ltaylorsimp...@gmail.com wrote: > > > > -Original Message- > > From: Anton Johansson > > Sent: Monday, May 6, 2024 1:31 PM > > To: qemu-devel@nongnu.org > > Cc: a...@rev.ng; ltaylorsimp...@gmail.com; bc...@quicinc.com > > Subject: [PATCH 4/4] target/hexagon: idef-parser simp

Re: [PATCH 3/4] target/hexagon: idef-parser fix leak of init_list

On 07/05/24, ltaylorsimp...@gmail.com wrote: > > > > -Original Message- > > From: 'Anton Johansson' > > Sent: Tuesday, May 7, 2024 4:47 AM > > To: ltaylorsimp...@gmail.com > > Cc: qemu-devel@nongnu.org; a...@rev.ng; bc...@quicinc.com > > Subject: Re: [PATCH 3/4] target/hexagon: idef-pars

[PATCH v2 3/4] target/hexagon: idef-parser fix leak of init_list

gen_inst_init_args() is called for instructions using a predicate as an rvalue. Upon first call, the list of arguments which might need initialization init_list is freed to indicate that they have been processed. For instructions without an rvalue predicate, gen_inst_init_args() isn't called and in

[PATCH v2 2/4] target/hexagon: idef-parser remove undefined functions

Signed-off-by: Anton Johansson Reviewed-by: Taylor Simpson --- target/hexagon/idef-parser/parser-helpers.h | 13 - 1 file changed, 13 deletions(-) diff --git a/target/hexagon/idef-parser/parser-helpers.h b/target/hexagon/idef-parser/parser-helpers.h index 7c58087169..2087d534a9 100

[PATCH v2 4/4] target/hexagon: idef-parser simplify predicate init

Only predicate instruction arguments need to be initialized by idef-parser. This commit removes registers from the init_list and simplifies gen_inst_init_args() slightly. Signed-off-by: Anton Johansson --- target/hexagon/idef-parser/idef-parser.y| 2 -- target/hexagon/idef-parser/parser-hel

[PATCH v2 0/4] target/hexagon: Minor idef-parser cleanup

Was running idef-parser with valgrind and noticed we were leaking the init_list GArray, which is used to hold instruction arguments that may need initialization. This patchset fixes the leak, removes unused macros and undefined functions, and simplifies gen_inst_init_args() to only handle predicat

[PATCH v2 1/4] target/hexagon: idef-parser remove unused defines

Before switching to GArray/g_string_printf we used fixed size arrays for output buffers and instructions arguments among other things. Macros defining the sizes of these buffers were left behind, remove them. Signed-off-by: Anton Johansson Reviewed-by: Taylor Simpson --- target/hexagon/idef-pa

Re: [PATCH] Hexagon (translate.c): avoid redundant PC updates on COF

On 3/22/23 22:17, Matheus Tavares Bernardino wrote: When there is a conditional change of flow or an endloop instruction, we preload HEX_REG_PC with ctx->next_PC at gen_start_packet(). Nonetheless, we still generate TCG code to do this update again at gen_goto_tb() when the condition for the CO

Re: [PATCH 2/3] accel/tcg: Fix overwrite problems of tcg_cflags

On 4/3/23 11:09, liweiwei wrote: On 2023/4/3 16:09, Philippe Mathieu-Daudé wrote: cflags |= parallel ? CF_PARALLEL : 0; cflags |= icount_enabled() ? CF_USE_ICOUNT : 0; +    tcg_debug_assert(!cpu->tcg_cflags); cpu->tcg_cflags = cflags;  } --- Li and Junqiang, what is your use c

Re: [PATCH] Hexagon (target/hexagon) Updates to USR should use get_result_gpr

On 4/5/23 18:42, Taylor Simpson wrote: Signed-off-by: Taylor Simpson --- target/hexagon/gen_tcg.h| 4 +- target/hexagon/genptr.h | 10 ++--- target/hexagon/macros.h | 8 target/hexagon/genptr.c | 49 +++

Re: [PATCH for-8.0] target/ppc: Fix temp usage in gen_op_arith_modw

On 4/7/23 20:36, Richard Henderson wrote: Fix a crash writing to 't3', which is now a constant. Instead, write the result of the remu to 'ret'. Fixes: 7058ff5231a ("target/ppc: Avoid tcg_const_* in translate.c") Reported-by: Nicholas Piggin Signed-off-by: Richard Henderson --- target/ppc/t

Re: [PATCH] Hexagon (target/hexagon) Additional instructions handled by idef-parser

On 4/7/23 22:52, Taylor Simpson wrote: Currently, idef-parser skips all floating point instructions. However, there are some floating point instructions that can be handled. The following instructions are now parsed F2_sfimm_p F2_sfimm_n F2_dfimm_p F2_dfimm_n F2_dfmpy

[PATCH] block: Handle curl 7.55.0, 7.85.0 version changes

* 7.55.0 deprecates CURLINFO_CONTENT_LENGTH_DOWNLOAD in favour of a *_T version, which returns curl_off_t instead of a double. * 7.85.0 deprecates CURLOPT_PROTOCOLS and CURLOPT_REDIR_PROTOCOLS in favour of *_STR variants, specifying the desired protocols via a string. Signed-off-by: Anton Jo

[PATCH] target/hexagon/idef-parser: Remove unused code paths

Removes code paths used by COF instructions, which are no longer processed by idef-parser. Signed-off-by: Anton Johansson --- target/hexagon/idef-parser/idef-parser.h| 1 - target/hexagon/idef-parser/idef-parser.lex | 27 + target/hexagon/idef-parser/idef-parser.y| 45 +

Re: [PATCH v5 01/14] Hexagon (target/hexagon) Add overrides for jumpr31 instructions

Add overrides for SL2_jumpr31Unconditional SL2_jumpr31_t Predicated true (old value) SL2_jumpr31_f Predicated false (old value) SL2_jumpr31_tnew Predicated true (new value) SL2_jumpr31_fnew Predicated false (new value) Signed-o

Re: [PATCH v5 02/14] Hexagon (target/hexagon) Add overrides for callr

+static void gen_callr(DisasContext *ctx, TCGv new_pc) +{ +TCGv next_PC = +tcg_constant_tl(ctx->pkt->pc + ctx->pkt->encod_pkt_size_in_bytes); Could we not use ctx->next_PC here? +gen_log_reg_write(HEX_REG_LR, next_PC); +gen_write_new_pc_addr(ctx, new_pc, TCG_COND_ALWAYS, NULL

Re: [PATCH v5 03/14] Hexagon (target/hexagon) Add overrides for endloop1/endloop01

+ +static void gen_endloop01(DisasContext *ctx) +{ +TCGv lpcfg = tcg_temp_local_new(); Move label declarations here per coding style + +GET_USR_FIELD(USR_LPCFG, lpcfg); + +/* + *if (lpcfg == 1) { + *hex_new_pred_value[3] = 0xff; + *hex_pred_written

Re: [PATCH v5 04/14] Hexagon (target/hexagon) Add overrides for dealloc-return instructions

These instructions perform a deallocframe+return (jumpr r31) Add overrides for L4_return SL2_return L4_return_t L4_return_f L4_return_tnew_pt L4_return_fnew_pt L4_return_tnew_pnt L4_return_fnew_pnt SL2_return_t SL2_return_f SL2_return_tnew

Re: [PULL 00/44] Hexagon update

On 5/13/23 12:22, Richard Henderson wrote: On 5/12/23 22:46, Taylor Simpson wrote: The following changes since commit 278238505d28d292927bff7683f39fb4fbca7fd1:    Merge tag 'pull-tcg-20230511-2' ofhttps://gitlab.com/rth7680/qemu  into staging (2023-05-11 11:44:23 +0100) are available in t

Re: [PATCH 31/84] tcg: Add page_bits and page_mask to TCGContext

On 5/3/23 09:22, Richard Henderson wrote: Disconnect guest page size from TCG compilation. While this could be done via exec/target_page.h, we want to cache the value across multiple memory access operations, so we might as well initialize this early. The changes within tcg/ are entirely mecha

Re: [PATCH 32/84] tcg: Add tlb_dyn_max_bits to TCGContext

On 5/3/23 09:22, Richard Henderson wrote: Disconnect guest tlb parameters from TCG compilation. Signed-off-by: Richard Henderson --- include/tcg/tcg.h| 1 + accel/tcg/translate-all.c| 1 + tcg/aarch64/tcg-target.c.inc | 2 +- tcg/i386/tcg-target.c.inc| 2 +- 4 files

[PATCH 5/8] accel/tcg: Replace target_ulong with vaddr in translator_*()

Use vaddr for guest virtual address in translator_use_goto_tb() and translator_loop(). Signed-off-by: Anton Johansson --- accel/tcg/translator.c| 10 +- include/exec/translator.h | 6 +++--- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/accel/tcg/translator.c b/acce

[PATCH 6/8] accel/tcg: Replace target_ulong with vaddr in page_*()

Use vaddr for guest virtual addresses for functions dealing with page flags. Signed-off-by: Anton Johansson --- accel/tcg/user-exec.c| 43 ++-- include/exec/cpu-all.h | 10 - include/exec/translate-all.h | 2 +- 3 files changed, 27 insertion

[PATCH 7/8] cpu: Replace target_ulong with vaddr in tb_invalidate_phys_addr()

Signed-off-by: Anton Johansson --- cpu.c | 2 +- include/exec/exec-all.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/cpu.c b/cpu.c index 849bac062c..c245727ca6 100644 --- a/cpu.c +++ b/cpu.c @@ -293,7 +293,7 @@ void list_cpus(const char *optarg) }

[PATCH 2/8] accel: Replace target_ulong with vaddr in probe_*()

Functions for probing memory accesses (and functions that call these) are updated to take a vaddr for guest virtual addresses over target_ulong. Signed-off-by: Anton Johansson --- accel/stubs/tcg-stub.c | 4 ++-- accel/tcg/cputlb.c | 12 ++-- accel/tcg/user-exec.c | 8

[PATCH 3/8] accel/tcg: Replace target_ulong with vaddr in *_mmu_lookup()

Update atomic_mmu_lookup() and cpu_mmu_lookup() to take the guest virtual address as a vaddr instead of a target_ulong. Signed-off-by: Anton Johansson --- accel/tcg/cputlb.c| 4 ++-- accel/tcg/user-exec.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/accel/tcg/cput

[PATCH 0/8] Start replacing target_ulong with vaddr

This is a first patchset in removing target_ulong from non-target/ directories. As use of target_ulong is spread accross the codebase we are attempting to target as few maintainers as possible with each patchset in order to ease reviewing. The following instances of target_ulong remain in accel/

[PATCH 4/8] accel/tcg: Replace target_ulong with vaddr in helper_unaligned_*()

Updates helper_unaligned_[ld|st] to take the store/load address as a vaddr instead of a target_ulong. Signed-off-by: Anton Johansson --- accel/tcg/user-exec.c | 4 ++-- include/tcg/tcg-ldst.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/accel/tcg/user-exec.c b/accel/

[PATCH 8/8] tcg: Replace target_ulong with vaddr in tcg_gen_code()

Signed-off-by: Anton Johansson --- include/tcg/tcg.h | 2 +- tcg/tcg.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index 5cfaa53938..b8dbc66610 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -852,7 +852,7 @@ void

[PATCH 1/8] accel: Replace `target_ulong` with `vaddr` in TB/TLB

Changes pc and cs_base in TranslationBlock from target_ulong to vaddr. Auxilliary structs and tb_*()/tlb_*() functions that depend on this change are also updated to take a vaddr for guest virtual addresses. Signed-off-by: Anton Johansson --- accel/stubs/tcg-stub.c | 2 +- accel/tcg/cpu-

Re: [PATCH 0/8] Start replacing target_ulong with vaddr

On 4/23/23 12:59, Richard Henderson wrote: You may wish to browse my work in progress   https://gitlab.com/rth7680/qemu/-/commits/tcg-once/ to avoid duplication, as I have done some of these.  This tree is on top of my atomicity patch set; I'm working on upstreaming that now. I had a suspic

Re: [PATCH 1/8] accel: Replace `target_ulong` with `vaddr` in TB/TLB

On 4/23/23 11:09, Richard Henderson wrote: On 4/20/23 22:28, Anton Johansson wrote: Changes pc and cs_base in TranslationBlock from target_ulong to vaddr. Auxilliary structs and tb_*()/tlb_*() functions that depend on this change are also updated to take a vaddr for guest virtual addresses. S

Re: [PATCH 4/8] accel/tcg: Replace target_ulong with vaddr in helper_unaligned_*()

On 4/23/23 11:10, Richard Henderson wrote: On 4/20/23 22:28, Anton Johansson wrote: Updates helper_unaligned_[ld|st] to take the store/load address as a vaddr instead of a target_ulong. Signed-off-by: Anton Johansson ---   accel/tcg/user-exec.c  | 4 ++--   include/tcg/tcg-ldst.h | 4 ++--   2

Re: [PATCH 6/8] accel/tcg: Replace target_ulong with vaddr in page_*()

On 4/23/23 11:13, Richard Henderson wrote: On 4/20/23 22:28, Anton Johansson wrote: -static PageFlagsNode *pageflags_find(target_ulong start, target_long last) +static PageFlagsNode *pageflags_find(vaddr start, target_long last) Both arguments are target addresses. See comment in cover le

Re: [PATCH 7/8] cpu: Replace target_ulong with vaddr in tb_invalidate_phys_addr()

On 4/23/23 21:42, Richard Henderson wrote: On 4/23/23 20:35, Alex Bennée wrote: Richard Henderson writes: On 4/23/23 18:29, Philippe Mathieu-Daudé wrote: On 23/4/23 11:14, Richard Henderson wrote: On 4/20/23 22:28, Anton Johansson wrote: -void tb_invalidate_phys_addr(target_ulong addr)

Re: [PATCH 00/21] Hexagon (target/hexagon) short-circuit and move to DisasContext

On 4/26/23 02:39, Taylor Simpson wrote: This patch series achieves two major goals Goal 1: Short-circuit packet semantics In certain cases, we can avoid the overhead of writing to hex_new_value and write directly to hex_gpr. Here's a simple example of the TCG generated for

Re: [PATCH 1/9] Hexagon (target/hexagon) Add support for v68/v69/v71/v73

On 4/26/23 04:30, Taylor Simpson wrote: Add support for the ELF flags Move target/hexagon/cpu.[ch] to be v73 Change the compiler flag used by "make check-tcg" The decbin instruction is removed in Hexagon v73, so check the version before trying to compile the instruction. Signed-off-by: Taylor

Re: [PATCH 2/9] Hexagon (target/hexagon) Add v68 scalar instructions

On 4/26/23 04:30, Taylor Simpson wrote: The following instructions are added L2_loadw_aq L4_loadd_aq R6_release_at_vi R6_release_st_vi S2_storew_rl_at_vi S4_stored_rl_at_vi S2_storew_rl_st_vi S4_stored_rl_st_vi The release instructions are nop's in qemu.

Re: [PATCH 3/9] Hexagon (tests/tcg/hexagon) Add v68 scalar tests

On 4/26/23 04:30, Taylor Simpson wrote: Signed-off-by: Taylor Simpson --- tests/tcg/hexagon/v68_scalar.c| 186 ++ tests/tcg/hexagon/Makefile.target | 2 + 2 files changed, 188 insertions(+) create mode 100644 tests/tcg/hexagon/v68_scalar.c diff --git a/

Re: [PATCH 4/9] Hexagon (target/hexagon) Add v68 HVX instructions

On 4/26/23 04:30, Taylor Simpson wrote: The following instructions are added V6_v6mpyvubs10_vxx V6_v6mpyhubs10_vxx V6_v6mpyvubs10 V6_v6mpyhubs10 Signed-off-by: Taylor Simpson --- target/hexagon/mmvec/macros.h| 9 +- target/hexagon/imported/mmvec/encode

Re: [PATCH 5/9] Hexagon (tests/tcg/hexagon) Add v68 HVX tests

On 4/26/23 04:30, Taylor Simpson wrote: --- tests/tcg/hexagon/v6mpy_ref.h | 161 ++ tests/tcg/hexagon/v68_hvx.c | 90 + tests/tcg/hexagon/Makefile.target | 3 + 3 files changed, 254 insertions(+) create mode 100644 tests/tcg/hexago

Re: [PATCH 6/9] Hexagon (target/hexagon) Add v69 HVX instructions

On 4/26/23 04:30, Taylor Simpson wrote: The following instructions are added V6_vasrvuhubrndsat V6_vasrvuhubsat V6_vasrvwuhrndsat V6_vasrvwuhsat V6_vassign_tmp V6_vcombine_tmp V6_vmpyuhvs Signed-off-by: Taylor Simpson --- target/hexagon/gen_tcg_hvx.h

Re: [PATCH 7/9] Hexagon (tests/tcg/hexagon) Add v69 HVX tests

On 4/26/23 04:30, Taylor Simpson wrote: The following instructions are tested V6_vasrvuhubrndsat V6_vasrvuhubsat V6_vasrvwuhrndsat V6_vasrvwuhsat V6_vassign_tmp V6_vcombine_tmp V6_vmpyuhvs Signed-off-by: Taylor Simpson --- tests/tcg/hexagon/v69_hvx.c

Re: [PATCH 8/9] Hexagon (target/hexagon) Add v73 scalar instructions

On 4/26/23 04:30, Taylor Simpson wrote: The following instructions are added J2_callrh J2_junprh Signed-off-by: Taylor Simpson --- target/hexagon/gen_tcg.h | 4 target/hexagon/attribs_def.h.inc | 1 + target/hexagon/imported/branch.idef | 7 ++- tar

Re: [PATCH 9/9] Hexagon (tests/tcg/hexagon) Add v73 scalar tests

On 4/26/23 04:30, Taylor Simpson wrote: Tests added for the following instructions J2_callrh J2_jumprh Signed-off-by: Taylor Simpson --- tests/tcg/hexagon/v73_scalar.c| 96 +++ tests/tcg/hexagon/Makefile.target | 2 + 2 files changed, 98 insertio

Re: [PATCH] target/hexagon: fix = vs. == mishap

On 4/27/23 14:56, Paolo Bonzini wrote: Coverity reports a parameter that is "set but never used". This is caused by an assignment operator being used instead of equality. Cc: Taylor Simpson Signed-off-by: Paolo Bonzini --- target/hexagon/idef-parser/parser-helpers.c | 2 +- 1 file change

Re: [PATCH v2] Hexagon (target/hexagon) Additional instructions handled by idef-parser

On 4/26/23 19:32, Taylor Simpson wrote: Changes in v2 Fix bug in imm_print identified in clang build Currently, idef-parser skips all floating point instructions. However, there are some floating point instructions that can be handled. The following instructions are now parsed

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