Re: [PATCH 01/10] include/gdbstub: fix include guard in commands.h

2025-04-05 Thread Philippe Mathieu-Daudé
On 19/3/25 19:22, Alex Bennée wrote: Signed-off-by: Alex Bennée --- include/gdbstub/commands.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Philippe Mathieu-Daudé

Re: [PATCH v8 00/28] vfio-user client

2025-04-05 Thread Cédric Le Goater
On 3/14/25 16:13, John Levon wrote: On Fri, Mar 14, 2025 at 03:25:53PM +0100, Cédric Le Goater wrote: This is the 8th revision of the vfio-user client implementation. The vfio-user protocol allows for implementing (PCI) devices in another userspace process; SPDK is one example, which includes a

Re: [PATCH for-10.1 v2 34/37] vfio: Introduce vfio_listener_un/register() routines

2025-04-05 Thread Joao Martins
On 26/03/2025 07:51, Cédric Le Goater wrote: > This hides the MemoryListener implementation and makes the code common > to both IOMMU backends, legacy and IOMMUFD. > > Signed-off-by: Cédric Le Goater Reviewed-by: Joao Martins > --- > hw/vfio/vfio-listener.h | 3 ++- > hw/vfio/container.c

[PATCH-for-10.1 07/13] target/arm: Move some definitions from 'cpu.h' to 'multiprocessing.h'

2025-04-05 Thread Philippe Mathieu-Daudé
arm_build_mp_affinity() and affinity mask definitionss are related to multiprocessing. Move them to "multiprocessing.h", including this header when necessary. Signed-off-by: Philippe Mathieu-Daudé --- target/arm/cpu.h | 17 - target/arm/multiprocessing.h | 18

Re: [PATCH v2 08/30] exec/cpu-all: remove exec/cpu-interrupt include

2025-04-05 Thread Richard Henderson
On 3/20/25 15:29, Pierrick Bouvier wrote: Signed-off-by: Pierrick Bouvier --- include/exec/cpu-all.h | 1 - target/alpha/cpu.h | 1 + target/arm/cpu.h| 1 + target/avr/cpu.h| 1 + target/hppa/cpu.h | 1 + target/i386/cpu.h | 1 + target/loongarch/cpu.h |

RE: [PATCH 13/39] target/hexagon: Implement modify_syscfg()

2025-04-05 Thread ltaylorsimpson
> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:28 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

[PATCH 0/2] Fix GDB support for macOS hvf

2025-04-05 Thread Mads Ynddal
From: Mads Ynddal In (recent versions of?) macOS, calls to hv_vcpu_set_sys_reg were failing if they were issued outside of the specific thread that owns the vCPU. This caused a crash when attaching a debugger through the GDB stub. This GDB stub has worked before, so it is unclear if Apple chang

Re: [PATCH] target/i386: Fix model number of Zhaoxin YongFeng vCPU template

2025-04-05 Thread Zhao Liu
On Mon, Mar 31, 2025 at 04:03:56AM -0400, Ewan Hai wrote: > Date: Mon, 31 Mar 2025 04:03:56 -0400 > From: Ewan Hai > Subject: [PATCH] target/i386: Fix model number of Zhaoxin YongFeng vCPU > template > X-Mailer: git-send-email 2.34.1 > > The model number was mistakenly set to 0x0b (11) in commit

Re: [PATCH v6 3/6] hw/loongarch/virt: Fix error handling in cpu unplug

2025-04-05 Thread Markus Armbruster
bibo mao writes: > On 2025/3/21 下午3:21, Markus Armbruster wrote: >> bibo mao writes: >> >>> +Igor >>> >>> >>> On 2025/3/21 下午2:47, Markus Armbruster wrote: Bibo Mao writes: > In function virt_cpu_unplug(), it will send cpu unplug message to > interrupt controller extioi and i

[PATCH 09/17] target/avr: Introduce gen_data_{load,store}_raw

2025-04-05 Thread Richard Henderson
Prepare for offset_io being non-zero; also allow folding stack pointer offsets into the arithmetic. So far, all offsets are 0. Signed-off-by: Richard Henderson --- target/avr/translate.c | 42 -- 1 file changed, 32 insertions(+), 10 deletions(-) diff --gi

Re: [PATCH 6/6] target/hexagon: Add memory order definition

2025-04-05 Thread Brian Cain
On 4/4/2025 9:33 AM, Richard Henderson wrote: On 4/3/25 19:52, Brian Cain wrote: From: Brian Cain Signed-off-by: Brian Cain ---   target/hexagon/cpu-param.h | 5 +   1 file changed, 5 insertions(+) diff --git a/target/hexagon/cpu-param.h b/target/hexagon/cpu-param.h index 45ee7b4640..cc

Re: [PATCH 0/4] target/arm: Flag PMCNTENCLR with ARM_CP_NO_RAW

2025-04-05 Thread Peter Maydell
On Mon, 17 Mar 2025 at 11:53, Peter Maydell wrote: > > On Mon, 17 Mar 2025 at 11:16, Akihiko Odaki wrote: > > > > Supersedes: <20250314-clr-v2-1-7c7220c17...@daynix.com> > > ("[PATCH v2] target/arm: Define raw write for PMU CLR registers") > > > > A normal write to PMCNTENCLR clears written bits

[RFC PATCH 2/3] target/ppc: define TARGET_HAS_LAZY_ICACHE

2025-04-05 Thread Nicholas Piggin
Use the new incoherent icache (incoherent TB) feature in the ppc target. Performance problems with notdirty write accesses have been encountered in two places now. One is where a large number of executable pages have been freed (typically in KVM when a guest exits) and are being cleared for reuse,

Re: [PATCH-for-10.0 v2 02/14] tests/functional: Add a decorator for skipping tests on particular OS

2025-04-05 Thread Philippe Mathieu-Daudé
On 3/4/25 20:04, Thomas Huth wrote: On 03/04/2025 17.18, Philippe Mathieu-Daudé wrote: Since tests might be failing on some operating systems, introduce the skipIfOperatingSystem() decorator. Signed-off-by: Philippe Mathieu-Daudé ---   tests/functional/qemu_test/__init__.py   |  2 +-   tests/f

Re: [PATCH v3 0/3] vhost: fix the IO error after live migration

2025-04-05 Thread Lei Yang
QE tested this series v3 with virtio-net regression tests, everything works fine. Tested-by: Lei Yang On Thu, Mar 27, 2025 at 2:46 PM Haoqian He wrote: > At the end of the VM live migration, the vhost device will be stopped. > Currently, if the vhost-user backend crashes, vhost device's set_st

[PATCH 11/13] target/arm/cpu: remove inline stubs for aarch32 emulation

2025-04-05 Thread Pierrick Bouvier
Directly condition associated calls in target/arm/helper.c for now. Signed-off-by: Pierrick Bouvier --- target/arm/cpu.h| 8 target/arm/helper.c | 6 ++ 2 files changed, 6 insertions(+), 8 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 51b6428cfec..9205cbde

[PATCH 07/17] target/avr: Use do_stb in avr_cpu_do_interrupt

2025-04-05 Thread Richard Henderson
Signed-off-by: Richard Henderson --- target/avr/helper.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/target/avr/helper.c b/target/avr/helper.c index 7cfd3d1093..9608e59584 100644 --- a/target/avr/helper.c +++ b/target/avr/helper.c @@ -88,14 +88,14 @@ void avr_

Re: [PATCH 07/17] target/avr: Use do_stb in avr_cpu_do_interrupt

2025-04-05 Thread Philippe Mathieu-Daudé
On 23/3/25 18:37, Richard Henderson wrote: Signed-off-by: Richard Henderson --- target/avr/helper.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) Reviewed-by: Philippe Mathieu-Daudé

[PATCH-for-10.1 07/43] target/avr: Restrict SoftMMU mmu_index() to TCG

2025-04-05 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/avr/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/avr/cpu.c b/target/avr/cpu.c index 11218224704..feb73e722b3 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -228,6 +228,7 @

Re: [PATCH v3 0/3] Enable QEMU NVMe userspace driver on s390x

2025-04-05 Thread Stefan Hajnoczi
On Tue, Apr 01, 2025 at 10:22:43AM -0700, Farhan Ali wrote: > Hi, > > Recently on s390x we have enabled mmap support for vfio-pci devices [1]. Hi Alex, I wanted to bring this to your attention. Feel free to merge it through the VFIO tree, otherwise I will merge it once you have taken a look. Tha

Re: [PATCH v6 3/6] hw/loongarch/virt: Fix error handling in cpu unplug

2025-04-05 Thread bibo mao
On 2025/3/21 下午3:21, Markus Armbruster wrote: bibo mao writes: +Igor On 2025/3/21 下午2:47, Markus Armbruster wrote: Bibo Mao writes: In function virt_cpu_unplug(), it will send cpu unplug message to interrupt controller extioi and ipi irqchip. If there is problem in this function, syst

Re: [PATCH v3 0/3] Enable QEMU NVMe userspace driver on s390x

2025-04-05 Thread Alex Williamson
On Thu, 3 Apr 2025 10:33:52 -0700 Farhan Ali wrote: > On 4/3/2025 9:27 AM, Alex Williamson wrote: > > On Thu, 3 Apr 2025 11:44:42 -0400 > > Stefan Hajnoczi wrote: > > > >> On Thu, Apr 03, 2025 at 09:47:26AM +0200, Niklas Schnelle wrote: > >>> On Wed, 2025-04-02 at 11:51 -0400, Stefan Hajnocz

[PATCH for-10.1 32/32] vfio: Rename RAM discard related services

2025-04-05 Thread Cédric Le Goater
Rename some routines to better reflect the namespace they belong to. Signed-off-by: Cédric Le Goater --- hw/vfio/dirty-tracking.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/vfio/dirty-tracking.c b/hw/vfio/dirty-tracking.c index d7827f7b64adf3e2b41fafd59a

[PATCH-for-10.1 01/43] tcg: Declare TARGET_INSN_START_EXTRA_WORDS in 'cpu-param.h'

2025-04-05 Thread Philippe Mathieu-Daudé
To avoid including the huge "cpu.h" for a simple definition, move TARGET_INSN_START_EXTRA_WORDS to "cpu-param.h". Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/arm/cpu-param.h| 7 +++ target/arm/cpu.h | 6 -- target/hppa/cpu-param.h

[PATCH v7 1/2] hw/loongarch/virt: Fix cpuslot::cpu set at last in virt_cpu_plug()

2025-04-05 Thread Bibo Mao
In function virt_cpu_plug(), Object cpuslot::cpu is set at last only when there is no any error, otherwise it is problematic that cpuslot::cpu is set in advance however it returns because of error. Fixes: ab9935d2991e (hw/loongarch/virt: Implement cpu plug interface) Signed-off-by: Bibo Mao ---

[PATCH v4 7/8] hw/ppc: Enable fadump for PSeries

2025-04-05 Thread Aditya Gupta
With all support in place for preserving memory regions, enable fadump by exporting the "ibm,kernel-dump" property in the device tree, representing the fadump dump information, in case of a crash. Currently "ibm,configure-kernel-dump" RTAS call is already registered, which tells the kernel that th

[PATCH for-10.1 22/32] vfio: Move vfio_device_list into device.c

2025-04-05 Thread Cédric Le Goater
'vfio_device_list' is VFIODevice related. Move its definitions into "device.c". Signed-off-by: Cédric Le Goater --- hw/vfio/common.c | 3 --- hw/vfio/device.c | 3 +++ 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/vfio/common.c b/hw/vfio/common.c index 52f440c0d05fa9f7812210

[PATCH v2 36/42] include/hw/s390x: Remove ifndef CONFIG_USER_ONLY in css.h

2025-04-05 Thread Richard Henderson
We were hiding a number of declarations from user-only, although it hurts nothing to allow them. Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- include/hw/s390x/css.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/include/hw/s390x/css.h b/include/hw/s390x/css.h index c

Re: [PATCH v4 0/7] hw/hyperv: remove duplication compilation units

2025-04-05 Thread Pierrick Bouvier
On 3/7/25 13:56, Pierrick Bouvier wrote: Work towards having a single binary, by removing duplicated object files. hw/hyperv/hyperv.c was excluded at this time, because it depends on target dependent symbols: - from system/kvm.h - kvm_check_extension - kvm_vm_ioctl - from exec/cpu-all.

Re: [PATCH] target/hexagon: Implement CPUState.mmu_index

2025-04-05 Thread Richard Henderson
On 4/3/25 08:49, Richard Henderson wrote: Signed-off-by: Richard Henderson --- target/hexagon/cpu.c | 6 ++ 1 file changed, 6 insertions(+) I meant to add, this is to enable some of the other single-binary cleanups, wherein implementation of CPUState.mmu_index becomes mandatory. r~

[PATCH 13/17] target/avr: Handle offset_io in avr_cpu_realizefn

2025-04-05 Thread Richard Henderson
Signed-off-by: Richard Henderson --- target/avr/cpu.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/avr/cpu.c b/target/avr/cpu.c index e4011004b4..538fcbc215 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -161,12 +161,14 @@ static void avr_cpu_realizefn

[PATCH-for-10.1 v2 4/4] tcg: Convert TARGET_SUPPORTS_MTTCG to TCGCPUOps::mttcg_supported field

2025-04-05 Thread Philippe Mathieu-Daudé
Instead of having a compile-time TARGET_SUPPORTS_MTTCG definition, have each target set the 'mttcg_supported' field in the TCGCPUOps structure. Since so far we only emulate one target architecture at a time, tcg_init_machine() gets whether MTTCG is supported via the &first_cpu global. Signed-off-

Re: [PATCH v2 01/30] exec/cpu-all: remove BSWAP_NEEDED

2025-04-05 Thread Pierrick Bouvier
On 3/23/25 12:26, Richard Henderson wrote: On 3/20/25 15:29, Pierrick Bouvier wrote: This identifier is poisoned, so it can't be used from common code anyway. We replace all occurrences with its definition directly. Signed-off-by: Pierrick Bouvier --- include/exec/cpu-all.h| 12 -

[PATCH v1 21/22] test/qtest/hace: Support to validate 64-bit hmac key buffer addresses

2025-04-05 Thread Jamin Lin via
Added "key" and "key_hi" fields to "AspeedMasks" for 64-bit addresses test. Updated "aspeed_test_addresses" to validate "HACE_HASH_KEY_BUFF" and "HACE_HASH_KEY_BUFF_HI". Ensured correct masking of 64-bit addresses by checking both lower and upper 32-bit registers. Signed-off-by: Jamin Lin --- te

[PATCH] vfio/spapr: Fix L2 crash with PCI device passthrough with L2 guest memory > 128G

2025-04-05 Thread Amit Machhiwal
An L2 KVM guest fails to boot inside a pSeries LPAR when booted with a memory more than 128 GB and PCI device passthrough. The L2 guest also crashes when it is booted with a memory greater than 128 GB and a PCI device is hotplugged later. The issue arises from a conditional check for `levels > 1`

[PATCH for 10.1 0/5] target/i386: TCG changes

2025-04-05 Thread Paolo Bonzini
Small improvements to ADC and SBB code generation, and inching towards removal of temporaries (other than T0 and T1). Paolo Bonzini (5): target/i386: special case ADC/SBB x,0 and SBB x,x target/i386: tcg: remove tmp0 and tmp4 from SHLD/SHRD target/i386: tcg: remove subf from SHLD/SHRD expans

Re: [PATCH 3/3] rust: pl011: Check size of state struct at compile time

2025-04-05 Thread Peter Maydell
On Thu, 20 Mar 2025 at 15:25, Zhao Liu wrote: > > > -use std::{ffi::CStr, ptr::addr_of_mut}; > > +use std::{ffi::CStr, mem, ptr::addr_of_mut}; > > maybe mem::size_of (since there're 2 use cases :-))? > > > > > use qemu_api::{ > > +bindings, > > chardev::{CharBackend, Chardev, Event}, > >

Re: [PATCH-for-10.1 3/4] tcg: Convert TCGState::mttcg_enabled to TriState

2025-04-05 Thread Philippe Mathieu-Daudé
On 23/3/25 19:43, Richard Henderson wrote: On 3/21/25 08:59, Philippe Mathieu-Daudé wrote: Use the OnOffAuto type as 3-state. Since the TCGState instance is zero-initialized, the mttcg_enabled is initialzed as AUTO (ON_OFF_AUTO_AUTO). In tcg_init_machine(), if mttcg_enabled is still AUTO, set

Re: [PATCH v2 29/30] hw/arm/xlnx-versal: prepare compilation unit to be common

2025-04-05 Thread Richard Henderson
On 3/20/25 15:30, Pierrick Bouvier wrote: Signed-off-by: Pierrick Bouvier --- hw/arm/xlnx-versal.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index 278545a3f7b..f0b383b29ee 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -1

Re: VDPA MAC address problem

2025-04-05 Thread Konstantin Shkolnyy
On 3/20/2025 01:54, Eugenio Perez Martin wrote: On Thu, Mar 20, 2025 at 1:59 AM Jason Wang wrote: Adding Cindy and Eugenio On Thu, Mar 20, 2025 at 12:34 AM Konstantin Shkolnyy wrote: I’m observing a problem while testing VDPA with Nvidia ConnectX-6 (mlx5) on s390. Upon start, virtio_net_d

[PATCH] Fix data race with slh_first field in test-aio-multithread

2025-04-05 Thread Vitalii Mordan
This patch addresses potential data races involving access to the slh_first field in the QSLIST_INSERT_HEAD_ATOMIC macro. Fixes: c740ad92d0 ("QSLIST: add lock-free operations") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2902 Signed-off-by: Vitalii Mordan --- include/qemu/queue.h | 3

[PATCH v4 5/8] hw/ppc: Implement saving CPU state in Fadump

2025-04-05 Thread Aditya Gupta
Kernel expects CPU states/register states in the format mentioned in "Register Save Area" in PAPR. The platform (in our case, QEMU) saves each CPU register in the form of an array of "register entries", the start and end of this array is signified by "CPUSTRT" and "CPUEND" register entries respect

[PATCH-for-10.1 39/43] tcg: Move qemu_tcg_mttcg_enabled() to 'system/tcg.h'

2025-04-05 Thread Philippe Mathieu-Daudé
qemu_tcg_mttcg_enabled() is specific to 1/ TCG and 2/ system emulation. Move the prototype declaration to "system/tcg.h", reducing 'mttcg_enabled' variable scope. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- include/hw/core/cpu.h | 9 - include/system/tc

[PATCH-for-10.1 3/4] tcg: Convert TCGState::mttcg_enabled to TriState

2025-04-05 Thread Philippe Mathieu-Daudé
Use the OnOffAuto type as 3-state. Since the TCGState instance is zero-initialized, the mttcg_enabled is initialzed as AUTO (ON_OFF_AUTO_AUTO). In tcg_init_machine(), if mttcg_enabled is still AUTO, set a default value (effectively inlining the default_mttcg_enabled() method content). Instead of

Re: [PATCH v2 2/3] vhost: return failure if stop virtqueue failed in vhost_dev_stop

2025-04-05 Thread Stefano Garzarella
On Fri, Mar 14, 2025 at 06:15:33AM -0400, Haoqian He wrote: The backend maybe crash when vhost_dev_stop and GET_VRING_BASE would fail, we can return failure to indicate the connection with the backend is broken. Signed-off-by: Haoqian He --- hw/virtio/vhost.c | 27 +++---

Re: [PATCH v6 07/10] ppc/pnv: Introduce Power11 PowerNV machine

2025-04-05 Thread Cédric Le Goater
[ ... ] You could use a buildroot image instead. :   https://github.com/buildroot/buildroot/blob/master/configs/qemu_ppc64le_powernv8_defconfig Images pushed here : https://github.com/legoater/qemu-ppc-boot/tree/main/buildroot/qemu_ppc64le_powernv8-2025.02 qemu-system-ppc64 -m 1G -M

[PATCH] hw/loongarch/boot: Adjust the loading position of the initrd

2025-04-05 Thread Xianglai Li
When only the -kernel parameter is used to load the elf kernel, the initrd is loaded in the ram. If the initrd size is too large, the loading fails, resulting in a VM startup failure. This patch first loads initrd near the kernel. When the nearby memory space of the kernel is insufficient, it tries

Re: [PATCH v8 06/28] vfio: refactor out vfio_interrupt_setup()

2025-04-05 Thread Cédric Le Goater
On 2/19/25 15:48, John Levon wrote: Refactor the interrupt setup code out of vfio_realize(), as we will later need this for vfio-user too. Signed-off-by: John Levon --- hw/vfio/pci.c | 54 +++ 1 file changed, 33 insertions(+), 21 deletions(-)

Re: [PATCH-for-10.1 v3 6/9] qtest/bios-tables-test: Whitelist aarch64/virt 'its_off' variant blobs

2025-04-05 Thread Gustavo Romero
Hi Phil, On 4/3/25 17:40, Philippe Mathieu-Daudé wrote: We are going to fix the test_acpi_aarch64_virt_tcg_its_off() test. In preparation, copy the ACPI tables which will be altered as 'its_off' variants, and whitelist them. Reviewed-by: Gustavo Romero Signed-off-by: Philippe Mathieu-Daudé --

Re: [PATCH] [for-10.1] qapi/block-core: derpecate some block-job- APIs

2025-04-05 Thread Markus Armbruster
Vladimir Sementsov-Ogievskiy writes: > On 04.04.25 17:13, Markus Armbruster wrote: [...] >> So, auto-finalize=true is silently ignored when another job in the same >> transaction has auto-finalize=false? > > Yes, at least, it looks like so: > > static void job_completed_txn_success_locked(Job *

Re: [PATCH for-10.1 20/32] vfio: Introduce new files for CPR definitions and declarations

2025-04-05 Thread John Levon
On Tue, Mar 18, 2025 at 10:54:03AM +0100, Cédric Le Goater wrote: > Gather all CPR related declarations into "cpr.h" to reduce exposure > of VFIO internals in "hw/vfio/vfio-common.h". > > Order file list in meson.build while at it. > > Signed-off-by: Cédric Le Goater > --- > hw/vfio/cpr.h

Re: [PATCH v2 06/42] include/exec: Split out cpu-mmu-index.h

2025-04-05 Thread Philippe Mathieu-Daudé
Hi Richard, On 18/3/25 22:31, Richard Henderson wrote: The implementation of cpu_mmu_index was split between cpu-common.h and cpu-all.h, depending on CONFIG_USER_ONLY. We already have the plumbing common to user and system mode. Using MMU_USER_IDX requires the cpu.h for a specific target, and

RE: [PATCH 30/39] target/hexagon: Add next_PC, {s,g}reg writes

2025-04-05 Thread ltaylorsimpson
> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:29 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

Re: [PATCH v2 28/30] hw/arm/xlnx-zynqmp: prepare compilation unit to be common

2025-04-05 Thread Pierrick Bouvier
On 3/23/25 12:50, Richard Henderson wrote: On 3/20/25 15:30, Pierrick Bouvier wrote: Signed-off-by: Pierrick Bouvier --- hw/arm/xlnx-zynqmp.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index d6022ff2d3d..ec2b3a41eda 100644 --- a/hw/arm/

Re: [PATCH 14/15] fuse: Implement multi-threading

2025-04-05 Thread Hanna Czenczek
On 26.03.25 06:38, Markus Armbruster wrote: Hanna Czenczek writes: FUSE allows creating multiple request queues by "cloning" /dev/fuse FDs (via open("/dev/fuse") + ioctl(FUSE_DEV_IOC_CLONE)). We can use this to implement multi-threading. Note that the interface presented here differs from th

[PATCH v3 0/6] [for-10.0] hw/uefi: some bugfixes

2025-04-05 Thread Gerd Hoffmann
v3 changes: - rename firmware.json flag, more verbose documentation. - add support for riscv and loongarch. Gerd Hoffmann (6): hw/uefi: flush variable store to disk in post load hw/uefi: fix error handling in uefi_vars_json_save hw/uefi: fix error handling in uefi_vars_json_load hw/uefi-

Re: [PATCH 1/2] migration: Add some documentation for multifd

2025-04-05 Thread Fabiano Rosas
Prasad Pandit writes: > On Thu, 20 Mar 2025 at 20:15, Fabiano Rosas wrote: >> Technically both can happen. But that would just be the case of >> file:fdset migration which requires an extra fd for O_DIRECT. So >> "multiple" in the usual sense of "more is better" is only >> fd-per-thread. IOW, us

[PATCH v1 10/22] hw/misc/aspeed_hace:: Support setting different memory size

2025-04-05 Thread Jamin Lin via
The memory size was previously hardcoded to 0x1000 (4K). However, the actual memory size of the HACE controller varies across different models: 1. AST2400/AST2500: 0x1000 (4K) 2. AST2600/AST1030: 0x1 (64K) 3. AST2700: 0x100 (256 bytes) To address this, a new class attribute, mem_size, has been

Re: [PATCH 2/2] rust/hw/char/pl011/src/device: Implement logging

2025-04-05 Thread Bernhard Beschow
Am 31. März 2025 09:18:05 UTC schrieb "Daniel P. Berrangé" : >On Sun, Mar 30, 2025 at 10:58:57PM +0200, Bernhard Beschow wrote: >> Now that there is logging support in Rust for QEMU, use it in the pl011 >> device. >> >> Signed-off-by: Bernhard Beschow >> --- >> rust/hw/char/pl011/src/device

[PATCH-for-10.1 06/24] target/hppa: Restrict SoftMMU mmu_index() to TCG

2025-04-05 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé --- target/hppa/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 0da8cdf41f5..51bff0c5d62 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -257,6 +257,7 @@ static const TCGCPUOps hp

[PATCH-for-10.1 13/24] target/mips: Restrict SoftMMU mmu_index() to TCG

2025-04-05 Thread Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé --- target/mips/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 47df563e123..269d3d69bd5 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -554,6 +554,7 @@ static const TCGCPUOps mi

[PATCH 16/21] hw/arm/beckhoff_CX7200: Remove usb interfaces

2025-04-05 Thread Corvin Köhne
From: YannickV The CX7200 does not support usb interfaces. That is why they are removed. Signed-off-by: Yannick Voßen --- hw/arm/Kconfig | 1 - hw/arm/beckhoff_CX7200.c | 4 2 files changed, 5 deletions(-) diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 8727b3e837..a8648b9ed

Re: [PATCH] target/s390x: Fix a typo in s390_cpu_class_init()

2025-04-05 Thread Richard Henderson
On 3/23/25 08:30, Philippe Mathieu-Daudé wrote: Fixes: 41868f846d2 ("s390x/cpumodel: "host" and "qemu" as CPU subclasses") Signed-off-by: Philippe Mathieu-Daudé --- target/s390x/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c i

[PATCH] hw/smbios/smbios.c: Add missing NUL terminal to string from path= parameter

2025-04-05 Thread Valentin David
Without it, it seems the data gets garbage at the end of the string. Signed-off-by: Valentin David --- hw/smbios/smbios.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/smbios/smbios.c b/hw/smbios/smbios.c index 02a09eb9cd..7522e9a172 100644 --- a/hw/smbios/smbios.c +++ b/hw/smbios/smbio

[PULL 2/8] error: Strip trailing '\n' from an error string argument

2025-04-05 Thread Markus Armbruster
Tracked down with scripts/coccinelle/err-bad-newline.cocci. Signed-off-by: Markus Armbruster Message-ID: <20250312143504.1659061-1-arm...@redhat.com> Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Song Gao --- net/vmnet-common.m | 2 +- 1 file changed, 1 insertion

[PATCH v6 3/6] hw/loongarch/virt: Fix error handling in cpu unplug

2025-04-05 Thread Bibo Mao
In function virt_cpu_unplug(), it will send cpu unplug message to interrupt controller extioi and ipi irqchip. If there is problem in this function, system should continue to run and keep state the same before cpu is removed. If error happends in cpu unplug stage, send cpu plug message to extioi a

Re: [PATCH-for-10.1 7/8] target/mips: Get CPU register size using mips_cpu_is_64bit()

2025-04-05 Thread Pierrick Bouvier
On 3/25/25 08:40, Philippe Mathieu-Daudé wrote: CPU registers size is static and depends on the type of CPU. Signed-off-by: Philippe Mathieu-Daudé --- target/mips/gdbstub.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/target/mips/gdbstub.c b/target/mips/gdbstub.c

[PATCH v2 1/3] rust: assertions: add static_assert

2025-04-05 Thread Peter Maydell
From: Paolo Bonzini Add a new assertion that is similar to "const { assert!(...) }" but can be used outside functions and with older versions of Rust. A similar macro is found in Linux, whereas the "static_assertions" crate has a const_assert macro that produces worse error messages. Suggested-

Re: [PATCH v3 0/3] Enable QEMU NVMe userspace driver on s390x

2025-04-05 Thread Stefan Hajnoczi
On Thu, Apr 03, 2025 at 09:47:26AM +0200, Niklas Schnelle wrote: > On Wed, 2025-04-02 at 11:51 -0400, Stefan Hajnoczi wrote: > > On Tue, Apr 01, 2025 at 10:22:43AM -0700, Farhan Ali wrote: > > > Hi, > > > > > > Recently on s390x we have enabled mmap support for vfio-pci devices [1]. > > > > Hi Al

Re: [PATCH 1/2] rust: Kconfig: Factor out whether PL011 is Rust or C

2025-04-05 Thread Philippe Mathieu-Daudé
On 19/3/25 20:31, Peter Maydell wrote: Currently every board that uses the PL011 duplicates the logic that selects the Rust implementation if Rust was enabled and the C implementation if it does not. Factor this out into a separate Kconfig stanza, so that boards can go back to simply doing "sele

Re: [PATCH v6] hw/misc/vmfwupdate: Introduce hypervisor fw-cfg interface support

2025-04-05 Thread Alexander Graf
Hey Gerd, On 18.03.25 12:11, Gerd Hoffman wrote: Hi, Maybe not from the user's point of view, but surely for the vmfwupdate interface design and for the launch measurement calculations. When using igvm parameters for the kernel hashes we need to pass on (at least) two items via vmfwupdate

[PULL 14/24] rust/vmstate: Fix "cannot infer type" error in vmstate_struct

2025-04-05 Thread Paolo Bonzini
From: Zhao Liu Rust cannot infer the type (it should be VMStateField) after Zeroable::ZERO, which cause the compiling error. To fix this error, call with_varray_flag() after VMStateField's initialization. Signed-off-by: Zhao Liu Link: https://lore.kernel.org/r/20250318130219.1799170-7-zhao1...

[PATCH 11/17] target/avr: Implement CPUState.memory_rw_debug

2025-04-05 Thread Richard Henderson
Prepare for offset_io being non-zero when accessing from gdb. Signed-off-by: Richard Henderson --- target/avr/cpu.c | 30 ++ 1 file changed, 30 insertions(+) diff --git a/target/avr/cpu.c b/target/avr/cpu.c index 080f6f30d3..e4011004b4 100644 --- a/target/avr/cpu.c +

[PATCH v2 00/14] rust/vmstate: Clean up, fix, enhance & test

2025-04-05 Thread Zhao Liu
Hi, This series is in preparation for HPET migration support (in particular, to support varray and vmstate_validate), and it also cleans up and fixes the current vmstate. Patch Summary = Patch 1-9: Clean up & fix for vmstate_of & vmstate_struct, where the issues are catc

Re: [PATCH 6/6] amd_iommu: Do not assume passthrough translation for devices with DTE[TV]=0

2025-04-05 Thread Alejandro Jimenez
Hi Sairaj Kodilkar, On 3/20/25 1:11 AM, Arun Kodilkar, Sairaj wrote: On 3/11/2025 8:54 PM, Alejandro Jimenez wrote: The AMD I/O Virtualization Technology (IOMMU) Specification (see Table 8: V, TV, and GV Fields in Device Table Entry), specifies that a DTE with V=0, TV=1 does not contain a va

[PATCH-for-10.1 10/43] target/i386: Restrict cpu_mmu_index_kernel() to TCG

2025-04-05 Thread Philippe Mathieu-Daudé
Move cpu_mmu_index_kernel() to seg_helper.c. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/i386/cpu.h| 1 - target/i386/tcg/seg_helper.h | 4 target/i386/cpu.c| 16 target/i386/tcg/seg_helper.c | 16 ++

Re: [PATCH 04/10] target/arm: convert 64 bit gdbstub to new helper

2025-04-05 Thread Alex Bennée
Pierrick Bouvier writes: > On 3/19/25 11:22, Alex Bennée wrote: >> For some of the helpers we need a temporary variable to copy from >> although we could add some helpers to return pointers into env in >> those cases if we wanted to. >> Signed-off-by: Alex Bennée >> --- >> target/arm/gdbstub64

Re: [PATCH 02/10] gdbstub: introduce target independent gdb register helper

2025-04-05 Thread Pierrick Bouvier
On 3/19/25 11:22, Alex Bennée wrote: The current helper.h functions rely on hard coded assumptions about target endianess to use the tswap macros. We also end up double swapping a bunch of values if the target can run in multiple endianess modes. Avoid this by getting the target to pass the endia

[PATCH 0/4] Several sstc extension fixes

2025-04-05 Thread Jim Shu
This patch series contains several sstc fixes: (1) Writing to ACLINT mtime should also update the period of S/VS-mode timer, just like M-mode timer. (2) VSTIP bit of $mip CSR should check both M-mode and H-mode STCE. (3) Writing to STCE bit may enable/disable sstc extension in S/VS-mode, w

Re: [PATCH-for-10.0? v2 08/14] hw/arm/virt: Simplify create_its()

2025-04-05 Thread Richard Henderson
On 4/3/25 08:18, Philippe Mathieu-Daudé wrote: No need to strstr() check the class name when we can use kvm_irqchip_in_kernel(). Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/virt.c | 12 +++- 1 file changed, 3 insertions(+), 9 deletions(-) Reviewed-by: Richard Henderson r~

Re: [PATCH] rust: hpet: fix decoding of timer registers

2025-04-05 Thread Peter Maydell
On Fri, 21 Mar 2025 at 13:33, Paolo Bonzini wrote: > > Due to a missing "& 0x18", timer registers are not decoded correctly. > This breaks the tests/functional/test_x86_64_tuxrun.py functional > test. > > Fixes: 519088b7cf6 ("rust: hpet: decode HPET registers into enums", > 2025-03-06) > Reported

Re: [PATCH v8 04/55] i386/tdx: Implement tdx_kvm_init() to initialize TDX VM context

2025-04-05 Thread Daniel P . Berrangé
On Tue, Apr 01, 2025 at 09:01:14AM -0400, Xiaoyao Li wrote: > Implement TDX specific ConfidentialGuestSupportClass::kvm_init() > callback, tdx_kvm_init(). > > Mark guest state is proctected for TDX VM. More TDX specific > initialization will be added later. > > Signed-off-by: Xiaoyao Li > --- >

[PATCH-for-10.1 02/24] accel/tcg: Introduce TCGCPUOps::mmu_index() callback

2025-04-05 Thread Philippe Mathieu-Daudé
We'll move CPUClass::mmu_index() to TCGCPUOps::mmu_index(). Signed-off-by: Philippe Mathieu-Daudé --- include/accel/tcg/cpu-ops.h | 3 +++ include/exec/cpu-mmu-index.h | 5 - 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/include/accel/tcg/cpu-ops.h b/include/accel/tcg/cpu-op

Re: [PATCH v3] target/ppc: Deprecate Power8E and Power8NVL

2025-04-05 Thread Philippe Mathieu-Daudé
On 29/3/25 19:04, Aditya Gupta wrote: Power8E and Power8NVL variants are not of much use in QEMU now, and not being maintained either. Newer skiboot might not be able to boot Power8NVL since skiboot v7.0 Deprecate the 8E and 8NVL variants. After deprecation, QEMU will print a warning like belo

[PATCH v2] hw/pci-host/gt64120.c: Fix PCI host bridge endianness handling

2025-04-05 Thread rakeshj
The GT-64120 PCI controller requires special handling where: 1. Host bridge (device 0) must use native endianness 2. Other devices follow MByteSwap bit in GT_PCI0_CMD Previous implementation accidentally swapped all accesses, breaking host bridge detection (lspci -d 11ab:4620). This patch: - Adds

Re: [PATCH for-10.1 25/32] vfio: Move vfio_set_migration_error() into migration.c

2025-04-05 Thread Cédric Le Goater
+void vfio_migration_set_error(int ret) +{ +if (migration_is_running()) { +migration_file_set_error(ret, NULL); +} +} -- * The change looks okay. But with the 'Error *err = NULL' parameter, the error (ret) is also not passed on. Could we call migration_file_set_error(ret, errp

[PATCH-for-10.1 31/43] tcg: Always define TCG_GUEST_DEFAULT_MO

2025-04-05 Thread Philippe Mathieu-Daudé
We only require the TCG_GUEST_DEFAULT_MO for MTTCG-enabled frontends, otherwise we use a default value of TCG_MO_ALL. In order to simplify, require the definition for all targets, defining it for hexagon, m68k, rx, sh4 and tricore. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johanss

Re: [PATCH v2 02/30] exec/cpu-all: extract tlb flags defines to exec/tlb-flags.h

2025-04-05 Thread Richard Henderson
On 3/20/25 15:29, Pierrick Bouvier wrote: Signed-off-by: Pierrick Bouvier --- include/exec/cpu-all.h | 63 include/exec/tlb-flags.h | 87 accel/tcg/cputlb.c | 1 + accel/tcg/user-exec.c

[PATCH v2] target/loongarch: fix bad shift in check_ps()

2025-04-05 Thread Song Gao
In expression 1ULL << tlb_ps, left shifting by more than 63 bits has undefined behavior. The shift amount, tlb_ps, is as much as 64. check "tlb_ps >=64" to fix. Resolves: Coverity CID 1593475 Fixes: d882c284a3 ("target/loongarch: check tlb_ps") Suggested-by: Peter Maydell Signed-off-by: Song G

RE: [PATCH 38/39] target/hexagon: Add guest reg reading functionality

2025-04-05 Thread ltaylorsimpson
> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:29 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

[PATCH] mailmap: Update email address for Akihiko Odaki

2025-04-05 Thread Akihiko Odaki
It's too late but better than never. Signed-off-by: Akihiko Odaki --- .mailmap | 1 + 1 file changed, 1 insertion(+) diff --git a/.mailmap b/.mailmap index 5f6df414e1f7..33fe75400fe3 100644 --- a/.mailmap +++ b/.mailmap @@ -67,6 +67,7 @@ Andrey Drobyshev Andrey Drobyshev via BALATON Zoltan v

[PATCH v3 07/10] target/i386/kvm: query kvm.enable_pmu parameter

2025-04-05 Thread Dongli Zhang
There is no way to distinguish between the following scenarios: (1) KVM_CAP_PMU_CAPABILITY is not supported. (2) KVM_CAP_PMU_CAPABILITY is supported but disabled via the module parameter kvm.enable_pmu=N. In scenario (1), there is no way to fully disable AMD PMU virtualization. In scenario (2),

Re: [PATCH v8 14/55] i386/tdx: Set APIC bus rate to match with what TDX module enforces

2025-04-05 Thread Daniel P . Berrangé
On Tue, Apr 01, 2025 at 09:01:24AM -0400, Xiaoyao Li wrote: > TDX advertises core crystal clock with cpuid[0x15] as 25MHz for TD > guests and it's unchangeable from VMM. As a result, TDX guest reads > the APIC timer as the same frequency, 25MHz. Did you means/as/at/ ? > While KVM's default e

Re: [PATCH v5 2/4] virtio_net: Add the check for vdpa's mac address

2025-04-05 Thread Lei Yang
QE tested this series of patches with virtio-net regression tests, everything works fine. Tested-by: Lei Yang On Wed, Mar 26, 2025 at 9:21 PM Cindy Lu wrote: > When using a VDPA device, it is important to ensure that the MAC > address is correctly set. The MAC address in the hardware should >

Re: [RFC PATCH v2 05/20] hw/arm/smmuv3-accel: Associate a pxb-pcie bus

2025-04-05 Thread Eric Auger
Hi Don, On 3/19/25 5:21 PM, Donald Dutile wrote: > > > On 3/19/25 5:26 AM, Shameerali Kolothum Thodi wrote: >> Hi Don, >> > Hey! > >>> -Original Message- >>> From: Donald Dutile >>> Sent: Tuesday, March 18, 2025 10:12 PM >>> To: Shameerali Kolothum Thodi >>> ; qemu-...@nongnu.org; >>> qe

[PATCH v2 1/2] io/block: Refactoring the bdrv_drained_begin() function and implement a timeout mechanism.

2025-04-05 Thread zoudongjie via
From: Zhu Yangyang The bdrv_drained_begin() function is a blocking function. In scenarios where network storage is used and network links fail, it may block for a long time. Therefore, we add a timeout parameter to control the duration of the block. Since bdrv_drained_begin() has been widely ad

Re: [PATCH for-10.1 01/32] vfio: Move vfio_mig_active() into migration.c

2025-04-05 Thread John Levon
On Tue, Mar 18, 2025 at 10:53:44AM +0100, Cédric Le Goater wrote: > vfio_mig_active() is part of the VFIO migration API. Move the > definitions where VFIO migration is implemented. > > Signed-off-by: Cédric Le Goater Reviewed-by: John Levon regards john

[PATCH v1 20/22] test/qtest/hace: Support to test upper 32 bits of digest and source addresses

2025-04-05 Thread Jamin Lin via
Added "src_hi" and "dest_hi" fields to "AspeedMasks" for 64-bit addresses test. Updated "aspeed_test_addresses" to validate "HACE_HASH_SRC_HI" and "HACE_HASH_DIGEST_HI". Ensured correct masking of 64-bit addresses by checking both lower and upper 32-bit registers. Signed-off-by: Jamin Lin --- te

[PULL 0/6] Uefi 20250321 patches

2025-04-05 Thread Gerd Hoffmann
The following changes since commit 1dae461a913f9da88df05de6e2020d3134356f2e: Update version for v10.0.0-rc0 release (2025-03-18 10:18:14 -0400) are available in the Git repository at: https://gitlab.com/kraxel/qemu.git tags/uefi-20250321-pull-request for you to fetch changes up to 5e5d18d2c

Re: [PATCH v2 08/10] target/i386/kvm: reset AMD PMU registers during VM reset

2025-04-05 Thread Dongli Zhang
Hi ewanhai (and FYI Zhao), Thank you very much for suggestion! Indeed recently I am struggling with QEMU and Zhaoxin. Please see inline. On 3/27/25 11:29 PM, ewanhai wrote: > Hi Zhao, > > Thank you for pointing out the potential impact on Zhaoxin CPUs! > > Hi Dongli, > > Zhaoxin (including ven

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