On Fri, 21 Mar 2025 at 13:33, Paolo Bonzini <pbonz...@redhat.com> wrote:
>
> Due to a missing "& 0x18", timer registers are not decoded correctly.
> This breaks the tests/functional/test_x86_64_tuxrun.py functional
> test.
>
> Fixes: 519088b7cf6 ("rust: hpet: decode HPET registers into enums",
> 2025-03-06)
> Reported-by: Peter Maydell <peter.mayd...@linaro.org>
> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>
> ---
> rust/hw/timer/hpet/src/hpet.rs | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/rust/hw/timer/hpet/src/hpet.rs b/rust/hw/timer/hpet/src/hpet.rs
> index 63c1971f0b5..3ae3ec25f17 100644
> --- a/rust/hw/timer/hpet/src/hpet.rs
> +++ b/rust/hw/timer/hpet/src/hpet.rs
> @@ -776,7 +776,7 @@ fn decode(&self, mut addr: hwaddr, size: u32) ->
> HPETAddrDecode {
> let timer_id: usize = ((addr - 0x100) / 0x20) as usize;
> if timer_id <= self.num_timers.get() {
> // TODO: Add trace point -
> trace_hpet_ram_[read|write]_timer_id(timer_id)
> - TimerRegister::try_from(addr)
> + TimerRegister::try_from(addr & 0x18)
> .map(|reg| HPETRegister::Timer(&self.timers[timer_id],
> reg))
> } else {
> // TODO: Add trace point -
> trace_hpet_timer_id_out_of_range(timer_id)
> --
Tested-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
If I understand the code correctly I think you could also
write this as "addr & 0x1f" which might be a little nicer
as it then lines up with the "/ 0x20".
thanks
-- PMM
