On 3/21/25 10:26, Jamin Lin wrote:
The test cases for the ASPEED HACE model were originally placed in
aspeed_hace-test.c. However, this test file only supports ARM32. To enable
compatibility with all ASPEED SoCs, including the AST2700, which uses the
AArch64 architecture, this update introduces a
On Thu, Apr 3, 2025 at 12:36 AM Michael S. Tsirkin wrote:
>
> On Wed, Mar 26, 2025 at 09:19:33PM +0800, Cindy Lu wrote:
> > For VDPA devices, Allow configurations where both the hardware MAC address
> > and QEMU command line MAC address are zero.
> >
> > Signed-off-by: Cindy Lu
> > ---
> > hw/ne
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
target/loongarch/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index ea1665e2705..cb96b17911a 100644
--- a/target/loongarch/cpu.c
+++ b/target/loon
By using arm_cpu_has_feature() instead of arm_feature()
we don't need to include "cpu.h" anymore.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/realview.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/hw/arm/realview.c b/hw/arm/realview.c
index f81d084eb80..48
On Mon, Mar 31, 2025 at 10:57:22PM +1000, Nicholas Piggin wrote:
> If the dont-log flag is set in the 'timer use' field for the
> 'set watchdog' command, a watchdog timeout will not get logged as
> a timer use expiration.
>
> Signed-off-by: Nicholas Piggin
> ---
> hw/ipmi/ipmi_bmc_sim.c | 7
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/aspeed_ast27x0.c| 1 +
hw/arm/bcm2838.c | 1 +
hw/arm/exynos4210.c| 1 +
hw/arm/fsl-imx8mp.c| 1 +
hw/arm/mps3r.c | 1 +
hw/arm/npcm8xx.c | 1 +
hw/vmapple/vmapple.c | 1 +
target/arm/tcg/op
Only cpu.c requires "multiprocessing.h" definitions so far.
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/cpu.h | 1 -
target/arm/cpu.c | 1 +
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 88ed06987f3..768e784c3e9 100644
--- a/targe
arm_cpu_has_feature() is equivalent of arm_feature(), however
while the latter uses CPUARMState so is target-specific, the
former doesn't and can be called by target-agnostic code in hw/.
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/cpu_has_feature.h | 2 ++
target/arm/cpu.c
arm-qmp-cmds.c uses ARM_MAX_VQ, which is defined in "cpu.h".
Include the latter to avoid when refactoring unrelated headers:
target/arm/arm-qmp-cmds.c:83:19: error: use of undeclared identifier
'ARM_MAX_VQ'
83 | QEMU_BUILD_BUG_ON(ARM_MAX_VQ > 16);
| ^
Signed-off-
Extract PSCI definitions (which are not target specific)
to the new "target/arm/psci.h", so code from hw/arm/ can
use them without having to include the target specific
"cpu.h" header.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/arm/boot.h | 3 ++-
target/arm/cpu.h | 6
ARMCPU typedef is declared in "cpu-qom.h". Include it in
order to avoid when refactoring unrelated headers:
target/arm/kvm_arm.h:54:29: error: unknown type name 'ARMCPU'
54 | bool write_list_to_kvmstate(ARMCPU *cpu, int level);
| ^
Signed-off-by: Philipp
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/cpu.h | 54 +-
target/arm/cpu_has_feature.h | 65
2 files changed, 66 insertions(+), 53 deletions(-)
create mode 100644 target/arm/cpu_has_feature.h
diff --git a/tar
On Thu, Apr 3, 2025 at 2:11 AM Richard Henderson
wrote:
>
> On 4/1/25 20:04, Huacai Chen wrote:
> > Hi, Richard,
> >
> > On Tue, Apr 1, 2025 at 9:39 PM Richard Henderson
> > wrote:
> >>
> >> On 3/31/25 20:15, Huacai Chen wrote:
> # define TARGET_VIRT_ADDR_SPACE_BITS 32
> #endif
>
On 2/19/25 15:48, John Levon wrote:
From: Jagannathan Raman
Pass through the MemoryRegion to DMA operation handlers of vfio
containers. The vfio-user container will need this later.
Originally-by: John Johnson
Signed-off-by: Jagannathan Raman
Signed-off-by: Elena Ufimtseva
Signed-off-by: Jo
On 2/4/25 22:27, Philippe Mathieu-Daudé wrote:
On 2/4/25 22:00, Richard Henderson wrote:
On 3/21/25 11:15, Philippe Mathieu-Daudé wrote:
Since v1:
- Do not use tcg_ctx in tcg_req_mo (rth)
Hi,
In this series we replace the TCG_GUEST_DEFAULT_MO definition
from "cpu-param.h" by a 'guest_default_
>From a42046272f0544dd18ed58661e53ea17d1584c2c Mon Sep 17 00:00:00 2001
From: William Hu
Date: Wed, 2 Apr 2025 12:00:00 -0400
Subject: [PATCH] ui/curses: Fix infinite loop on windows
Replace -1 comparisons for wint_t with WEOF to fix infinite loop caused by a
65535 == -1 comparison.
Resolves: ht
The purpose of the prepare script is to invoke `cpp` to preprocess input
to idef-parser by expanding a few select macros. On macOS `cpp`
expands into `clang ... -traditional-cpp` which breaks macro
concatenation. Replace `cpp` with `${compiler} -E`
and replace the script with a meson custom_targe
On Tue, Apr 01, 2025 at 09:01:28AM -0400, Xiaoyao Li wrote:
> After TDVF is loaded to bios MemoryRegion, it needs parse TDVF metadata.
>
> Signed-off-by: Xiaoyao Li
> Acked-by: Gerd Hoffmann
> ---
> hw/i386/pc_sysfw.c | 7 +++
> target/i386/kvm/tdx-stub.c | 5 +
> target/i386/kv
On 18.10.24 16:59, Kevin Wolf wrote:
If we want to get rid of the union, I think the best course of action
would unifying the namespaces (so that nodes, exports and devices can't
share the same ID) and then we could just accept a universal 'id' along
with 'child'.
Maybe we can go this way even
On Tue, Apr 01, 2025 at 09:01:53AM -0400, Xiaoyao Li wrote:
> Because for TDX case, there are also fixed-1 bits that enfored by TDX
> module.
>
> Signed-off-by: Xiaoyao Li
> ---
> target/i386/confidential-guest.h | 20 ++--
> target/i386/kvm/kvm.c| 2 +-
> target/i38
Sorry for the late response.
KVM part of TDX attestation support is submitting again. QEMU part will
follow and we need to settle dowm this topic before QEMU patches submission.
On 10/4/2024 2:08 AM, Daniel P. Berrangé wrote:
On Thu, Feb 29, 2024 at 01:37:10AM -0500, Xiaoyao Li wrote:
From:
On 4/1/25 21:06, Philippe Mathieu-Daudé wrote:
Cc'ing Pierrick
On 12/1/23 08:17, Philippe Mathieu-Daudé wrote:
On 11/1/23 21:02, Richard Henderson wrote:
On 1/10/23 08:43, Philippe Mathieu-Daudé wrote:
+++ b/target/arm/cpu.h
@@ -26,6 +26,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs
On 4/2/25 14:40, Maciej S. Szmigiero wrote:
On 2.04.2025 11:51, Cédric Le Goater wrote:
Hello Maciej,
On 4/1/25 14:26, Maciej S. Szmigiero wrote:
On 11.03.2025 14:04, Cédric Le Goater wrote:
On 3/7/25 14:45, Maciej S. Szmigiero wrote:
On 7.03.2025 13:03, Cédric Le Goater wrote:
On 3/7/25 11
On 2.04.2025 11:51, Cédric Le Goater wrote:
Hello Maciej,
On 4/1/25 14:26, Maciej S. Szmigiero wrote:
On 11.03.2025 14:04, Cédric Le Goater wrote:
On 3/7/25 14:45, Maciej S. Szmigiero wrote:
On 7.03.2025 13:03, Cédric Le Goater wrote:
On 3/7/25 11:57, Maciej S. Szmigiero wrote:
From: "Macie
On Wed, Apr 02, 2025 at 09:33:16AM +, Bernhard Beschow wrote:
>
>
> Am 31. März 2025 09:18:05 UTC schrieb "Daniel P. Berrangé"
> :
> >On Sun, Mar 30, 2025 at 10:58:57PM +0200, Bernhard Beschow wrote:
> >> Now that there is logging support in Rust for QEMU, use it in the pl011
> >> device.
>
On 26/03/2025 07:51, Cédric Le Goater wrote:
> Routines of common.c :
>
> vfio_devices_all_dirty_tracking_started
> vfio_devices_all_device_dirty_tracking
> vfio_devices_query_dirty_bitmap
> vfio_get_dirty_bitmap
>
> are all related to dirty page tracking directly at the container level
> or
On Wed, Apr 02, 2025 at 02:36:01PM +0200, Pierre-Samuel LE STANG wrote:
> Hello team,
>
> I'm facing the issue of windows instances not beeing able of retrieving
> the uuid because of smbios 3.0 (qemu 8.2 on debian openstack/libvirt).
> The instances are of pc-i440fx-8.2 machine type.
>
> If I u
On 26/03/2025 07:51, Cédric Le Goater wrote:
> Also rename vfio_devices_all_device_dirty_tracking_started() while at
> it and use the prefix 'vfio_container_devices_' for routines simply
> looping over the container's device list.
>
> Signed-off-by: Cédric Le Goater
Much better name indeed:
On 25/3/25 02:24, Richard Henderson wrote:
On 3/24/25 14:11, Pierrick Bouvier wrote:
On 3/23/25 12:37, Richard Henderson wrote:
On 3/20/25 15:29, Pierrick Bouvier wrote:
This does not hurt, even if they are not used.
Signed-off-by: Pierrick Bouvier
---
target/arm/cpu.h | 2 --
1 file ch
Add PCF8563 a real-time clock with calendar and I2C interface.
This commit adds support for interfacing with it and implements
functionality of setting timer, alarm, reading and writing time.
Add a unit test for pcf8563_rtc module, that checks:
- default value after initialization
- set/get time
On 2/19/25 15:48, John Levon wrote:
Some containers can directly implement unmapping all regions;
add a new flag to support this.
Originally-by: John Johnson
Signed-off-by: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
Signed-off-by: John Levon
---
hw/vfio/common.c
On 2/19/25 15:48, John Levon wrote:
Allow attachment by explicitly passing a TYPE_VFIO_IOMMU_* string;
vfio-user will use this later.
Signed-off-by: John Levon
---
hw/vfio/common.c | 30 +++---
include/hw/vfio/vfio-common.h | 3 +++
2 files changed, 22
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/backend-ldst.h| 41 +
accel/tcg/internal-common.h | 27
accel/tcg/internal-target.h | 28 -
accel/tcg/cputlb.c | 1 +
accel/tcg/user-exec.c
Il mar 1 apr 2025, 10:27 Daniel P. Berrangé ha
scritto:
> This is a non-trivial degradation for the tracing code. The code is
> generated in an inline function in the header so that when a probe
> point is not active, it has as little overhead as possible - with
> some backends it will just a 'no
"target/arm/cpu-features.h" dereferences the ARMISARegisters
structure, which is defined in "cpu.h". Include the latter to
avoid when refactoring unrelated headers:
In file included from target/arm/internals.h:33:
target/arm/cpu-features.h:45:54: error: unknown type name 'ARMISARegisters'
Using arm_cpu_has_feature() instead of arm_feature() remove
a dependency on (the indirectly included) "cpu.h" header.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/virt-acpi-build.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-ac
This series is more useful for heterogeneous emulation preparation
than single binary, because it allows non-ARM hw/ code to configure
ARM cores, so not using target-specific APIs. I figured some
patches could be useful to Pierrick "build hw/arm once" series (in
particular arm_cpu_has_feature).
Ph
ARMCPU typedef is declared in "cpu-qom.h". Include it in
order to avoid when refactoring unrelated headers:
target/arm/hvf_arm.h:23:41: error: unknown type name 'ARMCPU'
23 | void hvf_arm_set_cpu_features_from_host(ARMCPU *cpu);
| ^
Signed-of
On Thu, Apr 3, 2025 at 2:43 AM Richard Henderson
wrote:
>
> On 4/2/25 06:54, Zhang Chen wrote:
> > Because of the CONFIG_TCG auto enabled, the cpu type "cortex-a15"
> > is mistakenly set to the default AARCH64 target.
>
> This is the correct backward compatible setting.
> In essence, it means that
On 2/4/25 23:03, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
target/s390x/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
index 1f75629ddc2..320ace67198 100644
--- a/t
Hi Phil,
On 4/2/25 07:30, Philippe Mathieu-Daudé wrote:
On 2/4/25 08:41, Gustavo Romero wrote:
Hi Phil,
On 3/31/25 19:12, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
Please, put commit message (body) into the commits.
For example, the commit message here could quic
Hi Phil,
On 4/2/25 07:27, Philippe Mathieu-Daudé wrote:
On 2/4/25 08:43, Gustavo Romero wrote:
Hi Phil,
On 3/31/25 19:12, Philippe Mathieu-Daudé wrote:
GIC ITS is checked for the MADT and IORT tables.
Factor the checks out to the its_enabled() helper.
Signed-off-by: Philippe Mathieu-Daudé
-
Hi Phil,
On 4/2/25 07:34, Philippe Mathieu-Daudé wrote:
On 2/4/25 08:45, Gustavo Romero wrote:
Hi Phil,
On 3/31/25 19:12, Philippe Mathieu-Daudé wrote:
Changes in the tables:
@@ -1,32 +1,32 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20240927 (6
Hi Phil,
On 4/2/25 07:31, Philippe Mathieu-Daudé wrote:
On 2/4/25 08:43, Gustavo Romero wrote:
Hi Phil,
On 3/31/25 19:12, Philippe Mathieu-Daudé wrote:
Prepare for ACPI table change in aarch64/virt/APIC.its_off.
The comment could be smth like:
Ignore APIC.its_off expected table (blob) for
On 2/4/25 08:41, Gustavo Romero wrote:
Hi Phil,
On 3/31/25 19:12, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
Please, put commit message (body) into the commits.
For example, the commit message here could quickly explain that the FACP
table
changed because virtuali
On 2/4/25 08:43, Gustavo Romero wrote:
Hi Phil,
On 3/31/25 19:12, Philippe Mathieu-Daudé wrote:
Prepare for ACPI table change in aarch64/virt/APIC.its_off.
The comment could be smth like:
Ignore APIC.its_off expected table (blob) for now until
we update it later, after fixing the code that g
On 2/4/25 08:45, Gustavo Romero wrote:
Hi Phil,
On 3/31/25 19:12, Philippe Mathieu-Daudé wrote:
Changes in the tables:
@@ -1,32 +1,32 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20240927 (64-bit version)
* Copyright (c) 2000 - 2023 Intel Corp
On Tue, Apr 01, 2025 at 09:01:48AM -0400, Xiaoyao Li wrote:
> KVM mandates kernel_irqchip to be split mode.
>
> Set it to split mode automatically when users don't provide an explicit
> value, otherwise check it to be the split mode.
>
> Suggested-by: Daniel P. Berrangé
> Signed-off-by: Xiaoyao
CC libvirt / Jiri, for confirmation about whether the CPUID restrictions
listed below will have any possible impact on libvirt CPUID handling...
On Tue, Apr 01, 2025 at 09:02:05AM -0400, Xiaoyao Li wrote:
> Add docs/system/i386/tdx.rst for TDX support, and add tdx in
> confidential-guest-support.r
Hi Phil,
On 3/31/25 19:12, Philippe Mathieu-Daudé wrote:
GIC ITS is checked for the MADT and IORT tables.
Factor the checks out to the its_enabled() helper.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/virt-acpi-build.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
On Tue, Apr 01, 2025 at 09:01:25AM -0400, Xiaoyao Li wrote:
> Reuse "-cpu,tsc-frequency=" to get user wanted tsc frequency and call VM
> scope VM_SET_TSC_KHZ to set the tsc frequency of TD before KVM_TDX_INIT_VM.
>
> Besides, sanity check the tsc frequency to be in the legal range and
> legal gran
On 26/03/2025 07:51, Cédric Le Goater wrote:
> vfio_container_query_dirty_bitmap() is consistent the VFIO container
> routine naming scheme and is now free to use.
>
> Signed-off-by: Cédric Le Goater
Reviewed-by: Joao Martins
> ---
> include/hw/vfio/vfio-container-base.h | 4 ++--
> hw/vfio/c
On 26/03/2025 07:51, Cédric Le Goater wrote:
> vfio_devices_query_dirty_bitmap() is only used in "container-base.c".
> Also, rename to vfio_container_devices_query_dirty_bitmap() to reflect
> with the prefix 'vfio_container_devices_' that it simply loops over
> the container's device list.
>
> Thi
On 3/21/25 10:26, Jamin Lin wrote:
Added "key" and "key_hi" fields to "AspeedMasks" for 64-bit addresses test.
Updated "aspeed_test_addresses" to validate "HACE_HASH_KEY_BUFF" and
"HACE_HASH_KEY_BUFF_HI".
Ensured correct masking of 64-bit addresses by checking both lower and upper
32-bit register
On Tue, Apr 01, 2025 at 09:01:27AM -0400, Xiaoyao Li wrote:
> From: Isaku Yamahata
>
> TDX VM needs to boot with its specialized firmware, Trusted Domain
> Virtual Firmware (TDVF). QEMU needs to parse TDVF and map it in TD
> guest memory prior to running the TDX VM.
>
> A TDVF Metadata in TDVF i
On Tue, Apr 01, 2025 at 09:01:46AM -0400, Xiaoyao Li wrote:
> TDX doesn't support SMM and VMM cannot emulate SMM for TDX VMs because
> VMM cannot manipulate TDX VM's memory.
>
> Disable SMM for TDX VMs and error out if user requests to enable SMM.
>
> Signed-off-by: Xiaoyao Li
> Acked-by: Gerd H
On Tue, Apr 01, 2025 at 09:01:47AM -0400, Xiaoyao Li wrote:
> Legacy PIC (8259) cannot be supported for TDX VMs since TDX module
> doesn't allow directly interrupt injection. Using posted interrupts
> for the PIC is not a viable option as the guest BIOS/kernel will not
> do EOI for PIC IRQs, i.e.
On 4/2/25 06:36, Philippe Mathieu-Daudé wrote:
On 25/3/25 02:24, Richard Henderson wrote:
On 3/24/25 14:11, Pierrick Bouvier wrote:
On 3/23/25 12:37, Richard Henderson wrote:
On 3/20/25 15:29, Pierrick Bouvier wrote:
This does not hurt, even if they are not used.
Signed-off-by: Pierrick Bouv
Hi Richard,
On 8/3/25 23:58, Richard Henderson wrote:
Some of these bits are actually common to all cpus; while the
reset have common reservations for target-specific usage.
While generic code cannot know what the target-specific usage is,
common code can know what to do with the bits, e.g. sing
On Tue, Apr 01, 2025 at 09:01:15AM -0400, Xiaoyao Li wrote:
> KVM provides TDX capabilities via sub command KVM_TDX_CAPABILITIES of
> IOCTL(KVM_MEMORY_ENCRYPT_OP). Get the capabilities when initializing
> TDX context. It will be used to validate user's setting later.
>
> Since there is no interfac
On Tue, Apr 01, 2025 at 10:22:45AM -0700, Farhan Ali wrote:
> Add a generic API for host PCI MMIO reads/writes
> (e.g. Linux VFIO BAR accesses). The functions access
> little endian memory and returns the result in
> host cpu endianness.
>
> Reviewed-by: Philippe Mathieu-Daudé
> Signed-off-by: Fa
On 4/2/2025 7:00 PM, Daniel P. Berrangé wrote:
On Tue, Apr 01, 2025 at 09:01:15AM -0400, Xiaoyao Li wrote:
KVM provides TDX capabilities via sub command KVM_TDX_CAPABILITIES of
IOCTL(KVM_MEMORY_ENCRYPT_OP). Get the capabilities when initializing
TDX context. It will be used to validate user's se
This patch introduces part of the Secure Boot Controller device,
which consists of several sub-components, including an OTP memory,
OTP controller, cryptographic engine, and boot controller.
In this version, the implementation includes the OTP memory and its
controller. The OTP memory can be progr
On Tue, Apr 01, 2025 at 09:01:23AM -0400, Xiaoyao Li wrote:
> From: Isaku Yamahata
>
> Three sha384 hash values, mrconfigid, mrowner and mrownerconfig, of a TD
> can be provided for TDX attestation. Detailed meaning of them can be
> found:
> https://lore.kernel.org/qemu-devel/31d6dbc1-f453-4cef-
On 26/03/2025 07:51, Cédric Le Goater wrote:
> File "common.c" has been emptied of most of its definitions by the
> previous changes and the only definitions left are related to the VFIO
> MemoryListener handlers. Rename it to "listener.c" and introduce its
> associated "vfio-listener.h" header fil
On 26/03/2025 07:50, Cédric Le Goater wrote:
> Gather all VFIOIOMMUFD related declarations introduced by commits
> 5ee3dc7af785 ("vfio/iommufd: Implement the iommufd backend") and
> 5b1e96e65403 ("vfio/iommufd: Introduce auto domain creation") into
> "vfio-iommufd.h". This to reduce exposure of VFI
Because of the CONFIG_TCG auto enabled, the cpu type "cortex-a15"
is mistakenly set to the default AARCH64 target.
Signed-off-by: Zhang Chen
---
hw/arm/virt.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index a96452f17a..63649e9543 10064
From: Mads Ynddal
hvf_arch_set_traps is already called from a context of a specific
CPUState, so we don't need to do a nested CPU_FOREACH.
It also results in an error from hv_vcpu_set_sys_reg, as it may only be
called from the thread owning the vCPU.
Tested-by: Daniel Gomez
Signed-off-by: Mads
On Wed, Mar 26, 2025 at 09:19:31PM +0800, Cindy Lu wrote:
> When using a VDPA device, it is important to ensure that the MAC
> address is correctly set. The MAC address in the hardware should
> match the MAC address from the QEMU command line. This is a recommended
> configuration and will allow th
On Wed, Mar 26, 2025 at 09:19:32PM +0800, Cindy Lu wrote:
> For VDPA devices, Allow configurations where the hardware MAC address
> is non-zero while the MAC address in the QEMU command line is zero.
>
> Signed-off-by: Cindy Lu
> ---
> hw/net/virtio-net.c | 14 ++
> 1 file changed, 1
On Wed, Mar 26, 2025 at 09:19:33PM +0800, Cindy Lu wrote:
> For VDPA devices, Allow configurations where both the hardware MAC address
> and QEMU command line MAC address are zero.
>
> Signed-off-by: Cindy Lu
> ---
> hw/net/virtio-net.c | 13 +
> 1 file changed, 13 insertions(+)
>
>
On Tue, Apr 01, 2025 at 09:01:17AM -0400, Xiaoyao Li wrote:
> Introduce kvm_arch_pre_create_vcpu(), to perform arch-dependent
> work prior to create any vcpu. This is for i386 TDX because it needs
> call TDX_INIT_VM before creating any vcpu.
>
> The specific implemnet of i386 will be added in the
indent on macOS, installed via homebrew, doesn't support -linux. Only
run indent on linux hosts.
Signed-off-by: Anton Johansson
---
target/hexagon/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/hexagon/meson.build b/target/hexagon/meson.build
index abcf00c
A default macOS build with xcode cli tools installed lacks the `indent`
program needed by the idef-parser postprocess step. If `indent` is
installed through homebrew it doesn't support the `-linux` flag.
Conditionally run `indent` only on linux hosts.
Additionally `cpp` used by the idef-parser pre
On Tue, Apr 01, 2025 at 09:01:20AM -0400, Xiaoyao Li wrote:
> From: Isaku Yamahata
>
> For TDX KVM use case, Linux guest is the most major one. It requires
> sept_ve_disable set. Make it default for the main use case. For other use
> case, it can be enabled/disabled via qemu command line.
>
>
On Tue, Apr 01, 2025 at 09:01:22AM -0400, Xiaoyao Li wrote:
> Validate TD attributes with tdx_caps that only supported bits are
> allowed by KVM.
>
> Besides, sanity check the attribute bits that have not been supported by
> QEMU yet. e.g., debug bit, it will be allowed in the future when debug
>
Hello Maciej,
On 4/1/25 14:26, Maciej S. Szmigiero wrote:
On 11.03.2025 14:04, Cédric Le Goater wrote:
On 3/7/25 14:45, Maciej S. Szmigiero wrote:
On 7.03.2025 13:03, Cédric Le Goater wrote:
On 3/7/25 11:57, Maciej S. Szmigiero wrote:
From: "Maciej S. Szmigiero"
There's already a max in-fl
On Tue, Apr 01, 2025 at 09:01:13AM -0400, Xiaoyao Li wrote:
> TDX VM requires VM type to be KVM_X86_TDX_VM. Implement tdx_kvm_type()
> as X86ConfidentialGuestClass->kvm_type.
>
> Signed-off-by: Xiaoyao Li
> ---
> Changes in v6:
> - new added patch;
> ---
> target/i386/kvm/kvm.c | 1 +
> target
This patch adds missing annotations for qemu_event_set, qemu_event_reset,
and qemu_event_wait to prevent TSAN from reporting false alarms caused by
the use of barriers and futex_wait.
Fixes: c7c4d063f5 ("qemu-thread: add QemuEvent")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2904
Sign
On Tue, Apr 01, 2025 at 09:01:18AM -0400, Xiaoyao Li wrote:
> Invoke KVM_TDX_INIT_VM in kvm_arch_pre_create_vcpu() that
> KVM_TDX_INIT_VM configures global TD configurations, e.g. the canonical
> CPUID config, and must be executed prior to creating vCPUs.
>
> Use kvm_x86_arch_cpuid() to setup the
On 4/2/2025 6:42 AM, Anton Johansson wrote:
indent on macOS, installed via homebrew, doesn't support -linux. Only
run indent on linux hosts.
Signed-off-by: Anton Johansson
---
Reviewed-by: Brian Cain
target/hexagon/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
d
On 4/2/2025 6:42 AM, Anton Johansson wrote:
The purpose of the prepare script is to invoke `cpp` to preprocess input
to idef-parser by expanding a few select macros. On macOS `cpp`
expands into `clang ... -traditional-cpp` which breaks macro
concatenation. Replace `cpp` with `${compiler} -E`
On 2/4/25 20:33, Richard Henderson wrote:
On 4/2/25 04:26, Philippe Mathieu-Daudé wrote:
Hi Richard,
On 18/3/25 22:31, Richard Henderson wrote:
The implementation of cpu_mmu_index was split between cpu-common.h
and cpu-all.h, depending on CONFIG_USER_ONLY. We already have the
plumbing common
As Richard mentioned:
We should allow RV128 in user-mode at all until there's a
kernel abi for it.
Remove the experimental 'x-rv128' CPU on user emulation
(since it is experimental, no deprecation period is required).
Reported-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
We'll move CPUClass::mmu_index() to TCGCPUOps::mmu_index().
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
include/accel/tcg/cpu-ops.h | 3 +++
include/exec/cpu-mmu-index.h | 5 -
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/include/accel/tcg/cpu-
Hi Richard,
Here is my patch queue based on your tcg-next tree.
Missing review: 38, 41, 43 (all news)
Thanks,
Phil.
Philippe Mathieu-Daudé (43):
tcg: Declare TARGET_INSN_START_EXTRA_WORDS in 'cpu-param.h'
tcg: Always define TARGET_INSN_START_EXTRA_WORDS
hw/core/cpu: Update CPUClass::mmu_
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
target/microblaze/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index f3bebea856e..88baeb6807a 100644
--- a/target/microblaze/cpu.c
+++ b/target/
Move arm_cpu_mmu_index() within CONFIG_TCG #ifdef'ry
and expose its prototype in "target/arm/internals.h".
Convert CPUClass::mmu_index() to TCGCPUOps::mmu_index().
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/internals.h | 1 +
target/arm/cpu.c
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
target/m68k/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
index 0065e1c1ca5..4409d8941ce 100644
--- a/target/m68k/cpu.c
+++ b/target/m68k/cpu.c
@@ -592,6 +59
By directly using TCGCPUOps::guest_default_memory_order,
we don't need the TCG_GUEST_DEFAULT_MO definition anymore.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Anton Johansson
Reviewed-by: Richard Henderson
Reviewed-by: Pierrick Bouvier
---
docs/devel/multi-thread-tcg.rst | 4 ++--
ta
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/backend-ldst.h| 41 +
accel/tcg/internal-common.h | 27
accel/tcg/internal-target.h | 28 -
accel/tcg/cputlb.c | 1 +
accel/tcg/user-exec.c
Use the OnOffAuto type as 3-state.
Since the TCGState instance is zero-initialized, the
mttcg_enabled is initialzed as AUTO (ON_OFF_AUTO_AUTO).
In tcg_init_machine(), if mttcg_enabled is still AUTO,
set a default value (effectively inlining the
default_mttcg_enabled() method content).
Instead of
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
target/tricore/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c
index 16acc4ecb92..833a93d37af 100644
--- a/target/tricore/cpu.c
+++ b/target/tricore/cpu.
Use TCGCPUOps::guest_default_memory_order to set TCGContext::guest_mo.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
accel/tcg/translate-all.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
ind
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
target/i386/tcg/seg_helper.h | 6 --
1 file changed, 6 deletions(-)
diff --git a/target/i386/tcg/seg_helper.h b/target/i386/tcg/seg_helper.h
index ebf10352778..6b8606cd6d8 100644
--- a/target/i386/tcg/seg_helper.h
+++
In preparation of having tcg_req_mo() access CPUState in
the next commit, pass it to cpu_req_mo(), its single caller.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
accel/tcg/internal-target.h | 3 ++-
accel/tcg/cputlb.c | 20 ++--
accel/tcg/u
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
target/openrisc/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
index e8abf1f8b5c..dc55594a7de 100644
--- a/target/openrisc/cpu.c
+++ b/target/openrisc
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
include/{exec => accel/tcg}/cpu-mmu-index.h | 6 +++---
include/exec/cpu_ldst.h | 2 +-
accel/tcg/translator.c | 2 +-
semihosting/uaccess.c | 2 +-
target/arm/
Move x86_cpu_mmu_index() to tcg-cpu.c, convert
CPUClass::mmu_index() to TCGCPUOps::mmu_index().
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
target/i386/cpu.h| 2 --
target/i386/tcg/tcg-cpu.h| 2 ++
target/i386/cpu.c| 18
Since commits 32a8ea12fab..90b7022e698 (target: "Split out
TARGET_env_mmu_index"), target's memory_rw_debug() callbacks
use the target's TARGET_env_mmu_index(), not the generic
CPUClass::mmu_index() callback. Update the documentation.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Hen
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