Re: [PATCH] ppc/amigaone: Check blk_pwrite return value

On Mon, 17 Mar 2025, Cédric Le Goater wrote: On 3/14/25 21:01, BALATON Zoltan wrote: Coverity reported that return value of blk_pwrite() maybe should not be ignored. We can't do much if this happens other than report an error but let's do that to silence this report. Resolves: Coverity CID 1593

[PATCH 01/17] rust/vmstate: Remove unnecessary unsafe

Remove the `unsafe` block of vmsd, because vmsd (passed to vmstate_struct) is defined in Rust side now, and it doesn't need `unsafe`. Signed-off-by: Zhao Liu --- rust/qemu-api/src/vmstate.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/rust/qemu-api/src/vmstate.rs b/rust/q

[PATCH 05/17] rust/vmstate: Fix num field when varray flags are set

Array type vmstate has the VMStateField with `num` equals its length. When the varray vmstate is built based a array type, the `num` field should be cleaned to 0, because varray uses `num_offset` instead of `num` to store elements number information. Signed-off-by: Zhao Liu --- rust/qemu-api/sr

Re: [PATCH v7 5/5] migration: add MULTIFD_RECV_SYNC migration command

On Mon, Mar 17, 2025 at 06:00:14PM +0530, Prasad Pandit wrote: > Hi, > > On Fri, 14 Mar 2025 at 01:40, Peter Xu wrote: > >+save_section_header(f, se, QEMU_VM_SECTION_PART); > > +ram_save_zero_page(f, se->opaque); > >I'll stop requesting a why here... > > * Earlier in this thread

Re: [PATCH for-10.1 3/9] target/arm: Handle AArch64 in TYPE_ARM_CPU gdb_arch_name

Peter Maydell writes: > Instead of having the TYPE_AARCH64_CPU subclass set > CPUClass::gdb_arch_name to a different function, make the > TYPE_ARM_CPU implementation of the method handle AArch64. > > For the moment we make the "is this AArch64?" function test "is the > CPU of TYPE_AARCH64_CPU?",

RE: [PATCH 04/39] target/hexagon: Implement start/stop helpers

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:28 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

[PULL 1/2] hw/misc: use extract64 instead of 1 << i

From: Tigran Sogomonian 1 << i is casted to uint64_t while bitwise and with val. So this value may become 0x8000 but only 31th "start" bit is required. Use the bitfield extract() API instead. Found by Linux Verification Center (linuxtesting.org) with SVACE. Signed-off-by: Tigran Sog

Re: [PATCH 03/17] rust/vmstate: Add a prefix separator ", " for the array field in vmstate macros

On Mon, Mar 17, 2025 at 3:52 PM Zhao Liu wrote: > > The fields are separated by ",", so it's necessary to add ", " in array > field to avoid matching failure. This is not a field though, the only (intended) fields are name and field. It's meant to mimic the slice since &a[0..n]. Paolo > Signed-

Re: [PATCH 12/17] rust/vmstate: Support version field in vmstate macros

On Mon, Mar 17, 2025 at 3:52 PM Zhao Liu wrote: > Add "version = *" in vmstate macros to help set version_id in > VMStateField. Could it use a ".with_min_version(2)" annotation (or something similar) instead? Paolo > Signed-off-by: Zhao Liu > --- > rust/qemu-api/src/vmstate.rs | 6 -- > 1

[PATCH] rust: pl011: Cut down amount of text quoted from PL011 TRM

Currently the comments in the Rust pl011 register.rs file include large amounts of text from the PL011 TRM. This is much more commentary than we typically quote from a device reference manual, and much of it is not relevant to QEMU. Compress and rephrase the comments so that we are not quoting su

[PATCH 07/17] rust/vmstate: Fix type check for varray in vmstate_struct

When pass a varray to vmstate_struct, the `type` parameter should be the type of the element in the varray, for example: vmstate_struct!(HPETState, timers, [0 .. num_timers], VMSTATE_HPET_TIMER, BqlRefCell, version = 0) But this breaks current type check, because it checks the typ

Re: [PATCH v6] hw/misc/vmfwupdate: Introduce hypervisor fw-cfg interface support

On 17.03.25 10:56, Gerd Hoffman wrote: On Fri, Mar 14, 2025 at 03:50:19PM +0100, Alexander Graf wrote: On 14.03.25 15:08, Gerd Hoffman wrote: Hi, Ok, assuming we allow the guest submit a IGVM image (which makes sense indeed, otherwise we'll probably end up re-inventing IGVM). How will

Re: [PATCH v3 8/8] tests/functional: Add test for fadump in PSeries

On 17/03/25 12:30, Thomas Huth wrote: On 17/03/2025 07.51, Aditya Gupta wrote: Hi Thomas, <...snip...> +    def test_fadump_pseries_kvm(self): +    """ +    Test Fadump in PSeries with KVM accel +    """ +    self.do_test_fadump(is_kvm=True, is_powernv=False) + +if __name__ ==

RE: [PATCH 05/39] target/hexagon: Implement modify SSR

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:28 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 06/39] target/hexagon: Implement {g,s}etimask helpers

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:28 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

Re: [RFC PATCH v2 03/20] hw/arm/smmuv3-accel: Add initial infrastructure for smmuv3-accel device

On Wed, Mar 12, 2025 at 04:15:10PM +0100, Eric Auger wrote: > On 3/11/25 3:10 PM, Shameer Kolothum wrote: > > Based on SMMUv3 as a parent device, add a user-creatable smmuv3-accel > > device. In order to support vfio-pci dev assignment with a Guest > guest > > SMMUv3, the physical SMMUv3 has to be

RE: [PATCH 03/39] target/hexagon: Implement iassign{r,w} helpers

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:28 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

[PATCH 08/17] rust/vmstate: Fix "cannot infer type" error in vmstate_struct

Rust cannot infer the type (it should be VMStateField) after Zeroable::ZERO, which cause the compiling error. To fix this error, call with_varray_flag() after VMStateField's initialization. Signed-off-by: Zhao Liu --- rust/qemu-api/src/vmstate.rs | 16 +--- 1 file changed, 9 inserti

KVM/QEMU community call 18/3/2025 agenda items

Hi, The KVM/QEMU community call is at: https://meet.jit.si/kvmcallmeeting @ 18/03/2025 14:00 UTC Are there any agenda items for the sync-up? -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PATCH v5 11/17] exec/ram_addr: call xen_hvm_modified_memory only if xen is enabled

On 17/3/25 17:07, Pierrick Bouvier wrote: On 3/17/25 08:50, Philippe Mathieu-Daudé wrote: On 14/3/25 18:31, Pierrick Bouvier wrote: Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier ---    include/exec/ram_addr.h | 8 ++--    1 file changed, 6 insertions(+), 2 deletions(-) di

Re: [PATCH 1/2] accel/tcg: Remove unnecesary inclusion of memory-internal.h in cputlb.c

On 3/17/25 09:13, Philippe Mathieu-Daudé wrote: At some point cputlb.c stopped depending on the "exec/memory-internal.h" header. Clean that now. Signed-off-by: Philippe Mathieu-Daudé --- accel/tcg/cputlb.c | 1 - 1 file changed, 1 deletion(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cput

Re: [PATCH v5 11/17] exec/ram_addr: call xen_hvm_modified_memory only if xen is enabled

On 17/3/25 17:22, Philippe Mathieu-Daudé wrote: On 17/3/25 17:07, Pierrick Bouvier wrote: On 3/17/25 08:50, Philippe Mathieu-Daudé wrote: On 14/3/25 18:31, Pierrick Bouvier wrote: Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier ---    include/exec/ram_addr.h | 8 ++--    1

RE: [PATCH 01/39] target/hexagon: Implement ciad helper

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:28 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

Re: [PATCH] hw/virtio: Also include md stubs in case CONFIG_VIRTIO_PCI is not set

On 13/3/25 07:35, Thomas Huth wrote: For the s390x target, it's possible to build the QEMU binary without CONFIG_VIRTIO_PCI and only have the virtio-mem device via the ccw transport. In that case, QEMU currently fails to link correctly: /usr/bin/ld: libqemu-s390x-softmmu.a.p/hw_s390x_s390-virt

Re: [PATCH] hw/misc/npcm_clk: fix buffer-overflow

On 26/02/2025 21.50, Peter Maydell wrote: (edited cc list since it's moved away from a discussion of this particular patch and on to a testing/ci coverage issue) On Wed, 26 Feb 2025 at 19:03, Pierrick Bouvier wrote: On 2/26/25 03:50, Peter Maydell wrote: On Tue, 25 Feb 2025 at 20:57, Pierric

[PATCH v3 1/3] target/loongarch: Fix error handling of KVM feature checks

For some paravirt KVM features, if user forces to enable it however KVM does not support, qemu should fail to run and exit immediately, rather than continue to run. Here set error message and return directly in function kvm_arch_init_vcpu(). Fixes: 6edd2a9bec90 (target/loongarch/kvm: Implement Loo

Re: [PATCH] hw/virtio: Also include md stubs in case CONFIG_VIRTIO_PCI is not set

On 13/03/2025 07.35, Thomas Huth wrote: For the s390x target, it's possible to build the QEMU binary without CONFIG_VIRTIO_PCI and only have the virtio-mem device via the ccw transport. In that case, QEMU currently fails to link correctly: /usr/bin/ld: libqemu-s390x-softmmu.a.p/hw_s390x_s390-v

[PATCH 10/17] rust/vmstate: Relax array check when build varray in vmstate_struct

The varry of structure created by vmstate_struct is different with vmstate_of. This is because vmstate_struct uses the `vmsd` to traverse the vmstates of structure's fields, rather than treating the structure directly as a well-defined vmstate. Therefore, there's no need to check array flag when b

[PATCH 0/2] exec: Restrict memory-internal.h to system/

Only file units within the system/ directory need access to "memory-internal.h". Move it to system/ to restrict its scope. Based-on: <20250314173139.2122904-1-pierrick.bouv...@linaro.org> Philippe Mathieu-Daudé (2): accel/tcg: Remove unnecesary inclusion of memory-internal.h in cputlb.c e

[PATCH for-10.1 7/9] target/arm: Move aarch64 CPU property code to TYPE_ARM_CPU

The only thing we have left in the TYPE_AARCH64_CPU class that makes it different to TYPE_ARM_CPU is that we register the handling of the "aarch64" property there. Move the handling of this property to the base class, where we make it a property of the object rather than of the class, and add it t

[PATCH 2/2] exec: Restrict memory-internal.h to system/

Only file units within the system/ directory need access to "memory-internal.h". Restrict its scope by moving it there. The comment from commit 9d70618c684 ("memory-internal.h: Remove obsolete claim that header is obsolete") is now obsolete, remove it. Signed-off-by: Philippe Mathieu-Daudé ---

Re: [PATCH v5 11/17] exec/ram_addr: call xen_hvm_modified_memory only if xen is enabled

On 3/17/25 08:50, Philippe Mathieu-Daudé wrote: On 14/3/25 18:31, Pierrick Bouvier wrote: Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier --- include/exec/ram_addr.h | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/include/exec/ram_addr.h b/includ

Re: [RFC PATCH v2 09/20] hw/arm/smmuv3-accel: Add set/unset_iommu_device callback

On Mon, Mar 17, 2025 at 08:38:23AM +, Shameerali Kolothum Thodi wrote: > Hi Nicolin, > > > -Original Message- > > From: Nicolin Chen > > Sent: Tuesday, March 11, 2025 9:08 PM > > To: Shameerali Kolothum Thodi > > Cc: qemu-...@nongnu.org; qemu-devel@nongnu.org; > > eric.au...@redhat.c

Re: [PATCH] docs/system: Fix the information on how to run certain functional tests

Hi! On 16/03/2025 21.21, Niek Linnenbank wrote: Hi Thomas, On Tue, Mar 11, 2025 at 5:08 PM Thomas Huth > wrote: The tests have been converted to the functional framework, so we should not talk about Avocado here anymore. ... diff --git a/docs/system/arm

[PATCH 12/17] rust/vmstate: Support version field in vmstate macros

Add "version = *" in vmstate macros to help set version_id in VMStateField. Signed-off-by: Zhao Liu --- rust/qemu-api/src/vmstate.rs | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/rust/qemu-api/src/vmstate.rs b/rust/qemu-api/src/vmstate.rs index 3d4c50ca86f9..bb41bfd29

Re: [PATCH v3 2/4] hw/s390x/skeys: Introduce TYPE_DUMP_SKEYS_INTERFACE

On 10/03/2025 16.14, Philippe Mathieu-Daudé wrote: The storage keys are part of the machine memory. Introduce the TYPE_DUMP_SKEYS_INTERFACE type, allowing machine using storage keys to dump them when a DumpSKeysInterface::qmp_dump_skeys() callback is provided. Signed-off-by: Philippe Mathieu-Da

[PATCH v6 00/18] make system memory API available for common code

The main goal of this series is to be able to call any memory ld/st function from code that is *not* target dependent. As a positive side effect, we can turn related system compilation units into common code. The first 5 patches remove dependency of memory API to cpu headers and remove dependency

[PATCH v6 08/18] exec/memory-internal: remove dependency on cpu.h

Needed so compilation units including it can be common. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier --- include/exec/memory-internal.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/include/exec/memory-internal.h b/include/exec/memory-internal.h index 100c1237ac2..b729f

[PATCH v6 09/18] exec/ram_addr: remove dependency on cpu.h

Needed so compilation units including it can be common. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier --- include/exec/ram_addr.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/exec/ram_addr.h b/include/exec/ram_addr.h index e4c28fbec9b..f5d574261

[PATCH v6 14/18] system/physmem: compilation unit is now common to all targets

Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier --- system/meson.build | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/system/meson.build b/system/meson.build index eec07a94513..bd82ef132e7 100644 --- a/system/meson.build +++ b/system/meson.build @@ -3,7 +3,6 @

[PATCH v6 06/18] codebase: prepare to remove cpu.h from exec/exec-all.h

Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier --- include/tcg/tcg-op.h | 1 + target/ppc/helper_regs.h | 2 ++ hw/ppc/spapr_nested.c | 1 + hw/sh4/sh7750.c| 1 + page-vary-target.c | 2 +- target/ppc/tcg-excp_helper.c | 1 +

[PATCH v6 18/18] system/ioport: make compilation unit common

Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier --- system/ioport.c| 1 - system/meson.build | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/system/ioport.c b/system/ioport.c index 55c2a752396..89daae9d602 100644 --- a/system/ioport.c +++ b/system/ioport.

[PATCH v6 02/18] exec/tswap: implement {ld, st}.*_p as functions instead of macros

Defining functions allows to use them from common code, by not depending on TARGET_BIG_ENDIAN. Remove previous macros from exec/cpu-all.h. By moving them out of cpu-all.h, we'll be able to break dependency on cpu.h for memory related functions coming in next commits. Reviewed-by: Richard Henderson

[PATCH v6 15/18] include/exec/memory: extract devend_big_endian from devend_memop

we'll use it in system/memory.c. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier --- include/exec/memory.h | 18 -- 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/include/exec/memory.h b/include/exec/memory.h index 069021ac3ff..70177304a92 100644 -

[PATCH v6 07/18] exec/exec-all: remove dependency on cpu.h

Previous commit changed files relying transitively on it. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier --- include/exec/exec-all.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index dd5c40f2233..19b0eda44a7 100644 --- a/i

[PATCH v6 04/18] exec/memory_ldst_phys: extract memory_ldst_phys declarations from cpu-all.h

They are now accessible through exec/memory.h instead, and we make sure all variants are available for common or target dependent code. Move stl_phys_notdirty function as well. Cached endianness agnostic version rely on st/ld*_p, which is available through tswap.h. Reviewed-by: Richard Henderson

[PATCH for-10.1 3/9] target/arm: Handle AArch64 in TYPE_ARM_CPU gdb_arch_name

Instead of having the TYPE_AARCH64_CPU subclass set CPUClass::gdb_arch_name to a different function, make the TYPE_ARM_CPU implementation of the method handle AArch64. For the moment we make the "is this AArch64?" function test "is the CPU of TYPE_AARCH64_CPU?", so that this produces no behavioura

Re: [PATCH for-10.1 7/9] target/arm: Move aarch64 CPU property code to TYPE_ARM_CPU

On 17/3/25 15:28, Peter Maydell wrote: The only thing we have left in the TYPE_AARCH64_CPU class that makes it different to TYPE_ARM_CPU is that we register the handling of the "aarch64" property there. Move the handling of this property to the base class, where we make it a property of the obje

[PATCH for-10.1 1/9] core/cpu.h: gdb_arch_name string should not be freed

The documentation for the CPUClass::gdb_arch_name method claims that the returned string should be freed with g_free(). This is not correct: in commit a650683871ba728 we changed this method to instead return a simple constant string, but forgot to update the documentation. Make the documentation

Re: [PATCH for-10.1 6/9] target/arm: Present AArch64 gdbstub based on ARM_FEATURE_AARCH64

On 17/3/25 15:28, Peter Maydell wrote: Currently we provide an AArch64 gdbstub for CPUs which are TYPE_AARCH64_CPU, and an AArch32 gdbstub for those which are only TYPE_ARM_CPU. This mostly does the right thing, except in the corner case of KVM with -cpu host,aarch64=off. That produces a CPU wh

Re: [PATCH v5 11/17] exec/ram_addr: call xen_hvm_modified_memory only if xen is enabled

On 14/3/25 18:31, Pierrick Bouvier wrote: Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier --- include/exec/ram_addr.h | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/include/exec/ram_addr.h b/include/exec/ram_addr.h index f5d574261a3..92e8708af76 10

Re: [PATCH v5 15/17] include/exec/memory: move devend functions to memory-internal.h

On 14/3/25 18:31, Pierrick Bouvier wrote: Only system/physmem.c and system/memory.c use those functions, so we can move then to internal header. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier --- include/exec/memory-internal.h | 19 +++ include/exec/memory.h

Re: [PATCH v5 05/17] exec/memory.h: make devend_memop "target defines" agnostic

On 14/3/25 18:31, Pierrick Bouvier wrote: Will allow to make system/memory.c common later. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier --- include/exec/memory.h | 16 1 file changed, 4 insertions(+), 12 deletions(-) diff --git a/include/exec/memory.h b/i

Re: [PATCH for-10.1 3/9] target/arm: Handle AArch64 in TYPE_ARM_CPU gdb_arch_name

On 17/3/25 15:28, Peter Maydell wrote: Instead of having the TYPE_AARCH64_CPU subclass set CPUClass::gdb_arch_name to a different function, make the TYPE_ARM_CPU implementation of the method handle AArch64. For the moment we make the "is this AArch64?" function test "is the CPU of TYPE_AARCH64_C

Re: [PATCH 1/2] util/qemu-sockets: Add support for keep-alive flag to passive sockets

On 2025-03-14 20:24, Vladimir Sementsov-Ogievskiy wrote: > On 03.03.25 17:33, Juraj Marcin wrote: > > Commit aec21d3175 (qapi: Add InetSocketAddress member keep-alive) > > introduces the keep-alive flag, which enables the SO_KEEPALIVE socket > > option, but only on client-side sockets. However, thi

[PATCH for-10.1 6/9] target/arm: Present AArch64 gdbstub based on ARM_FEATURE_AARCH64

Currently we provide an AArch64 gdbstub for CPUs which are TYPE_AARCH64_CPU, and an AArch32 gdbstub for those which are only TYPE_ARM_CPU. This mostly does the right thing, except in the corner case of KVM with -cpu host,aarch64=off. That produces a CPU which is TYPE_AARCH64_CPU but which has ARM

[PATCH for-10.1 4/9] target/arm: Handle gdb_core_xml_file in TYPE_ARM_CPU

Instead of having the TYPE_AARCH64_CPU subclass set CPUClass:gdb_core_xml_file to a different value from that that TYPE_ARM_CPU uses, implement the gdb_get_core_xml_file method in the TYPE_ARM_CPU class to return either the AArch64 or AArch32 XML file name. Signed-off-by: Peter Maydell --- targe

[PATCH 02/17] rust/vmstate: Fix num_offset in vmstate macros

`num_offset` is a member of `VMStateField`, and there's no need to use "." to access this field in a `VMStateField` instance. Signed-off-by: Zhao Liu --- rust/qemu-api/src/vmstate.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/rust/qemu-api/src/vmstate.rs b/rust/qemu-

[PATCH 00/17] rust/vmstate: Clean up, fix, enhance & test

Hi, This series is in preparation for HPET migration support (in particular, to support varray and vmstate_validate), and it also cleans up and fixes the current vmstate! However, there is still the gap from being a ‘stable’ vmstate. Patch Summary = Patch 1-11: Clean up & fix for vm

Re: [PATCH 4/6] amd_iommu: Fix masks for Device Table Address Register

Hi Alejandro, On 3/11/2025 8:54 PM, Alejandro Jimenez wrote: > The size mask currently encompasses reserved bits [11:9]. Extract only the > corrects bits encoding size (i.e. [8:0]). > > Cc: qemu-sta...@nongnu.org > Fixes: d29a09ca6842 ("hw/i386: Introduce AMD IOMMU") > Signed-off-by: Alejandro J

Re: [PATCH v3 4/7] memory-attribute-manager: Introduce MemoryAttributeManager to manage RAMBLock with guest_memfd

On 3/17/2025 11:36 AM, David Hildenbrand wrote: On 17.03.25 03:54, Chenyi Qiang wrote: On 3/14/2025 8:11 PM, Gupta, Pankaj wrote: On 3/10/2025 9:18 AM, Chenyi Qiang wrote: As the commit 852f0048f3 ("RAMBlock: make guest_memfd require uncoordinated discard") highlighted, some subsystems like

Re: [PATCH 14/17] rust/vmstate: Add unit test for vmstate_of macro

Thanks very much for the tests! On Mon, Mar 17, 2025 at 3:52 PM Zhao Liu wrote: > -pub use crate::bindings::{VMStateDescription, VMStateField}; > -use crate::{ > -bindings::VMStateFlags, callbacks::FnCall, prelude::*, qom::Owned, > zeroable::Zeroable, > -}; > +pub use crate::bindings::{VMSta

Re: [PATCH 1/2] gdbstub: Add phys_memory_rw_debug for physical memory access

On Sat Mar 15, 2025 at 7:19 AM AEST, Richard Henderson wrote: > On 3/14/25 00:41, Nicholas Piggin wrote: >> Add an accessor for gdb physical memory access mode which sets the >> the .debug attribute for the MemTxAttribute, and also returns success >> to the caller. >> >> GDB with PhyMemMode will n

Re: [PATCH 04/17] rust/vmstate: Use ident instead of expr to parse vmsd in vmstate_struct macro

On Mon, Mar 17, 2025 at 3:52 PM Zhao Liu wrote: > > When specify an array field in vmstate_struct macro, there will be an > error: > > > local ambiguity when calling macro `vmstate_struct`: multiple parsing > > options: built-in NTs expr ('vmsd') or 1 other option. > > This is because "expr" can't

Re: [PATCH 13/17] rust/vmstate: Support vmstate_validate

On Mon, Mar 17, 2025 at 3:52 PM Zhao Liu wrote: > > In C version, VMSTATE_VALIDATE accepts the function pointer, which is > used to check if some conditions of structure could meet, although the > C version macro doesn't accept any structure as the opaque type. > > But it's hard to integrate VMSTA

Re: [PATCH 00/17] rust/vmstate: Clean up, fix, enhance & test

On Mon, Mar 17, 2025 at 3:52 PM Zhao Liu wrote: > Hi, > > This series is in preparation for HPET migration support (in particular, > to support varray and vmstate_validate), and it also cleans up and fixes > the current vmstate! However, there is still the gap from being a ‘stable’ > vmstate. Alr

[PATCH 03/17] rust/vmstate: Add a prefix separator ", " for the array field in vmstate macros

The fields are separated by ",", so it's necessary to add ", " in array field to avoid matching failure. Signed-off-by: Zhao Liu --- rust/qemu-api/src/vmstate.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/rust/qemu-api/src/vmstate.rs b/rust/qemu-api/src/vmstate.rs in

Re: [PATCH v5 00/17] make system memory API available for common code

Hi, On 14/3/25 19:39, Pierrick Bouvier wrote: On 3/14/25 11:34, Anthony PERARD wrote: On Fri, Mar 14, 2025 at 10:33:08AM -0700, Pierrick Bouvier wrote: Hi, one patch is missing review: [PATCH v5 12/17] hw/xen: add stubs for various functions. My "Acked-by" wasn't enough? Feel free try chang

Re: [PATCH v3 1/4] hw/s390x/skeys: Declare QOM types using DEFINE_TYPES() macro

On 10/03/2025 16.14, Philippe Mathieu-Daudé wrote: When multiple QOM types are registered in the same file, it is simpler to use the the DEFINE_TYPES() macro. In particular because type array declared with such macro are easier to review. Signed-off-by: Philippe Mathieu-Daudé --- hw/s390x/s39

[PATCH 06/17] rust/vmstate: Fix size field of VMStateField with VMS_ARRAY_OF_POINTER flag

The `size` field of the VMStateField with VMS_ARRAY_OF_POINTER flag should stores the size of pointer, which depends on platform. Currently, `*const`, `*mut`, `NonNull`, `Box<>` and their wrapper are supported, and they have the same size as `usize`. Store the size (of `usize`) when VMS_ARRAY_OF_

[PATCH v6 10/18] system/kvm: make kvm_flush_coalesced_mmio_buffer() accessible for common code

This function is used by system/physmem.c will be turn into common code in next commit. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier --- include/system/kvm.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/system/kvm.h b/include/system/kvm.h i

[PATCH v6 01/18] exec/tswap: target code can use TARGET_BIG_ENDIAN instead of target_words_bigendian()

Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier --- include/exec/tswap.h | 11 ++- cpu-target.c | 1 + 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/include/exec/tswap.h b/include/exec/tswap.h index ecd4faef015..2683da0adb7 100644 --- a/include/ex

[PATCH v6 17/18] system/memory: make compilation unit common

Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier --- system/memory.c| 17 + system/meson.build | 2 +- 2 files changed, 6 insertions(+), 13 deletions(-) diff --git a/system/memory.c b/system/memory.c index 4c829793a0a..eddd21a6cdb 100644 --- a/system/memory.c

Re: [PATCH] rust: pl011: Cut down amount of text quoted from PL011 TRM

On Mon, Mar 17, 2025 at 05:32:39PM +, Peter Maydell wrote: > Currently the comments in the Rust pl011 register.rs file include > large amounts of text from the PL011 TRM. This is much more > commentary than we typically quote from a device reference manual, > and much of it is not relevant to

RE: [PATCH 07/39] target/hexagon: Implement wait helper

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:28 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

Re: [RFC PATCH v2 03/20] hw/arm/smmuv3-accel: Add initial infrastructure for smmuv3-accel device

On Mon, Mar 17, 2025 at 07:07:52PM +0100, Eric Auger wrote: > On 3/17/25 6:54 PM, Nicolin Chen wrote: > > On Wed, Mar 12, 2025 at 04:15:10PM +0100, Eric Auger wrote: > >> On 3/11/25 3:10 PM, Shameer Kolothum wrote: > >>> Based on SMMUv3 as a parent device, add a user-creatable smmuv3-accel > >>> de

[PATCH 7/9] cxl-mailbox-utils: 0x5603 - FMAPI Get DC Region Extent Lists

From: Anisa Su FM DCD Management command 0x5603 implemented per CXL r3.2 Spec Section 7.6.7.6.4 Very similar to previously implemented command 0x4801. Signed-off-by: Anisa Su --- hw/cxl/cxl-mailbox-utils.c | 84 ++ 1 file changed, 84 insertions(+) diff --gi

RE: [PATCH 19/39] target/hexagon: Implement hexagon_tlb_fill()

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:28 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 20/39] target/hexagon: Implement siad inst

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:28 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 24/39] target/hexagon: Add exec-start-addr prop

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:29 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 25/39] target/hexagon: Add hexagon_cpu_mmu_index()

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:29 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 26/39] target/hexagon: Decode trap1, rte as COF

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:29 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 28/39] target/hexagon: Implement modify_ssr, resched, pending_interrupt

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:29 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 29/39] target/hexagon: Add pkt_ends_tb to translation

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:29 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

Re: [RFC PATCH v2 03/20] hw/arm/smmuv3-accel: Add initial infrastructure for smmuv3-accel device

On Mon, Mar 17, 2025 at 04:24:53PM -0300, Jason Gunthorpe wrote: > On Mon, Mar 17, 2025 at 12:10:19PM -0700, Nicolin Chen wrote: > > Another question: how does an emulated device work with a vSMMUv3? > > I could imagine that all the accel steps would be bypassed since > > !sdev->idev. Yet, the emul

[PATCH v6 16/18] include/exec/memory: move devend functions to memory-internal.h

Only system/physmem.c and system/memory.c use those functions, so we can move then to internal header. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier --- include/exec/memory-internal.h | 19 +++ include/exec/memory.h | 18 -- 2 files chan

[PATCH v6 13/18] system/xen: remove inline stubs

Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Pierrick Bouvier --- include/system/xen-mapcache.h | 41 --- include/system/xen.h | 21 +++--- 2 files changed, 3 insertions(+), 59 deletions(-) diff --git a/include/system/xen-mapcache.h b/i

[PATCH v6 05/18] exec/memory.h: make devend_memop "target defines" agnostic

Will allow to make system/memory.c common later. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier --- include/exec/memory.h | 16 1 file changed, 4 insertions(+), 12 deletions(-) diff --git a/include/exec/memory.h b/include/exec/memory.h index da21e9150b5..069021

[PATCH v6 12/18] hw/xen: add stubs for various functions

Those symbols are used by system/physmem.c, and are called only if xen_enabled() (which happens only if CONFIG_XEN is set and xen is available). So we can crash the stubs in case those are called, as they are linked only when CONFIG_XEN is not set. Acked-by: Richard Henderson Reviewed-by: Anthon

[PATCH v6 11/18] exec/ram_addr: call xen_hvm_modified_memory only if xen is enabled

Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier --- include/exec/ram_addr.h | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/include/exec/ram_addr.h b/include/exec/ram_addr.h index f5d574261a3..92e8708af76 100644 --- a/include/exec/ram_addr.h +++ b/inclu

RE: [PATCH 09/39] target/hexagon: Implement arch_get_system_reg()

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:28 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 15/39] target/hexagon: Implement hex_tlb_entry_get_perm()

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:28 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 14/39] target/hexagon: Add system event, cause codes

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:28 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 08/39] target/hexagon: Implement get_exe_mode()

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:28 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

Re: [RFC PATCH v2 03/20] hw/arm/smmuv3-accel: Add initial infrastructure for smmuv3-accel device

On Mon, Mar 17, 2025 at 12:10:19PM -0700, Nicolin Chen wrote: > Another question: how does an emulated device work with a vSMMUv3? > I could imagine that all the accel steps would be bypassed since > !sdev->idev. Yet, the emulated iotlb should cache its translation > so we will need to flush the io

RE: [PATCH 10/39] target/hexagon: Implement arch_{s, g}et_{thread, system}_reg()

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:28 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

RE: [PATCH 11/39] target/hexagon: Add representation to count cycles

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:28 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

[PATCH 9/9] cxl-mailbox-utils: 0x5605 - FMAPI Initiate DC Release

From: Anisa Su FM DCD Managment command 0x5605 implemented per CXL r3.2 Spec Section 7.6.7.6.6 Signed-off-by: Anisa Su --- hw/cxl/cxl-mailbox-utils.c | 94 ++ 1 file changed, 94 insertions(+) diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-util

[PATCH 2/9] cxl-mailbox-utils: 0x5600 - FMAPI Get DCD Info

From: Anisa Su FM DCD Management command 0x5600 implemented per CXL 3.2 Spec Section 7.6.7.6.1 Signed-off-by: Anisa Su --- hw/cxl/cxl-mailbox-utils.c | 67 ++ hw/cxl/i2c_mctp_cxl.c | 6 +++- 2 files changed, 72 insertions(+), 1 deletion(-) diff --git

[PATCH 5/9] cxl_events.h: move definition for dynamic_capacity_uuid and enum for DC event types

From: Anisa Su move definition for dynamic_capacity_uuid and enum for DC event types to cxl_events.h from cxl_type3.c for shared use in next patch Signed-off-by: Anisa Su --- hw/mem/cxl_type3.c | 15 --- include/hw/cxl/cxl_events.h | 15 +++ 2 files changed, 15

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