Hello!
This PR fixes the path used by swtpm to store its state and now uses a
path under /var/tmp rather than a path local to the test. We ran into
issues on Ubuntu when that path was under /mnt and therefore not
supported by the AppArmor profile of swtpm.
Stefan
The following changes since
To avoid AppArmor-related test failures when functional test are run from
somewhere under /mnt, adjust the path to swtpm's state to use an AppArmor-
supported path, such as /var/tmp, which is provided by the python function
tempfile.TemporaryDirectory().
An update to swtpm's AppArmor profile is al
On Thu, 07 Nov 2024 11:31, Paolo Bonzini wrote:
Compilation fails for me, on macos / rustc 1.80.1
error[E0369]: binary operation `==` cannot be applied to type
`&Attribute`
--> ../rust/qemu-api-macros/src/lib.rs:25:43
|
25 | if input.attrs.iter().any(|attr| attr == &expecte
On 11/7/2024 11:26 AM, David Hildenbrand wrote:
On 07.11.24 17:02, Steven Sistare wrote:
On 11/7/2024 8:23 AM, David Hildenbrand wrote:
On 06.11.24 21:12, Steven Sistare wrote:
On 11/4/2024 4:36 PM, David Hildenbrand wrote:
On 04.11.24 21:56, Steven Sistare wrote:
On 11/4/2024 3:15 PM, David
On Thu, Nov 07, 2024 at 04:57:46PM +, Daniel P. Berrangé wrote:
> On Thu, Nov 07, 2024 at 11:17:30AM -0500, Peter Xu wrote:
> > On Thu, Nov 07, 2024 at 12:33:17PM +, Daniel P. Berrangé wrote:
> > I'll comment on a few examples above, which I think some of them, even if
> > handshake is read
Hi,
Since now we allocate memory for the key, we should provide the
> `key_destroy_func` when calling g_hash_table_new_full(), otherwise
> this new memory will not be de-allocated.
>
Ack
IIUC it can be null, only if `uuid` was null since glib memory
> API usually terminates the application if me
On Thu, Nov 07, 2024 at 05:35:06PM +0530, Prasad Pandit wrote:
> On Wed, 6 Nov 2024 at 18:41, Fabiano Rosas wrote:
> > What we're thinking is having an initial exchange of information between
> > src & dst as soon as migration starts and that would sync the
> > capabilities and parameters between
The size should always be 8 so hard code that. By coincidience the
incorrect use of sizeof(char *) is 8 on 64 bit hosts, but was caught
by CI testing with i686 as the host.
Reported-by: Michael S. Tsirkin
Closes:
https://lore.kernel.org/qemu-devel/20241104110025-mutt-send-email-...@kernel.org/
S
On Thu, Nov 07, 2024 at 05:38:26PM +0100, David Hildenbrand wrote:
> > David: why do we need to drop PRIVATE in ramblock flags? I thought it was
> > pretty harmless. I suppose things like qemu_ram_is_shared() will even keep
> > working as before?
> >
> > It looks ok to remove it too, but it adds
On 11/6/24 18:46, Philippe Mathieu-Daudé wrote:
These devices are only used by the SPARC targets, which are
only built as big-endian. Therefore the DEVICE_NATIVE_ENDIAN
definition expand to DEVICE_BIG_ENDIAN (besides, the
DEVICE_LITTLE_ENDIAN case isn't tested). Simplify directly
using DEVICE_BIG
On 11/7/2024 11:19 AM, David Hildenbrand wrote:
On 07.11.24 15:04, Steven Sistare wrote:
On 11/7/2024 8:05 AM, David Hildenbrand wrote:
[...]
Do you plan to submit the part of your "tmp" patch that refactors
shm_backend_memory_alloc and defines qemu_shm_alloc? If you want,
I could include it
On Thu, Nov 07, 2024 at 09:04:02AM -0500, Steven Sistare wrote:
> On 11/7/2024 8:05 AM, David Hildenbrand wrote:
> > On 06.11.24 21:59, Steven Sistare wrote:
> > > On 11/6/2024 3:41 PM, Peter Xu wrote:
> > > > On Wed, Nov 06, 2024 at 03:12:20PM -0500, Steven Sistare wrote:
> > > > > On 11/4/2024 4:
On Thu, Nov 07, 2024 at 01:52:01PM +0100, Dorinda Bassey wrote:
In `virtio_add_resource` function, the UUID used as a key for
`g_hash_table_insert` was temporary, which could lead to
invalid lookups when accessed later. This patch ensures that
the UUID remains valid by duplicating it into a newly
On Wed, 6 Nov 2024 at 18:08, Paolo Bonzini wrote:
>
> The following changes since commit 11b8920ed2093848f79f93d106afe8a69a61a523:
>
> Merge tag 'pull-request-2024-11-04' of https://gitlab.com/thuth/qemu into
> staging (2024-11-04 17:37:59 +)
>
> are available in the Git repository at:
>
>
On Wed, 6 Nov 2024 at 18:41, Fabiano Rosas wrote:
> What we're thinking is having an initial exchange of information between
> src & dst as soon as migration starts and that would sync the
> capabilities and parameters between both sides. Which would then be
> followed by a channel establishment p
In `virtio_add_resource` function, the UUID used as a key for
`g_hash_table_insert` was temporary, which could lead to
invalid lookups when accessed later. This patch ensures that
the UUID remains valid by duplicating it into a newly allocated
memory space. The value is then inserted into the hash
On 06.11.24 21:59, Steven Sistare wrote:
On 11/6/2024 3:41 PM, Peter Xu wrote:
On Wed, Nov 06, 2024 at 03:12:20PM -0500, Steven Sistare wrote:
On 11/4/2024 4:36 PM, David Hildenbrand wrote:
On 04.11.24 21:56, Steven Sistare wrote:
On 11/4/2024 3:15 PM, David Hildenbrand wrote:
On 04.11.24 20
This patchset aims to fix some clang undefined-behavior
sanitizer warnings that you see if you run the arm
functional-tests:
Stopping network: ../../net/checksum.c:106:9: runtime error: member
access within misaligned address 0x556aad9b502e for type 'struct ip_header',
which requires 4
> Compilation fails for me, on macos / rustc 1.80.1
>
> error[E0369]: binary operation `==` cannot be applied to type
> `&Attribute`
> --> ../rust/qemu-api-macros/src/lib.rs:25:43
> |
> 25 | if input.attrs.iter().any(|attr| attr == &expected) {
> |
On Wed, 6 Nov 2024 12:27:07 +
Jonathan Cameron wrote:
> On Mon, 4 Nov 2024 11:00:59 -0500
> "Michael S. Tsirkin" wrote:
>
> > On Mon, Sep 16, 2024 at 06:44:49PM +0100, Jonathan Cameron wrote:
> > > Add a test with 6 nodes to exercise most interesting corner cases of SRAT
> > > and HMAT ge
在 2024/10/28 下午8:57, Bibo Mao 写道:
If cpu hotplug is enabled, all possible_cpus is initialized with
arch_id set. For ipi interrupt controller, cpu is searched from
possible_cpus with specified arch_id. However it is possible that
cpu object is not created for offlined cpu.
Here safer check is add
On 07.11.24 17:32, Peter Xu wrote:
On Thu, Nov 07, 2024 at 09:04:02AM -0500, Steven Sistare wrote:
On 11/7/2024 8:05 AM, David Hildenbrand wrote:
On 06.11.24 21:59, Steven Sistare wrote:
On 11/6/2024 3:41 PM, Peter Xu wrote:
On Wed, Nov 06, 2024 at 03:12:20PM -0500, Steven Sistare wrote:
On
On 07.11.24 17:02, Steven Sistare wrote:
On 11/7/2024 8:23 AM, David Hildenbrand wrote:
On 06.11.24 21:12, Steven Sistare wrote:
On 11/4/2024 4:36 PM, David Hildenbrand wrote:
On 04.11.24 21:56, Steven Sistare wrote:
On 11/4/2024 3:15 PM, David Hildenbrand wrote:
On 04.11.24 20:51, David Hil
On Thu, Nov 07, 2024 at 05:09:28PM +0400, Marc-André Lureau wrote:
> Hi Michael, Alex,
>
> Any of you could take this in the next virtio-related PR?
>
> thanks
Sorry, we are past soft freeze. So not unless this is a bugfix.
Hi Igor,
Many thanks for taking time to reply.
> From: qemu-arm-bounces+salil.mehta=huawei@nongnu.org arm-bounces+salil.mehta=huawei@nongnu.org> On Behalf Of Igor
> Mammedov
> Sent: Thursday, November 7, 2024 4:57 PM
> To: Salil Mehta
>
> On Wed, 6 Nov 2024 19:05:15 +
> Sal
Hello!
This PR fixes the path used by swtpm to store its state and now uses a
path under /var/tmp rather than a path local to the test. We ran into
issues on Ubuntu when that path was under /mnt and therefore not
supported by the AppArmor profile of swtpm.
Stefan
The following changes since
On Thu, 31 Oct 2024 at 06:55, Bibo Mao wrote:
>
> With generic cpu reset interface, pc register is entry of FLASH for
> UEFI BIOS. However with direct kernel booting requirement, there is
> little different, pc register of primary cpu is entry address of ELF
> file.
>
> At the same time with requi
Hi Eric,
On Thu, Nov 07, 2024 at 12:11:05PM +0100, Eric Auger wrote:
> On 11/1/24 05:09, Nicolin Chen wrote:
> > Hi,
> >
> > This is a continued discussion following previous month's:
> > https://lore.kernel.org/qemu-devel/Zvr%2Fbf7KgLN1cjOl@Asurada-Nvidia/
> >
> > Kernel changes are getting close
On 11/4/24 12:40, Dongli Zhang wrote:
QEMU uses the kvm_get_msrs() function to save Intel PMU registers from KVM
and kvm_put_msrs() to restore them to KVM. However, there is no support for
AMD PMU registers. Currently, has_pmu_version and num_pmu_gp_counters are
initialized based on cpuid(0xa)
On 11/7/24 3:31 PM, Nicolin Chen wrote:
Hi Eric,
On Thu, Nov 07, 2024 at 12:11:05PM +0100, Eric Auger wrote:
On 11/1/24 05:09, Nicolin Chen wrote:
Hi,
This is a continued discussion following previous month's:
https://lore.kernel.org/qemu-devel/Zvr%2Fbf7KgLN1cjOl@Asurada-Nvidia/
Kernel ch
Am 5. November 2024 17:18:13 UTC schrieb Peter Maydell
:
>The 'isapc' machine type has no PCI bus, but pc_nic_init() still
>calls pci_init_nic_devices() passing it a NULL bus pointer. This
>causes the clang sanitizer to complain:
>
>$ ./build/clang/qemu-system-i386 -M isapc
>../../hw/pci/pci.c
Am 7. November 2024 09:04:16 UTC schrieb Zhao Liu :
>+Philippe for ISAPC
>
>On Thu, Nov 07, 2024 at 10:04:10AM +0300, Dmitry Frolov wrote:
>> Date: Thu, 7 Nov 2024 10:04:10 +0300
>> From: Dmitry Frolov
>> Subject: [PATCH] hw/i386: fix NULL-dereference
>>
>> If pcmc->pci_enabled is false, pcms
Am 7. November 2024 09:19:05 UTC schrieb Bernhard Beschow :
>
>
>Am 7. November 2024 07:04:10 UTC schrieb Dmitry Frolov :
>>If pcmc->pci_enabled is false, pcms->pcibus is NULL and is passed
>>to pc_nic_init() where it is being dereferenced.
>>
>>Found making check with enabled sanitizers.
>>
>>S
This patch series bundles the GPIO sensors previously sent for review:
https://lore.kernel.org/all/20230206194936.168843-1-tit...@google.com
and the GSZ board commit sent here:
https://lore.kernel.org/all/20241007171700.1594342-1-tit...@google.com/
The Quanta GSZ a current Google machine of the d
The PCA6416 is an i2c device with 16 GPIO pins, the PCA9538 has 8 pins.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Hao Wu
Signed-off-by: Titus Rwantare
---
hw/gpio/Kconfig | 5 +
hw/gpio/meson.build | 1 +
hw/gpio/pca_i2c_gpio.c | 391
Makes it more explicit that 16 bit values are being used
Signed-off-by: Titus Rwantare
---
include/qemu/bitops.h | 26 ++
1 file changed, 26 insertions(+)
diff --git a/include/qemu/bitops.h b/include/qemu/bitops.h
index 2c0a2fe751..05179e3ded 100644
--- a/include/qemu/bi
This patch adds the quanta-gsz-bmc target, a current Google machine of
the day. This machine will be used as a platform to enable features such
as the PECI bmc interface, and Intel eSPI virtual wire interface in
QEMU.
Signed-off-by: Titus Rwantare
---
hw/arm/npcm7xx_boards.c | 160 ++
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Titus Rwantare
---
hw/i2c/core.c | 8 +---
hw/i2c/trace-events | 2 +-
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/hw/i2c/core.c b/hw/i2c/core.c
index 4cf30b2c86..d238311776 100644
--- a/hw/i2c/core.c
+++ b/hw/i2c/co
This device has the same register layout as the pca9538, but 4 fewer
gpio pins. This commit lowers the number of pins initialised, and reuses
the pca9538 logic.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Hao Wu
Signed-off-by: Titus Rwantare
---
hw/gpio/pca_i2c_gpio.c | 18 +++
Signed-off-by: Titus Rwantare
---
hw/arm/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 1b25e73578..30480dad7b 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -465,6 +465,7 @@ config NPCM7XX
bool
default y
depends on TCG && ARM
On 11/6/24 6:10 AM, Thomas Huth wrote:
On 05/11/2024 17.42, Jared Rossi wrote:
Hi Thomas, Sebastian,
It looks like this is simply caused by the "is_cdrom" value only ever
being set
to true. I think it is a one-line fix that just makes sure to
initialize the
value to false each time we tr
ilable in the Git repository at:
>
> https://github.com/alistair23/qemu.git tags/pull-riscv-to-apply-20241107
>
> for you to fetch changes up to 27652f9ca9d831c67dd447346c6ee953669255f0:
>
> tests/functional: Convert the RV32
On Thu, 7 Nov 2024 at 16:32, Peter Maydell wrote:
>
> In virtio-net.c we assume that the IP length field in the packet is
> aligned, and we copy its address into a uint16_t* in the
> VirtioNetRscUnit struct which we then dereference later. This isn't
> a safe assumption; it will also result in co
On Tue, 7 Jun 2022 at 00:31, Richard Henderson
wrote:
>
> From: Xiaojuan Yang
>
> This includes:
> - TLBSRCH
> - TLBRD
> - TLBWR
> - TLBFILL
> - TLBCLR
> - TLBFLUSH
> - INVTLB
Hi; running the loongarch functional tests on a build with
the clang undefined-behaviour sanitizer enabled reveals an
at
On 08/10/2024 12.54, David Hildenbrand wrote:
With memory devices, we will have storage attributes for memory that
exceeds the initial ram size. Further, we can easily have memory holes,
for which there (currently) are no storage attributes.
In particular, with memory holes, KVM_S390_SET_CMMA_BI
On Thu, Nov 07, 2024 at 05:02:47PM +0530, Prasad Pandit wrote:
From: Prasad Pandit
While starting a vhost device, updating iotlb entries
via 'vhost_device_iotlb_miss' may return an error.
qemu-kvm: vhost_device_iotlb_miss:
700871,700871: Fail to update device iotlb
Fail device start when
Daniel P. Berrangé writes:
> On Thu, Nov 07, 2024 at 01:36:49PM +0100, Markus Armbruster wrote:
>> Daniel P. Berrangé writes:
[...]
>> > TL;DR: I think you can re-add the documentation comments to
>> > the Golang code generator, declare the resulting code as being
>> > "MIT-0 AND GPL-2.0-or-la
On 07.11.24 15:04, Steven Sistare wrote:
On 11/7/2024 8:05 AM, David Hildenbrand wrote:
On 06.11.24 21:59, Steven Sistare wrote:
On 11/6/2024 3:41 PM, Peter Xu wrote:
On Wed, Nov 06, 2024 at 03:12:20PM -0500, Steven Sistare wrote:
On 11/4/2024 4:36 PM, David Hildenbrand wrote:
On 04.11.24 21
The ip_header is not actually guaranteed to be aligned. We attempt to
deal with this in some places such as net_checksum_calculate() by
using stw_be_p and so on to access the fields, but this is not
sufficient to be correct, because even accessing a byte member
within an unaligned struct is undefin
On Thu, Nov 07, 2024 at 05:56:50PM +0800, yong.hu...@smartx.com wrote:
> From: Hyman Huang
>
> The first iteration's RAMBlock dirty sync can be omitted because QEMU
> always initializes the RAMBlock's bmap to all 1s by default.
>
> Signed-off-by: Hyman Huang
> ---
> migration/cpu-throttle.c |
In virtio-net.c we assume that the IP length field in the packet is
aligned, and we copy its address into a uint16_t* in the
VirtioNetRscUnit struct which we then dereference later. This isn't
a safe assumption; it will also result in compilation failures if we
mark the ip_header struct as QEMU_PA
On Wed, 6 Nov 2024 19:05:15 +
Salil Mehta wrote:
> Hi Igor,
>
> Thanks for replying back and the reviews. Please find my replies
> inline.
>
> > From: Igor Mammedov
> > Sent: Wednesday, November 6, 2024 4:08 PM
> > To: Salil Mehta
> >
> > On Wed, 6 Nov 2024 14:45:42 +
> > Salil
On Thu, Nov 07, 2024 at 11:17:30AM -0500, Peter Xu wrote:
> On Thu, Nov 07, 2024 at 12:33:17PM +, Daniel P. Berrangé wrote:
> I'll comment on a few examples above, which I think some of them, even if
> handshake is ready, may still need mgmt layers to involve..
>
> Multifd and postcopy are the
On Wed, Nov 6, 2024 at 4:57 AM Kevin Wolf wrote:
> Am 01.11.2024 um 18:36 hat John Snow geschrieben:
> > Various python tests in the "check-python-tox" test case on GitLab have
> > begun failing due to newer package versions. This patch set corrects
> > those issues and also improves the reliabil
On 11/4/24 9:48 AM, Richard Henderson wrote:
On 10/30/24 15:25, Paolo Savini wrote:
Thanks for the review Richard.
On 10/30/24 11:40, Richard Henderson wrote:
On 10/29/24 19:43, Paolo Savini wrote:
This patch optimizes the emulation of unit-stride load/store RVV instructions
when the data
On 11/7/24 3:31 AM, Jim Shu wrote:
Add a new struct RISCVBootInfo to sync boot information between multiple
boot functions.
Signed-off-by: Jim Shu
---
hw/riscv/boot.c| 66 ++
hw/riscv/microchip_pfsoc.c | 11 ++---
hw/riscv/opentitan
Hi Zhao,
On 11/6/24 11:52 PM, Zhao Liu wrote:
> (+Dapang & Zide)
>
> Hi Dongli,
>
> On Mon, Nov 04, 2024 at 01:40:17AM -0800, Dongli Zhang wrote:
>> Date: Mon, 4 Nov 2024 01:40:17 -0800
>> From: Dongli Zhang
>> Subject: [PATCH 2/7] target/i386/kvm: introduce 'pmu-cap-disabled' to set
>> KVM_
On 11/6/24 17:26, Peter Maydell wrote:
On Wed, 6 Nov 2024 at 17:21, Pierrick Bouvier
wrote:
I noticed by --enable-debug in configure is a combination of enabling
checks (enable-debug-tcg + graph + mutex), and deactivating optimizations.
Would it be worth keeping the optimizations and runtime c
From: Hyman Huang
The first iteration's RAMBlock dirty sync can be omitted because QEMU
always initializes the RAMBlock's bmap to all 1s by default.
Signed-off-by: Hyman Huang
---
migration/cpu-throttle.c | 2 +-
migration/ram.c | 19 ---
2 files changed, 17 insertion
On 11/6/24 18:46, Philippe Mathieu-Daudé wrote:
These devices are only used by the M68K target, which is only
built as big-endian. Therefore the DEVICE_NATIVE_ENDIAN
definition expand to DEVICE_BIG_ENDIAN (besides, the
DEVICE_LITTLE_ENDIAN case isn't tested). Simplify directly
using DEVICE_BIG_EN
On 11/6/24 18:46, Philippe Mathieu-Daudé wrote:
These devices are only used by the X86 targets, which are only
built as little-endian. Therefore the DEVICE_NATIVE_ENDIAN
definition expand to DEVICE_LITTLE_ENDIAN (besides, the
DEVICE_BIG_ENDIAN case isn't tested). Simplify directly using
DEVICE_LI
On 11/6/24 18:46, Philippe Mathieu-Daudé wrote:
These devices are only used by the OpenRISC target, which is
only built as big-endian. Therefore the DEVICE_NATIVE_ENDIAN
definition expand to DEVICE_BIG_ENDIAN (besides, the
DEVICE_LITTLE_ENDIAN case isn't tested). Simplify directly
using DEVICE_BI
On 11/7/24 01:22, Philippe Mathieu-Daudé wrote:
Pass vCPU endianness as argument so we can load kernels
with different endianness (different from the qemu-system-binary
builtin one).
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Anton Johansson
Reviewed-by: Alistair Francis
Reviewed-by: Edg
On 11/6/24 18:46, Philippe Mathieu-Daudé wrote:
These devices are only used by the TriCore target, which is
only built as little-endian. Therefore the DEVICE_NATIVE_ENDIAN
definition expand to DEVICE_LITTLE_ENDIAN (besides, the
DEVICE_BIG_ENDIAN case isn't tested). Simplify directly using
DEVICE_
rc = snprintf(device_path, sizeof(device_path), "%s%s%s",
+ USERMODEDEVICEDIR, device_guid, TAPSUFFIX);
+if (rc >= sizeof(device_path)) {
+return -1;
+}
handle = CreateFile (
device_path,
---
base-commit: 7e3b6d8063f245d27eecce5a
From: William Roche
Hi David,
Here is an updated description of the patch set:
---
This set of patches fixes several problems with hardware memory errors
impacting hugetlbfs memory backed VMs. When using hugetlbfs large
pages, any large page location being impacted by an HW memory error
results
From: David Hildenbrand
Notify registered listeners about the remap at the end of
qemu_ram_remap() so e.g., a memory backend can re-apply its
settings correctly.
Signed-off-by: David Hildenbrand
Signed-off-by: William Roche
---
hw/core/numa.c | 11 +++
include/exec/ramlist.h |
sscanf return values are checked and add 'Null' check for
mandatory parameters. And merged redundant route and
networkroute variables.
Signed-off-by: Dehan Meng
Reviewed-by: Daniel P. Berrangé
Reviewed-by: Konstantin Kostiuk
Signed-off-by: Konstantin Kostiuk
---
qga/commands-linux.c | 83
It's now only freed at the end of the function.
Signed-off-by: Dehan Meng
Reviewed-by: Daniel P. Berrangé
Reviewed-by: Konstantin Kostiuk
Signed-off-by: Konstantin Kostiuk
---
qga/commands-linux.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/qga/commands-linux.c b/qga
From: William Roche
When an entire large page is impacted by an error (hugetlbfs case),
report better the size and location of this large memory hole, so
give a warning message when this page is first hit:
Memory error: Loosing a large page (size: X) at QEMU addr Y and GUEST addr Z
Signed-off-by
From: William Roche
Merging and dump settings are handled by the remap notification
in addition to memory policy and preallocation.
If preallocation is set on a memory block, qemu_prealloc_mem()
call is needed also after a ram_block_discard_range() use for
this block.
Signed-off-by: William Roch
Variable declarations moved to the beginning of blocks
Followed the coding style of using snake_case for variable names.
Proper initialization of param 'size_t n' to '0' for
Signed-off-by: Dehan Meng
Reviewed-by: Daniel P. Berrangé
Reviewed-by: Konstantin Kostiuk
Signed-off-by: Konstantin Kosti
From: David Hildenbrand
Let's register a RAM block notifier and react on remap notifications.
Simply re-apply the settings. Warn only when something goes wrong.
Note: qemu_ram_remap() will not remap when RAM_PREALLOC is set. Could be
that hostmem is still missing to update that flag ...
Signed-
From: William Roche
We take into account the recorded page sizes to repair the
memory locations, calling ram_block_discard_range() to punch a hole
in the backend file when necessary and regenerate a usable memory.
Fall back to unmap/remap the memory location(s) if the kernel doesn't
support the m
From: David Hildenbrand
We want to reuse the functionality when remapping or resizing RAM.
Signed-off-by: David Hildenbrand
Signed-off-by: William Roche
---
backends/hostmem.c | 155 -
1 file changed, 82 insertions(+), 73 deletions(-)
diff --git a/
v6:
Fix compilation errors
v5:
Summarize and merge commits
v4:
Handle g_autoptr() to simplify code and memory leak
v3:
Modify commits message and do some minor update.
v2:
Split v1 up to separate commits for each logically independent change
Konstantin Kostiuk (3):
qemu-ga: Add 'Null' check
On Wed, 06 Nov 2024 22:56, Philippe Mathieu-Daudé wrote:
On 6/11/24 18:51, Paolo Bonzini wrote:
The offset that is compared against 0x3f8..0x400 is not shifted right.
Adjust the pattern matching.
Cc: Pierrick Bouvier
Cc: Manos Pitsidianakis
Signed-off-by: Paolo Bonzini
---
rust/hw/char/pl
On 06.11.24 21:12, Steven Sistare wrote:
On 11/4/2024 4:36 PM, David Hildenbrand wrote:
On 04.11.24 21:56, Steven Sistare wrote:
On 11/4/2024 3:15 PM, David Hildenbrand wrote:
On 04.11.24 20:51, David Hildenbrand wrote:
On 04.11.24 18:38, Steven Sistare wrote:
On 11/4/2024 5:39 AM, David H
On Thu, Nov 7, 2024 at 1:52 PM Dorinda Bassey wrote:
>
> In `virtio_add_resource` function, the UUID used as a key for
> `g_hash_table_insert` was temporary, which could lead to
> invalid lookups when accessed later. This patch ensures that
> the UUID remains valid by duplicating it into a newly a
On 11/6/2024 4:21 PM, Peter Xu wrote:
On Wed, Nov 06, 2024 at 03:59:23PM -0500, Steven Sistare wrote:
On 11/6/2024 3:41 PM, Peter Xu wrote:
On Wed, Nov 06, 2024 at 03:12:20PM -0500, Steven Sistare wrote:
On 11/4/2024 4:36 PM, David Hildenbrand wrote:
On 04.11.24 21:56, Steven Sistare wrote:
On 11/7/2024 8:05 AM, David Hildenbrand wrote:
On 06.11.24 21:59, Steven Sistare wrote:
On 11/6/2024 3:41 PM, Peter Xu wrote:
On Wed, Nov 06, 2024 at 03:12:20PM -0500, Steven Sistare wrote:
On 11/4/2024 4:36 PM, David Hildenbrand wrote:
On 04.11.24 21:56, Steven Sistare wrote:
On 11/4/2024 3
Peter Xu writes:
> On Fri, Oct 25, 2024 at 05:55:59PM -0400, Peter Xu wrote:
>> On Fri, Oct 25, 2024 at 11:25:23AM +0200, Markus Armbruster wrote:
>> > Peter Xu writes:
>> >
>> > > X86 IOMMUs cannot be created more than one on a system yet. Make it a
>> > > singleton so it guards the system fr
On Fri, 1 Nov 2024 at 13:43, Jonathan Cameron via wrote:
>
> In cmd_features_set_feature() the an offset + data size schemed
> is used to allow for large features. Ensure this does not write
> beyond the end fo the buffers used to accumulate the full feature
> attribute set.
>
> Reported-by: Esif
Hi Nicolin,
On 11/1/24 05:09, Nicolin Chen wrote:
> Hi,
>
> This is a continued discussion following previous month's:
> https://lore.kernel.org/qemu-devel/Zvr%2Fbf7KgLN1cjOl@Asurada-Nvidia/
>
> Kernel changes are getting closer to merge, as Jason's planning to
> take vIOMMU series and smmuv3_nest
On Thu, 7 Nov 2024 at 11:58, Stefan Berger wrote:
>
>
>
> On 11/7/24 6:09 AM, Peter Maydell wrote:
> > On Wed, 6 Nov 2024 at 18:08, Stefan Berger
> > wrote:
> >>
> >> From: Stefan Berger
> >>
> >> To avoid AppArmor-related test failures when functional test are run from
> >> somewhere under /mn
On 11/7/2024 8:23 AM, David Hildenbrand wrote:
On 06.11.24 21:12, Steven Sistare wrote:
On 11/4/2024 4:36 PM, David Hildenbrand wrote:
On 04.11.24 21:56, Steven Sistare wrote:
On 11/4/2024 3:15 PM, David Hildenbrand wrote:
On 04.11.24 20:51, David Hildenbrand wrote:
On 04.11.24 18:38, Steven
On Thu, Nov 07, 2024 at 12:12:10PM +0100, Markus Armbruster wrote:
> Peter Xu writes:
>
> > On Fri, Oct 25, 2024 at 05:55:59PM -0400, Peter Xu wrote:
> >> On Fri, Oct 25, 2024 at 11:25:23AM +0200, Markus Armbruster wrote:
> >> > Peter Xu writes:
> >> >
> >> > > X86 IOMMUs cannot be created more
On 11/7/24 01:22, Philippe Mathieu-Daudé wrote:
Replace the DEVICE_NATIVE_ENDIAN MemoryRegionOps by a pair
of DEVICE_LITTLE_ENDIAN / DEVICE_BIG_ENDIAN.
Add the "little-endian" property to select the device
endianness, defaulting to little endian.
Set the proper endianness on the single machine us
On 11/7/24 01:22, Philippe Mathieu-Daudé wrote:
Replace the DEVICE_NATIVE_ENDIAN MemoryRegionOps by a pair
of DEVICE_LITTLE_ENDIAN / DEVICE_BIG_ENDIAN.
Add the "little-endian" property to select the device
endianness, defaulting to little endian.
Set the proper endianness on the single machine us
On Wed, 6 Nov 2024 at 18:08, Stefan Berger wrote:
>
> From: Stefan Berger
>
> To avoid AppArmor-related test failures when functional test are run from
> somewhere under /mnt, adjust the path to swtpm's state to use an AppArmor-
> supported path, such as /var/tmp, which is provided by the python
On Mon, 4 Nov 2024 at 22:18, Helge Deller wrote:
>
> Add the CPU reset method, which resets all CPU registers and the TLB to
> zero. Then the CPU will switch to 32-bit mode (PSW_W bit is not set) and
> start execution at address 0xf004.
> Although we currently want to zero out all values in th
Avoid looking for Rust dependencies via cmake.
Signed-off-by: Paolo Bonzini
---
rust/qemu-api-macros/meson.build | 4
1 file changed, 4 insertions(+)
diff --git a/rust/qemu-api-macros/meson.build b/rust/qemu-api-macros/meson.build
index 24325dea5c2..6f94a4bb3c2 100644
--- a/rust/qemu-api-m
On 11/6/24 21:30, Noah Goldstein wrote:
On Wed, Nov 6, 2024 at 3:10 PM Richard Henderson
wrote:
On 11/6/24 18:13, Noah Goldstein wrote:
Question about impl regarding handling of `-execfd` with/without a program name.
1) `-execfd` + program name ie: `qemu -execfd ls -a`.
2) `-execfd` without
= snprintf(device_path, sizeof(device_path), "%s%s%s",
> + USERMODEDEVICEDIR, device_guid, TAPSUFFIX);
> +if (rc >= sizeof(device_path)) {
> +return -1;
> +}
>
> handle = CreateFile (
> device_path,
>
> ---
> base-commit: 7e3b
On Mon, 04 Nov 2024 17:27, Paolo Bonzini wrote:
From: Junjie Mao
offset_of! was stabilized in Rust 1.77.0. Use an alternative implemenation
that was found on the Rust forums, and whose author agreed to license as
MIT for use in QEMU.
The alternative allows only one level of field access, but
From: Prasad Pandit
While starting a vhost device, updating iotlb entries
via 'vhost_device_iotlb_miss' may return an error.
qemu-kvm: vhost_device_iotlb_miss:
700871,700871: Fail to update device iotlb
Fail device start when such an error occurs.
Signed-off-by: Prasad Pandit
---
hw/vi
On Tue, 5 Nov 2024 18:43:46 +0800
"Yuquan Wang" wrote:
> This creates a default pxb-cxl (bus_nr=0xc0) bridge with two
> cxl root ports on sbsa-ref. And the memory layout places 64K
> space for the cxl host bridge register regions(CHBCR) in the
> sbsa-ref memmap.
>
> In addition, this support in
在 2024/9/20 下午5:04, Bibo Mao 写道:
In order to support irqchip_in_kenrel method, split loongarch extioi
emulation driver into two parts, extioi common and extioi TCG driver.
LoongArch extioi common driver includes vmstate and property interface,
also vmstate load and store interface is defined in e
On Thu, Nov 07, 2024 at 02:42:56PM +0300, ger...@altlinux.org wrote:
> From: Denis Rastyogin
Hi, Denis,
Thanks for the patch, there's an identical patch already on the list to fix
it:
https://lore.kernel.org/r/20241105182725.2393425-1-pet...@redhat.com
>
> In this merge, the migration_is_idle
Daniel P. Berrangé writes:
> On Mon, Nov 04, 2024 at 09:09:40AM +0100, Markus Armbruster wrote:
>> Daniel P. Berrangé writes:
>>
>> > The 'loaded' property on TLS creds and secret objects was marked as
>> > deprected in 6.0.0 and then marked as removed in 7.1.0.
>>
>> deprecated
>>
>> Regardi
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