Re: [PATCH-for-9.1 0/5] hw/sd: SDcard & SDHCI fixes

On 30/7/24 11:21, Philippe Mathieu-Daudé wrote: 3 fixes (2 fuzzed). Philippe Mathieu-Daudé (5): hw/sd/sdcard: Explicit dummy byte value hw/sd/sdcard: Do not abort when reading DAT lines on invalid cmd state hw/sd/sdhci: Reset @data_count index on invalid ADMA transfers Patches #1-3 qu

Re: [PATCH 2/3] system/vl.c: Expand OpenGL related errors

On 31/7/24 17:41, Peter Maydell wrote: Expand the OpenGL related error messages we produce for various "OpenGL not present/not supported" cases, to hopefully guide the user towards how to fix things. Now if the user tries to enable GL on a backend that doesn't support it the error message is a b

Re: [PULL 00/13] Block layer patches

On 8/6/24 07:08, Kevin Wolf wrote: The following changes since commit f9851d2ffef59b3a7f39513469263ab3b019480f: Merge tag 'migration-20240802-pull-request' ofhttps://gitlab.com/farosas/qemu into staging (2024-08-03 07:26:26 +1000) are available in the Git repository at: https://repo.or.

Re: [PATCH 1/2] include: bitops: Add mask extract64/deposit64

On 8/5/24 14:33, Alistair Francis wrote: Based on the RISC-V get_field() and set_field() macros add mask_extract64() and mask_deposit64() bitop functions. These can extrac and deposit values into fields using a bit field mask directly instead of a length and shift. Signed-off-by: Alistair Franci

Re: [PATCH 1/3] hw/display/virtio-gpu: Improve "opengl is not available" error message

On 31/7/24 17:41, Peter Maydell wrote: If the user tries to use the virtio-gpu-gl device but the display backend doesn't have OpenGL support enabled, we currently print a rather uninformative error message: $ qemu-system-aarch64 -M virt -device virtio-gpu-gl qemu-system-aarch64: -device virtio-g

Re: [PATCH v2 4/4] virtio-net: Add support for USO features

On 2024/08/05 19:08, Michael S. Tsirkin wrote: On Mon, Aug 05, 2024 at 06:37:58PM +0900, Akihiko Odaki wrote: If cross-migrate=off, QEMU can still migrate on the same host (checkpoint and restart). QEMU can also migrate across hosts if the user ensures they are on the same platform. What is so

Re: [PATCH 3/3] ui/console: Note in '-display help' that some backends support suboptions

On 31/7/24 17:41, Peter Maydell wrote: Currently '-display help' only prints the available backends. Some of those backends support suboptions (e.g. '-display gtk,gl=on'). Mention that in the help output, and point the user to where they might be able to find more information about the suboptions

Re: [PATCH-for-9.1 v5 0/2] hw/pci-host/gt64120: Set PCI base address register write mask

On 2/8/24 23:31, Philippe Mathieu-Daudé wrote: Philippe Mathieu-Daudé (2): hw/pci-host/gt64120: Set PCI base address register write mask hw/pci-host/gt64120: Reset config registers during RESET phase Series queued.

Re: [PATCH 2/2] docs/specs/pci-ids: Fix markup

On 5/8/24 05:10, George Matsumura via wrote: This fixes the markup of the PCI and PCIe Expander Bridge entries to be consistent with the rest of the file. Signed-off-by: George Matsumura --- docs/specs/pci-ids.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) Reviewed-by: Phili

Re: [PATCH 1/2] docs/specs/pci-ids: Add missing devices

On 5/8/24 05:10, George Matsumura via wrote: Add the missing devices 1b36:000c (PCIe root port) and 1b36:000e (PCIe-to-PCI bridge). Signed-off-by: George Matsumura --- docs/specs/pci-ids.rst | 4 1 file changed, 4 insertions(+) Reviewed-by: Philippe Mathieu-Daudé

[PULL v2 00/13] Block layer patches

The following changes since commit e7207a9971dd41618b407030902b0b2256deb664: Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging (2024-08-06 08:02:34 +1000) are available in the Git repository at: https://repo.or.cz/qemu/kevin.git tags/for-upstream for you to fetch cha

Re: [PATCH 0/7] block: Miscellaneous minor Coverity fixes

On 31/7/24 16:36, Peter Maydell wrote: hw/block/pflash_cfi01: Don't decrement pfl->counter below 0 hw/ide/atapi: Be explicit that assigning to s->lcyl truncates hw/block/fdc-isa: Assert that isa_fdc_get_drive_max_chs() found something Patches 3-5 queued, thanks.

Re: [PATCH-for-9.1 v6 00/15] Reconstruct loongson ipi driver

On 5/8/24 20:06, Philippe Mathieu-Daudé wrote: Bibo Mao (14): hw/intc/loongson_ipi: Rename LoongsonIPI -> LoongsonIPIState hw/intc/loongson_ipi: Extract loongson_ipi_common_realize() hw/intc/loongson_ipi: Add TYPE_LOONGSON_IPI_COMMON stub hw/intc/loongson_ipi: Move common definitions

Re: [PATCH 1/2] docs/specs/pci-ids: Add missing devices

On 5/8/24 05:10, George Matsumura via wrote: Add the missing devices 1b36:000c (PCIe root port) and 1b36:000e (PCIe-to-PCI bridge). Signed-off-by: George Matsumura --- docs/specs/pci-ids.rst | 4 1 file changed, 4 insertions(+) Patches 1 & 2 queued, thanks George.

Re: [PATCH v2 10/13] target/riscv: Enable sscofpmf for bare cpu by default

On Tue, Aug 06, 2024 at 11:51:20AM GMT, Alistair Francis wrote: > On Wed, Jul 24, 2024 at 9:33 AM Atish Patra wrote: > > > > Sscofpmf has been supported on virt machine for a long time. It is > > required to enable profiling on virt machines. Let's enable it > > by default for ease of usage. > > >

Re: [PATCH-for-9.1 v2] hw/ide/pci.c: Remove dead code from bmdma_prepare_buf()

On 5/8/24 20:24, Philippe Mathieu-Daudé wrote: From: Peter Maydell Coverity notes that the code at the end of the loop in bmdma_prepare_buf() is unreachable. This is because in commit 9fbf0fa81fca8f527 ("ide: remove hardcoded 2GiB transactional limit") we removed the only codepath in the loop

Re: [PATCH v2 13/13] target/riscv: Enable PMU related extensions to preferred rule

On Tue, Jul 23, 2024 at 04:30:10PM GMT, Atish Patra wrote: > Counter delegation/configuration extension requires the following > extensions to be enabled. > > 1. Smcdeleg - To enable counter delegation from M to S > 2. S[m|s]csrind - To enable indirect access CSRs > 3. Smstateen - Indirect CSR ext

Re: [PATCH v5 2/7] acpi/generic_event_device: add an APEI error device

On Fri, 2 Aug 2024 23:43:57 +0200 Mauro Carvalho Chehab wrote: subj: s/APEI/error/ to match spec > Adds a Generic Event Device to handle generic hardware error ^ Did you want to say: Error ? > events, supporting General Purpose Event (GPE) as specified at even though GPE

Re: [PATCH v5 1/7] arm/virt: place power button pin number on a define

On Fri, 2 Aug 2024 23:43:56 +0200 Mauro Carvalho Chehab wrote: > Having magic numbers inside the code is not a good idea, as it > is error-prone. So, instead, create a macro with the number > definition. > > Signed-off-by: Mauro Carvalho Chehab > Reviewed-by: Jonathan Cameron Reviewed-by: Ig

Re: [PATCH v5 3/7] arm/virt: Wire up GPIO error source for ACPI / GHES

On Fri, 2 Aug 2024 23:43:58 +0200 Mauro Carvalho Chehab wrote: subj: s/GPIO/GED signaled/ > Adds support to ARM virtualization to allow handling > a General Purpose Event (GPE) via GED error device. s/General Purpose Event (GPE).../ generic error ACPI Event via GED & error source device > I

RE: [PATCH v5 5/7] qapi/ghes-cper: add an interface to do generic CPER error injection

>-Original Message- >From: Mauro Carvalho Chehab >Sent: 02 August 2024 22:44 >Cc: Jonathan Cameron ; Shiju Jose >; Mauro Carvalho Chehab >; Michael S. Tsirkin ; Ani >Sinha ; Dongjiu Geng ; Eric >Blake ; Igor Mammedov ; >Markus Armbruster ; Michael Roth >; Paolo Bonzini ; Peter >Maydell

Re: [PATCH v5 4/7] acpi/ghes: Support GPIO error source

On Tue, 6 Aug 2024 08:09:28 +0200 Mauro Carvalho Chehab wrote: > Em Mon, 5 Aug 2024 17:56:17 +0100 > Jonathan Cameron escreveu: > > > On Fri, 2 Aug 2024 23:43:59 +0200 > > Mauro Carvalho Chehab wrote: > > > > > From: Jonathan Cameron > > > > > > Add error notification to GHES v2 using th

Re: [PATCH v3 1/2] nbd: CVE-2024-7409: Close stray client sockets at server shutdown

On Mon, Aug 05, 2024 at 09:21:35PM -0500, Eric Blake wrote: > A malicious client can attempt to connect to an NBD server, and then > intentionally delay progress in the handshake, including if it does > not know the TLS secrets. Although this behavior can be bounded by > the max-connections parame

[PATCH] hw/misc: Add a virtual PCILeech device

This virtual PCILeech device aims to help security researchers attack the guest via DMA and test their IOMMU defenses. This device is intended to support any systems with PCI, but I am only able to test x86-based guests. For what PCILeech is, check PCILeech GitHub repository: https://github.com/ufr

Re: [PATCH v5 4/7] acpi/ghes: Support GPIO error source

On Fri, 2 Aug 2024 23:43:59 +0200 Mauro Carvalho Chehab wrote: > From: Jonathan Cameron > > Add error notification to GHES v2 using the GPIO source. > > [mchehab: do some cleanups at ACPI_HEST_SRC_ID_* checks] > > Signed-off-by: Jonathan Cameron > Signed-off-by: Mauro Carvalho Chehab > ---

Re: [PATCH v3 2/2] nbd: Clean up clients more efficiently

On Mon, Aug 05, 2024 at 09:21:36PM -0500, Eric Blake wrote: > Since an NBD server may be long-living, serving clients that > repeatedly connect and disconnect, it can be more efficient to clean > up after each client disconnects, rather than storing a list of > resources to clean up when the server

[PATCH v6] virtio-pci: Fix the use of an uninitialized irqfd

The crash was reported in MAC OS and NixOS, here is the link for this bug https://gitlab.com/qemu-project/qemu/-/issues/2334 https://gitlab.com/qemu-project/qemu/-/issues/2321 In this bug, they are using the virtio_input device. The guest notifier was not supported for this device, The function vi

Re: [PULL 0/5] riscv-to-apply queue

github.com/alistair23/qemu.git tags/pull-riscv-to-apply-20240806-2 for you to fetch changes up to b3a34eb90d8264bd73ccb25295b1a7e271a9029c: roms/opensbi: Update to v1.5.1 (2024-08-06 15:01:01 +1000) RISC-V PR for 9.1 * roms/opensbi:

Re: [PATCH 1/3] virtio_net: Add the check for vdpa's mac address

On Tue, 6 Aug 2024 at 11:07, Jason Wang wrote: > > On Tue, Aug 6, 2024 at 8:58 AM Cindy Lu wrote: > > > > When using a VDPA device, it is important to ensure that > > the MAC address in the hardware matches the MAC address > > from the QEMU command line. > > This will allow the device to boot. >

Re: [PATCH 3/3] virtio_net: remove the unnecessary check in get_config

On Tue, 6 Aug 2024 at 11:09, Jason Wang wrote: > > On Tue, Aug 6, 2024 at 8:58 AM Cindy Lu wrote: > > > > The vdpa device with MAC address 0 should not boot. > > So remove the check here > > > > Signed-off-by: Cindy Lu > > Please describe what issues you've seen, and how it is fixed by this comm

Re: [PULL v2 00/13] Block layer patches

On 8/6/24 18:02, Kevin Wolf wrote: The following changes since commit e7207a9971dd41618b407030902b0b2256deb664: Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging (2024-08-06 08:02:34 +1000) are available in the Git repository at: https://repo.or.cz/qemu/kevin.git

Re: [PATCH 1/3] virtio_net: Add the check for vdpa's mac address

Do we check that the MAC from the command line or HW was formed correctly and doesn't include multicast bit? Best regards, Yan. On Tue, Aug 6, 2024 at 12:45 PM Cindy Lu wrote: > > On Tue, 6 Aug 2024 at 11:07, Jason Wang wrote: > > > > On Tue, Aug 6, 2024 at 8:58 AM Cindy Lu wrote: > > > > > >

RE: [PATCH v5 6/7] acpi/ghes: add support for generic error injection via QAPI

>-Original Message- >From: Mauro Carvalho Chehab >Sent: 02 August 2024 22:44 >Cc: Jonathan Cameron ; Shiju Jose >; Mauro Carvalho Chehab >; Michael S. Tsirkin ; Ani >Sinha ; Dongjiu Geng ; Igor >Mammedov ; linux-ker...@vger.kernel.org; qemu- >a...@nongnu.org; qemu-devel@nongnu.org >Subject

KVM Community Call (6/8/24) agenda items?

Hi, The KVM/QEMU community call is at: https://meet.jit.si/kvmcallmeeting @ 06/08/2024 14:00 UTC Are there any agenda items for the sync-up? -- Alex Bennée Virtualisation Tech Lead @ Linaro

Re: [PULL 16/16] target/i386/SEV: implement mask_cpuid_features

On Thu, Jul 04, 2024 at 11:58:06AM +0200, Paolo Bonzini wrote: > Drop features that are listed as "BitMask" in the PPR and currently > not supported by AMD processors. The only ones that may become useful > in the future are TSC deadline timer and x2APIC, everything else is > not needed for SEV-SN

Re: [PATCH] Add plugin bbvgen: basic block icounts for topblocks + simpoints

Greg McGary writes: > Tally icounts for basic blocks. The data is useful for producing > human-readable topblocks reports, and for creating simpoints to guide > accurate & efficient machine simulation runs. > > QEMU's The Tiny Code Generator creates TCG blocks in a way that is > expedient for JIT

Re: u-boot-sam460ex fixes

Hello, On Sat, 3 Aug 2024, Michael Tokarev wrote: It's been a long time since everyone's fighting with u-boot-sam460ex code which is very bad, suffers from countless issues. For one, it does not compile for quite a long time with current compilers. QEMU comes with a binary so normally there'

Re: u-boot-sam460ex fixes

On Tue, 6 Aug 2024, Nicholas Piggin wrote: On Sat Aug 3, 2024 at 6:40 PM AEST, Michael Tokarev wrote: Hi! It's been a long time since everyone's fighting with u-boot-sam460ex code which is very bad, suffers from countless issues. For one, it does not compile for quite a long time with current

[PATCH-for-9.1?] qapi/util: Include missing 'qapi/error.h' header

qapi_enum_parse() uses the Error type which is declared in "qapi/error.h". Include "qapi/error.h" in order to avoid: include/qapi/util.h:27:30: error: unknown type name 'Error' int def, Error **errp); ^ Note we include it after the QEnumLookup de

Re: [PATCH 0/3] virtio-gpu-gl: Improve OpenGL and related display error messages

On 31/7/24 17:59, Marc-André Lureau wrote: Series: Acked-by: Marc-André Lureau > I'll queue this via my hw-misc tree, thanks.

[PULL 03/28] hw/intc/loongson_ipi: Add TYPE_LOONGSON_IPI_COMMON stub

From: Bibo Mao Introduce LOONGSON_IPI_COMMON stubs, QDev parent of LOONGSON_IPI. Signed-off-by: Bibo Mao [PMD: Extracted from bigger commit, added commit description] Co-Developed-by: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bibo Mao Tested-by: Bibo Mao Acke

[PULL 01/28] hw/intc/loongson_ipi: Rename LoongsonIPI -> LoongsonIPIState

From: Bibo Mao We'll have to add LoongsonIPIClass in few commits, so rename LoongsonIPI as LoongsonIPIState for clarity. Signed-off-by: Bibo Mao [PMD: Extracted from bigger commit, added commit description] Co-Developed-by: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed

[PULL 02/28] hw/intc/loongson_ipi: Extract loongson_ipi_common_realize()

From: Bibo Mao In preparation to extract common IPI code in few commits, extract loongson_ipi_common_realize(). Signed-off-by: Bibo Mao [PMD: Extracted from bigger commit, added commit description] Co-Developed-by: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bibo

[PULL 06/28] hw/intc/loongson_ipi: Move IPICore structure to loongson_ipi_common.h

From: Bibo Mao Move the IPICore structure and corresponding common fields of LoongsonIPICommonState to "hw/intc/loongson_ipi_common.h". Signed-off-by: Bibo Mao [PMD: Extracted from bigger commit, added commit description] Co-Developed-by: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-

[PULL 05/28] hw/intc/loongson_ipi: Move IPICore::mmio_mem to LoongsonIPIState

From: Bibo Mao It is easier to manage one array of MMIO MR rather than one per vCPU. Signed-off-by: Bibo Mao [PMD: Extracted from bigger commit, added commit description] Co-Developed-by: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bibo Mao Tested-by: Bibo Mao

[PULL 09/28] hw/intc/loongson_ipi: Add LoongsonIPICommonClass::cpu_by_arch_id handler

From: Bibo Mao Allow Loongson IPI implementations to have their own cpu_by_arch_id() handler. Signed-off-by: Bibo Mao [PMD: Extracted from bigger commit, added commit description] Co-Developed-by: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bibo Mao Tested-by: B

[PULL 08/28] hw/intc/loongson_ipi: Add LoongsonIPICommonClass::get_iocsr_as handler

From: Bibo Mao Allow Loongson IPI implementations to have their own get_iocsr_as() handler. Signed-off-by: Bibo Mao [PMD: Extracted from bigger commit, added commit description] Co-Developed-by: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bibo Mao Tested-by: Bib

[PULL 07/28] hw/intc/loongson_ipi: Pass LoongsonIPICommonState to send_ipi_data()

From: Bibo Mao In order to get LoongsonIPICommonClass in send_ipi_data() in the next commit, propagate LoongsonIPICommonState. Signed-off-by: Bibo Mao [PMD: Extracted from bigger commit, added commit description] Co-Developed-by: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Re

[PULL 10/28] hw/intc/loongson_ipi: Expose loongson_ipi_core_read/write helpers

From: Bibo Mao In order to access loongson_ipi_core_read/write helpers from loongson_ipi_common.c in the next commit, make their prototype declaration public. Signed-off-by: Bibo Mao [PMD: Extracted from bigger commit, added commit description] Co-Developed-by: Philippe Mathieu-Daudé Signed-of

[PULL 11/28] hw/intc/loongson_ipi: Move common code to loongson_ipi_common.c

From: Bibo Mao Move the common code from loongson_ipi.c to loongson_ipi_common.c, call parent_realize() instead of loongson_ipi_common_realize() in loongson_ipi_realize(). Signed-off-by: Bibo Mao [PMD: Extracted from bigger commit, added commit description] Co-Developed-by: Philippe Mathieu-Dau

[PULL 13/28] hw/loongarch/virt: Replace Loongson IPI with LoongArch IPI

From: Bibo Mao Loongarch IPI inherits from class LoongsonIPICommonClass, and it only contains Loongarch 3A5000 virt machine specific interfaces, rather than mix different machine implementations together. Signed-off-by: Bibo Mao [PMD: Rebased] Co-Developed-by: Philippe Mathieu-Daudé Signed-off

[PULL 15/28] hw/sd/sdcard: Explicit dummy byte value

On error the DAT lines are left unmodified to their previous states. QEMU returns 0x00 for convenience. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240730092138.32443-2-phi...@linaro.org> --- hw/sd/sd.c | 12 +++- 1 file changed, 7 insertions(+),

[PULL 17/28] hw/sd/sdhci: Reset @data_count index on invalid ADMA transfers

We neglected to clear the @data_count index on ADMA error, allowing to trigger assertion in sdhci_read_dataport() or sdhci_write_dataport(). Cc: qemu-sta...@nongnu.org Fixes: d7dfca0807 ("hw/sdhci: introduce standard SD host controller") Reported-by: Zheyu Ma Resolves: https://gitlab.com/qemu-pro

[PULL 18/28] hw/block/pflash_cfi01: Don't decrement pfl->counter below 0

From: Peter Maydell In pflash_write() Coverity points out that we can decrement the unsigned pfl->counter below zero, which makes it wrap around. In fact this is harmless, because if pfl->counter is 0 at this point we also increment pfl->wcycle to 3, and the wcycle == 3 handling doesn't look at

[PULL 00/28] Misc HW & UI patches for 2024-08-06

gitlab.com/bonzini/qemu into staging (2024-08-06 08:02:34 +1000) are available in the Git repository at: https://github.com/philmd/qemu.git tags/hw-misc-20240806 for you to fetch changes up to e006f0186bff4c66d3dd7a34e08fdae81d606480: docs/specs/pci-ids: Fix markup (2024-08-06 10:2

[PULL 04/28] hw/intc/loongson_ipi: Move common definitions to loongson_ipi_common.h

From: Bibo Mao Signed-off-by: Bibo Mao [PMD: Extracted from bigger commit, added commit description] Co-Developed-by: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bibo Mao Tested-by: Bibo Mao Acked-by: Song Gao Reviewed-by: Richard Henderson Reviewed-by: Jiaxun

[PULL 27/28] docs/specs/pci-ids: Add missing devices

From: George Matsumura Add the missing devices 1b36:000c (PCIe root port) and 1b36:000e (PCIe-to-PCI bridge). Signed-off-by: George Matsumura Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20240805031012.16547-2-g...@gorgnet.net> Signed-off-by: Philippe Mathieu-Daudé --- docs/specs/pci-ids

[PULL 16/28] hw/sd/sdcard: Do not abort when reading DAT lines on invalid cmd state

Guest should not try to read the DAT lines from invalid command state. If it still insists to do so, return a dummy value. Cc: qemu-sta...@nongnu.org Fixes: e2dec2eab0 ("hw/sd/sdcard: Remove default case in read/write on DAT lines") Reported-by: Zheyu Ma Resolves: https://gitlab.com/qemu-project

[PULL 21/28] hw/ide/pci: Remove dead code from bmdma_prepare_buf()

From: Peter Maydell Coverity notes that the code at the end of the loop in bmdma_prepare_buf() is unreachable. This is because in commit 9fbf0fa81fca8f527 ("ide: remove hardcoded 2GiB transactional limit") we removed the only codepath in the loop which could "break" out of it, but didn't notice

[PULL 22/28] hw/display/virtio-gpu: Improve "opengl is not available" error message

From: Peter Maydell If the user tries to use the virtio-gpu-gl device but the display backend doesn't have OpenGL support enabled, we currently print a rather uninformative error message: $ qemu-system-aarch64 -M virt -device virtio-gpu-gl qemu-system-aarch64: -device virtio-gpu-gl: opengl is no

[PULL 19/28] hw/ide/atapi: Be explicit that assigning to s->lcyl truncates

From: Peter Maydell In ide_atapi_cmd_reply_end() we calculate a 16-bit size, and then assign its two halves to s->lcyl and s->hcyl like this: s->lcyl = size; s->hcyl = size >> 8; Coverity warns that the first line here can overflow the 8-bit s->lcyl variable. This is true,

[PULL 12/28] hw/intc/loongarch_ipi: Add loongarch IPI support

From: Bibo Mao Loongarch IPI is added here, it inherits from class TYPE_LOONGSON_IPI_COMMON, and two interfaces get_iocsr_as() and cpu_by_arch_id() are added for Loongarch 3A5000 machine. It can be used when ipi is emulated in userspace with KVM mode. Signed-off-by: Bibo Mao [PMD: Rebased and s

Re: [PATCH v5 5/7] qapi/ghes-cper: add an interface to do generic CPER error injection

On Fri, 2 Aug 2024 23:44:00 +0200 Mauro Carvalho Chehab wrote: > Creates a QMP command to be used for generic ACPI APEI hardware error > injection (HEST) via GHESv2. > > The actual GHES code will be added at the followup patch. > > Signed-off-by: Mauro Carvalho Chehab > --- > MAINTAINERS

[PULL 28/28] docs/specs/pci-ids: Fix markup

From: George Matsumura This fixes the markup of the PCI and PCIe Expander Bridge entries to be consistent with the rest of the file. Signed-off-by: George Matsumura Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20240805031012.16547-4-g...@gorgnet.net> Signed-off-by: Philippe Mathieu-Daudé

[PULL 23/28] system/vl.c: Expand OpenGL related errors

From: Peter Maydell Expand the OpenGL related error messages we produce for various "OpenGL not present/not supported" cases, to hopefully guide the user towards how to fix things. Now if the user tries to enable GL on a backend that doesn't support it the error message is a bit more precise: $

[PULL 24/28] ui/console: Note in '-display help' that some backends support suboptions

From: Peter Maydell Currently '-display help' only prints the available backends. Some of those backends support suboptions (e.g. '-display gtk,gl=on'). Mention that in the help output, and point the user to where they might be able to find more information about the suboptions. The new output lo

[PULL 26/28] hw/pci-host/gt64120: Reset config registers during RESET phase

Reset config values in the device RESET phase, not only once when the device is realized, because otherwise the device can use unknown values at reset. Since we are adding a new reset method, use the preferred Resettable API (for a simple leaf device reset, a DeviceClass::reset method and a Resett

Re: [PATCH v5 5/7] qapi/ghes-cper: add an interface to do generic CPER error injection

Em Tue, 6 Aug 2024 14:51:53 +0200 Igor Mammedov escreveu: > > +{ 'struct': 'CommonPlatformErrorRecord', > > + 'data': { > > > + 'notification-type': 'str', > > this should be source id (type is just impl. detail of how QEMU delivers > event for given source id) > unless there is no pl

[PULL 25/28] hw/pci-host/gt64120: Set PCI base address register write mask

When booting Linux we see: PCI host bridge to bus :00 pci_bus :00: root bus resource [mem 0x1000-0x17ff] pci_bus :00: root bus resource [io 0x1000-0x1f] pci_bus :00: No busn resource found for root bus, will use [bus 00-ff] pci :00:00.0: [11ab:4620] type

Re: [PATCH v3 2/2] nbd: Clean up clients more efficiently

On Tue, Aug 06, 2024 at 10:32:54AM GMT, Daniel P. Berrangé wrote: > On Mon, Aug 05, 2024 at 09:21:36PM -0500, Eric Blake wrote: > > Since an NBD server may be long-living, serving clients that > > repeatedly connect and disconnect, it can be more efficient to clean > > up after each client disconne

[PULL 20/28] hw/block/fdc-isa: Assert that isa_fdc_get_drive_max_chs() found something

From: Peter Maydell Coverity complains about an overflow in isa_fdc_get_drive_max_chs() that can happen if the loop over fd_formats never finds a match, because we initialize *maxc to 0 and then at the end of the function decrement it. This can't ever actually happen because fd_formats has at le

[PULL 14/28] hw/intc/loongson_ipi: Restrict to MIPS

From: Bibo Mao Now than LoongArch target can use the TYPE_LOONGARCH_IPI model, restrict TYPE_LOONGSON_IPI to MIPS. Signed-off-by: Bibo Mao [PMD: Extracted from bigger commit, added commit description] Co-Developed-by: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: B

[PATCH 3/7] target/ppc: Fix mtDPDES targeting SMT siblings

A typo in the loop over SMT threads to set irq level for doorbells when storing to DPDES meant everything was aimed at the CPU executing the instruction. Signed-off-by: Nicholas Piggin --- target/ppc/misc_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/ppc/mis

[PATCH 2/7] ppc/pnv: Fix LPC POWER8 register sanity check

POWER8 does not have the ISA IRQ -> SERIRQ routing system of later CPUs, instead all ISA IRQs are sent to the CPU via a single PSI interrupt. There is a sanity check in the POWER8 case to ensure the routing bits have not been set, because that would indicate a programming error. Those bits were in

[PATCH 1/7] ppc/pnv: Fix LPC serirq routing calculation

The serirq routing table is split over two registers, the calculation for the high irqs in the second register did not subtract the irq offset. This was spotted by Coverity as a shift-by-negative. Fix this and change the open-coded shifting and masking to use extract32() function so it's less error

[PATCH 0/7] various ppc fixes

This fixes LPC serirq Coverity issues introduced in the merge window that Cedric reported. Also fixes for an assorted bunch of emulation issues recently turned up when running PowerVM firmware on the model. Thanks, Nick Nicholas Piggin (7): ppc/pnv: Fix LPC serirq routing calculation ppc/pnv

[PATCH 5/7] target/ppc: Fix doorbell delivery to threads in powersave

Doorbell exceptions are not not cleared when they cause a wake from powersave state, only when they take the corresponding interrupt. The sreset-on-wake logic must avoid clearing the interrupt in this case. Signed-off-by: Nicholas Piggin --- target/ppc/excp_helper.c | 17 + 1 fil

[PATCH 7/7] target/ppc: Fix VRMA to not check virtual page class key protection

Hash virtual real mode addressing is defined by the architecture to not perform virtual page class key protection checks. Signed-off-by: Nicholas Piggin --- target/ppc/mmu-hash64.c | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mm

[PATCH 6/7] target/ppc: Fix HFSCR facility checks

The HFSCR defines were being encoded as bit masks, but the users expect (and analogous FSCR defines are) bit numbers. Signed-off-by: Nicholas Piggin --- target/ppc/cpu.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index bd32a1a5f8..

[PATCH 4/7] target/ppc: PMIs are level triggered

In Book-S / Power processors, the performance monitor interrupts are driven by the MMCR0[PMAO] bit, which is level triggered and not cleared by the interrupt. Others may have different performance monitor architecture, but none of those are implemented by QEMU. Signed-off-by: Nicholas Piggin ---

Re: [PATCH v2 4/4] virtio-net: Add support for USO features

On Tue, Aug 06, 2024 at 04:35:44PM +0900, Akihiko Odaki wrote: > On 2024/08/05 19:08, Michael S. Tsirkin wrote: > > On Mon, Aug 05, 2024 at 06:37:58PM +0900, Akihiko Odaki wrote: > > > If cross-migrate=off, QEMU can still migrate on the same host (checkpoint > > > and restart). QEMU can also migrat

Re: [PULL 2/8] virtio-net: Ensure queue index fits with RSS

On Fri, Aug 02, 2024 at 11:19:23AM +0800, Jason Wang wrote: > From: Akihiko Odaki > > Ensure the queue index points to a valid queue when software RSS > enabled. The new calculation matches with the behavior of Linux's TAP > device with the RSS eBPF program. > > Fixes: 4474e37a5b3a ("virtio-net:

Re: [PATCH 3/7] target/ppc: Fix mtDPDES targeting SMT siblings

On 6/8/24 15:13, Nicholas Piggin wrote: A typo in the loop over SMT threads to set irq level for doorbells when storing to DPDES meant everything was aimed at the CPU executing the instruction. Signed-off-by: Nicholas Piggin --- target/ppc/misc_helper.c | 2 +- 1 file changed, 1 insertion(+)

Re: [PATCH 1/3] virtio_net: Add the check for vdpa's mac address

On Tue, Aug 06, 2024 at 08:58:01AM +0800, Cindy Lu wrote: > When using a VDPA device, it is important to ensure that > the MAC address in the hardware matches the MAC address > from the QEMU command line. > This will allow the device to boot. > > Signed-off-by: Cindy Lu Always post threads with

Re: [PATCH 1/3] hw/display/virtio-gpu: Improve "opengl is not available" error message

Peter Maydell writes: > If the user tries to use the virtio-gpu-gl device but the display > backend doesn't have OpenGL support enabled, we currently print a > rather uninformative error message: > > $ qemu-system-aarch64 -M virt -device virtio-gpu-gl > qemu-system-aarch64: -device virtio-gpu-gl:

Re: [PATCH 2/3] system/vl.c: Expand OpenGL related errors

Peter Maydell writes: > Expand the OpenGL related error messages we produce for various > "OpenGL not present/not supported" cases, to hopefully guide the > user towards how to fix things. > > Now if the user tries to enable GL on a backend that doesn't > support it the error message is a bit mor

[PATCH v1 1/2] Fixes: Coverity CID 1558827

In this commit the following coverity scan defect has been fixed. CID 1558827:(OVERRUN) Overrunning array "s->seq_op" of 8 bytes at byte offset 16 using index "get_seq_index(s) + 1" (which evaluates to 16). Signed-off-by: Chalapathi V --- hw/ssi/pnv_spi.c | 6 +++--- 1 file changed, 3 inse

[PATCH v1 0/2] hw/ppc: SPI model - coverity fixes

Hello, In this patchset below defects detected during coverity scan for latest spi model changes were fixed. - CID 1558831: Resource leaks (RESOURCE_LEAK) Variable "rsp_payload" going out of scope leaks the storage it points to. - CID 1558827:(OVERRUN) Overrunning array "s->seq_op" of 8

[PATCH v1 2/2] Fixes: Coverity CID 1558831

In this commit the following coverity scan defect has been fixed CID 1558831: Resource leaks (RESOURCE_LEAK) Variable "rsp_payload" going out of scope leaks the storage it points to. Signed-off-by: Chalapathi V --- hw/ssi/pnv_spi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/ssi

Re: [PATCH v3 2/2] nbd: Clean up clients more efficiently

On Tue, Aug 06, 2024 at 10:32:54AM GMT, Daniel P. Berrangé wrote: > On Mon, Aug 05, 2024 at 09:21:36PM -0500, Eric Blake wrote: > > Since an NBD server may be long-living, serving clients that > > repeatedly connect and disconnect, it can be more efficient to clean > > up after each client disconne

Re: [RFC PATCH 04/23] hw/arm: add SVD file for NXP i.MX RT595

Octavian Purdila writes: > Picked from: > > https://github.com/nxp-mcuxpresso/mcux-soc-svd/blob/main/MIMXRT595S/MIMXRT595S_cm33.xml > > NOTE: the file is truncated to keep the email size reasonable. Please > use the link above and download the full file if you want to try out > the patch. > > Sig

Re: [PATCH v1 1/2] Fixes: Coverity CID 1558827

Hi Chalapathi, Please prefix subject with "hw/ssi/pnv". On 6/8/24 15:48, Chalapathi V wrote: In this commit the following coverity scan defect has been fixed. CID 1558827:(OVERRUN) Overrunning array "s->seq_op" of 8 bytes at byte offset 16 using index "get_seq_index(s) + 1" (which evalua

Re: [PATCH v1 2/2] Fixes: Coverity CID 1558831

On 6/8/24 15:48, Chalapathi V wrote: In this commit the following coverity scan defect has been fixed CID 1558831: Resource leaks (RESOURCE_LEAK) Variable "rsp_payload" going out of scope leaks the storage it points to. Signed-off-by: Chalapathi V --- hw/ssi/pnv_spi.c | 1 + 1 file c

[RFC PATCH-for-9.1? 1/2] target/arm: Move qmp_query_gic_capabilities() to hw/intc/

qmp_query_gic_capabilities() is not specific to the ARM architecture but to the GIC device which is modelled in hw/intc/, so move the code there for clarity. No logical change intended. Signed-off-by: Philippe Mathieu-Daudé --- hw/intc/arm_gic_qmp.c | 59 +

[RFC PATCH-for-9.1? 0/2] hw/intc/arm_gic: Only provide query-gic-capabilities when GIC built-in

Attempt to clarify confuse output from the 'query-gic-capabilities' QMP command when no GIC devices are built in. Philippe Mathieu-Daudé (2): target/arm: Move qmp_query_gic_capabilities() to hw/intc/ hw/intc/arm_gic: Only provide query-gic-capabilities when GIC built-in qapi/misc-target.json

[RFC PATCH-for-9.1? 2/2] hw/intc/arm_gic: Only provide query-gic-capabilities when GIC built-in

When configuring QEMU with --without-default-devices and not including machines using a GIC, the GIC model is not built in but the 'query-gic-capabilities' command still returns false hopes about GIC: {"execute": "query-gic-capabilities"} {"return": [{"emulated": true, "version": 3, "kernel":

Re: [PATCH v16 01/13] virtio-gpu: Use trace events for tracking number of in-flight fences

Dmitry Osipenko writes: > Replace printf's used for tracking of in-flight fence inc/dec events > with tracing, for consistency with the rest of virtio-gpu code that > uses tracing. > > Suggested-by: Marc-André Lureau > Signed-off-by: Dmitry Osipenko Reviewed-by: Alex Bennée -- Alex Bennée V

Re: [PATCH v5 6/7] acpi/ghes: add support for generic error injection via QAPI

On Fri, 2 Aug 2024 23:44:01 +0200 Mauro Carvalho Chehab wrote: > Provide a generic interface for error injection via GHESv2. > > This patch is co-authored: > - original ghes logic to inject a simple ARM record by Shiju Jose; > - generic logic to handle block addresses by Jonathan Camero

Re: [PATCH-for-9.1?] qapi/util: Include missing 'qapi/error.h' header

On 8/6/24 22:41, Philippe Mathieu-Daudé wrote: qapi_enum_parse() uses the Error type which is declared in "qapi/error.h". Include "qapi/error.h" in order to avoid: include/qapi/util.h:27:30: error: unknown type name 'Error' int def, Error **errp);

Re: [RFC PATCH 22/23] hw/arm: add basic support for the RT500 SoC

Hi Octavian, Few comments inlined. On 5/8/24 22:17, Octavian Purdila wrote: Add basic support for the RT500 SoC. It supports enough peripherals to run the NXP's microXpresso SDK hello world example. Signed-off-by: Octavian Purdila --- hw/arm/Kconfig | 8 + hw/arm/meson.build

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