vfio_display_edid_init() can fail for many reasons and return silently.
It would be good to report the error.
Old mdev driver may not support vfio edid region and we allow to go
through in this case.
vfio_display_edid_update() isn't changed because it can be called at
runtime when UI changes (i.e
Hi,
This is trying to address an issue Cédric found.
See https://www.mail-archive.com/qemu-devel@nongnu.org/msg1043142.html
While looking into it, also found a potential memory leak.
I'm sorry that I didn't find how to test this fix, because it looks
a GFX card is needed. Any idea on how to test
EDID related device region info is leaked in three paths:
1. In vfio_get_dev_region_info(), when edid info isn't find, the last
device region info is leaked.
2. In vfio_display_edid_init() error path, edid info is leaked.
3. In VFIODisplay destroying path, edid info is leaked.
Fixes: 08479114b0de
On Fri, Jun 28, 2024 at 11:19:52AM +0200, Philippe Mathieu-Daudé wrote:
> On 28/6/24 10:14, Daniel P. Berrangé wrote:
> > On Fri, Jun 28, 2024 at 09:00:38AM +0200, Philippe Mathieu-Daudé wrote:
> > > Recent SDHCI expect cards to support the v3.01 spec
> > > to negociate lower I/O voltage. Select it
In the original extract32(val, 0, lmul) logic, when lmul is 2 and val is v10 or
v12,
there is an issue with this check condition. I think a simple mod operation is
sufficient.
Signed-off-by: Zhiwei Jiang
---
target/riscv/insn_trans/trans_rvv.c.inc | 2 +-
1 file changed, 1 insertion(+), 1 dele
John Snow writes:
> We do not need a dedicated section for notes. By eliminating a specially
> parsed section, these notes can be treated as normal rST paragraphs in
> the new QMP reference manual, and can be placed and styled much more
> flexibly.
>
> Convert all existing "Note" and "Notes" sect
Ping?
On 6/7/24 17:00, Alexander Ivanov wrote:
static void nbd_blockdev_client_closed(NBDClient *client, bool ignored)
{
nbd_client_put(client);
+if (nbd_server == NULL) {
+return;
+}
assert(nbd_server->connections > 0);
nbd_server->connections--;
nbd_
One more ping...
On 3/15/24 09:58, Alexander Ivanov wrote:
If a block device is an LVM logical volume we can resize it using
standard LVM tools.
Add a helper to detect if a device is a DM device. In raw_co_truncate()
check if the block device is DM and resize it executing lvresize.
Signed-off-
In the test environment, we conducted IO stress tests on all storage disks
within a virtual machine that had five storage devices mounted.During
testing,
we found that the qemu process allocated a large amount of memory (~800MB)
to handle these IO operations.
When the test ended, although qemu
...
Could you clarify which tree you are referring to ? I see his tree
https://github.com/awilliam/tests is bit old and updated recently, however
I have been using those tests for my unit testing.
Yes, this tree.
...
This went through cycles of breakage and fixes. It worked on 5.18(not su
This prevents the IRQs from being leaked when the macio IDE device is used.
Signed-off-by: Mark Cave-Ayland
---
hw/ide/macio.c| 10 ++
include/hw/misc/macio/macio.h | 5 +
2 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/hw/ide/macio.c b/hw/ide/macio.c
On Mon, 2024-06-24 at 14:50 +0100, Daniel P. Berrangé wrote:
> On Fri, Jun 21, 2024 at 03:29:03PM +0100, Roy Hopkins wrote:
> > Based-on: 02d9c38236
> >
> > Here is v3 of the set of patches to add support for IGVM files to QEMU.
> >
> > Firstly, apologies for the long gap between v2 and v3. This
On Mon, 2024-06-24 at 14:29 +0100, Daniel P. Berrangé wrote:
> On Fri, Jun 21, 2024 at 03:29:06PM +0100, Roy Hopkins wrote:
> > Adds an IGVM loader to QEMU which processes a given IGVM file and
> > applies the directives within the file to the current guest
> > configuration.
> >
> > The IGVM load
On Thu, 2024-06-27 at 10:14 +0100, Daniel P. Berrangé wrote:
> On Thu, Jun 27, 2024 at 11:06:50AM +0200, Stefano Garzarella wrote:
> > On Fri, Jun 21, 2024 at 03:29:06PM GMT, Roy Hopkins wrote:
> > > Adds an IGVM loader to QEMU which processes a given IGVM file and
> > > applies the directives with
On Mon, 2024-06-24 at 15:00 +0100, Daniel P. Berrangé wrote:
> On Fri, Jun 21, 2024 at 03:29:07PM +0100, Roy Hopkins wrote:
> > An IGVM file contains configuration of guest state that should be
> > applied during configuration of the guest, before the guest is started.
> >
> > This patch allows th
On Thu, 2024-06-27 at 14:38 +0200, Stefano Garzarella wrote:
> On Fri, Jun 21, 2024 at 03:29:08PM GMT, Roy Hopkins wrote:
> > When using an IGVM file the configuration of the system firmware is
> > defined by IGVM directives contained in the file. In this case the user
> > should not configure any
On Thu, 2024-06-27 at 14:48 +0200, Stefano Garzarella wrote:
> On Fri, Jun 21, 2024 at 03:29:09PM GMT, Roy Hopkins wrote:
> > The class function and implementations for updating launch data return
> > a code in case of error. In some cases an error message is generated and
> > in other cases, just
On Fri, 7 Jun 2024 14:17:25 +
Ricardo Ribalda wrote:
> When qemu runs without kvm acceleration the ACPI executions take a great
> amount of time. If they take more than the default time (30sec), the
> ACPI calls fail and the system might not behave correctly.
>
> Now the _PRT table is compu
On Fri, Jun 28, 2024 at 12:09:59PM +0100, Roy Hopkins wrote:
> On Mon, 2024-06-24 at 15:00 +0100, Daniel P. Berrangé wrote:
> > On Fri, Jun 21, 2024 at 03:29:07PM +0100, Roy Hopkins wrote:
> > > An IGVM file contains configuration of guest state that should be
> > > applied during configuration of
On Fri, 7 Jun 2024 14:17:24 +
Ricardo Ribalda wrote:
> Signed-off-by: Ricardo Ribalda
> ---
> tests/qtest/bios-tables-test-allowed-diff.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
> b/tests/qtest/bios-tables-test-allowed-diff.h
>
When a command's arguments are specified as an explicit type T,
generated documentation points to the members of T.
Example:
##
# @announce-self:
#
# Trigger generation of broadcast RARP frames to update network
[...]
##
{ 'command': 'announce-self', 'boxed': true,
On Thu, 27 Jun 2024 14:46:14 +0100
Jonathan Cameron wrote:
> On Thu, 27 Jun 2024 15:27:58 +0200
> Igor Mammedov wrote:
>
> > On Thu, 20 Jun 2024 17:03:15 +0100
> > Jonathan Cameron wrote:
> >
> > > This allows the ACPI SRAT Generic Port Affinity Structure
> > > creation to be independent of
On Thu, 27 Jun 2024 15:09:12 +0200
Igor Mammedov wrote:
> On Thu, 20 Jun 2024 17:03:13 +0100
> Jonathan Cameron wrote:
>
> > Using a property allows us to hide the internal details of the PCI device
> > from the code to build a SRAT Generic Initiator Affinity Structure with
> > PCI Device Handl
Gustavo Romero writes:
> Factor out the code used for setting the MTE TCF0 field from the prctl
> code into a convenient function. Other subsystems, like gdbstub, need to
> set this field as well, so keep it as a separate function to avoid
> duplication and ensure consistency in how this field is
Akihiko Odaki writes:
> Unlike GCC, clang checks if the operands in assembly matches with the
> type in C. It also does not support "x" constraint for AArch64 and
> complains about them.
I guess there are more needed:
ninja: no work to do.
/home/alex/lsrc/qemu.git/builds/all.clang/pyvenv/bi
Akihiko Odaki writes:
> The test cases for "converting double-precision to single-precision"
> emits float but the result variable was typed as uint32_t and corrupted
> the printed values. Propertly type it as float.
>
> Signed-off-by: Akihiko Odaki
> Fixes: 8ec8a55e3fc9 ("tests/tcg/arm: add fcv
Gustavo Romero writes:
> This patchset adds the stubs necessary to support GDB memory tagging
> commands on QEMU aarch64 user mode.
Queued to gdbstub/next, thanks. I've manually fixed up the include
issues and moved the PR defines to avoid using prctl.
--
Alex Bennée
Virtualisation Tech Lead @
memcpy() is trying to READ 512 bytes from memory,
pointed by info->kernel_cmdline,
which was (presumable) allocated by g_strdup("");
Found with ASAN, making check with enabled sanitizers.
Signed-off-by: Dmitry Frolov
---
hw/loongarch/boot.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
They don't need to be in the global trace-events file and can have a
local trace header. Also add address_space_map tracepoint for tracking
mapping behaviour.
Signed-off-by: Alex Bennée
---
system/physmem.c| 6 --
system/trace-events | 6 ++
trace-events| 5 -
3 files cha
I guess we never noticed and tried to build with this cross image. Fix
the toolchain prefix so we actually build 32 bit images.
Signed-off-by: Alex Bennée
---
tests/docker/dockerfiles/debian-i686-cross.docker | 2 +-
tests/lcitool/refresh | 2 +-
2 files changed, 2 in
We were repeating information which wasn't super clear. As we already
will have dumped the last failing PC just note the divergence and dump
the previous instruction log.
Signed-off-by: Alex Bennée
---
contrib/plugins/lockstep.c | 16
1 file changed, 8 insertions(+), 8 deletions
While the match functionality is useful lets make the verbosity
optional while we are actually running.
Signed-off-by: Alex Bennée
---
tests/plugin/insn.c | 36 +---
1 file changed, 21 insertions(+), 15 deletions(-)
diff --git a/tests/plugin/insn.c b/tests/plugin
From: Gustavo Romero
Make the MTE helpers allocation_tag_mem_probe, load_tag1, and store_tag1
available to other subsystems.
Signed-off-by: Gustavo Romero
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20240628050850.536447-6-gustavo.rom...@linaro.org>
---
ta
The ExecState is shared across the socket and if we want to compare
say 64 bit and 32 bit binaries we need the two to use the same sizes
for things.
Signed-off-by: Alex Bennée
---
contrib/plugins/lockstep.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/contrib/plugins/l
This really helps with lockstep although its super slow on big jobs.
Signed-off-by: Alex Bennée
---
contrib/plugins/lockstep.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/contrib/plugins/lockstep.c b/contrib/plugins/lockstep.c
index 761bcdf363..353bf12dfb 100644
--- a/c
From: Gustavo Romero
Move GdbCmdParseEntry and its associated types into a separate header
file to allow the use of GdbCmdParseEntry and other gdbstub command
functions outside of gdbstub.c.
Since GdbCmdParseEntry and get_param are now public, kdoc
GdbCmdParseEntry and rename get_param to gdb_ge
We are interested in the particular instruction so we should use a
stable record for it. We could bring this down to physical address but
for now vaddr + disas seems to do the trick.
Signed-off-by: Alex Bennée
---
tests/plugin/insn.c | 76 ++---
1 file cha
From: Akihiko Odaki
Previously we are always specifying -u $(UID) to match the UID in the
container with one outside. This causes a problem with rootless Podman.
Rootless Podman remaps user IDs in the container to ones controllable
for the current user outside. The -u option instructs Podman to
Hi,
This is a grab bag of fixes and clean-ups as we swiftly approach the
soft freeze deadline. The i386 TCG fix came about when re-enabling the
32 bit host build and finding a regression which was masked by KVM's
presence. As a result I decided to disable KVM in the build anyway as
its TCG most li
The commit 4f9a8315e6 (gitlab-ci.d/crossbuilds: Drop the i386 system
emulation job) was a little too aggressive dropping testing for 32 bit
system builds. Partially revert but using the debian-i686 cross build
images this time as fedora has deprecated the 32 bit stuff.
As the SEV breakage gets in
From: Gustavo Romero
Factor out the code used for setting the MTE TCF0 field from the prctl
code into a convenient function. Other subsystems, like gdbstub, need to
set this field as well, so keep it as a separate function to avoid
duplication and ensure consistency in how this field is set acros
Incorrect brace positions causes an unintended overflow on 32 bit
builds and shenanigans result.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2413
Suggested-by: Mark Cave-Ayland
Signed-off-by: Alex Bennée
---
target/i386/tcg/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 delet
From: Gustavo Romero
Change 'process_string_cmd' to return true on success and false on
failure, instead of 0 and -1.
Signed-off-by: Gustavo Romero
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20240628050850.536447-2-gustavo.rom...@
From: Akihiko Odaki
The test cases for "converting double-precision to single-precision"
emits float but the result variable was typed as uint32_t and corrupted
the printed values. Propertly type it as float.
Signed-off-by: Akihiko Odaki
Fixes: 8ec8a55e3fc9 ("tests/tcg/arm: add fcvt test cases
We can't assign sock_path directly from the autofree'd GStrv, take a
copy.
Signed-off-by: Alex Bennée
---
contrib/plugins/lockstep.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/contrib/plugins/lockstep.c b/contrib/plugins/lockstep.c
index 237543b43a..111ec3fa27 100644
---
From: Gustavo Romero
Currently, it's not possible to have stubs specific to a given target,
even though there are GDB features which are target-specific, like, for
instance, memory tagging.
This commit introduces gdb_extend_qsupported_features,
gdb_extend_query_table, and gdb_extend_set_table fu
On 28/6/24 11:37, Daniel P. Berrangé wrote:
On Fri, Jun 28, 2024 at 11:19:52AM +0200, Philippe Mathieu-Daudé wrote:
On 28/6/24 10:14, Daniel P. Berrangé wrote:
On Fri, Jun 28, 2024 at 09:00:38AM +0200, Philippe Mathieu-Daudé wrote:
Recent SDHCI expect cards to support the v3.01 spec
to negocia
From: Gustavo Romero
Add tests to exercise the MTE stubs. The tests will only run if a
version of GDB that supports MTE is available in the test environment.
Signed-off-by: Gustavo Romero
Message-Id: <20240628050850.536447-12-gustavo.rom...@linaro.org>
---
configure
From: Gustavo Romero
Make gdb_hextomem non-internal so it's not confined to use only in
gdbstub.c.
Signed-off-by: Gustavo Romero
Reviewed-by: Richard Henderson
Message-Id: <20240628050850.536447-8-gustavo.rom...@linaro.org>
---
gdbstub/internals.h| 1 -
include/gdbstub/commands.h | 6
From: Gustavo Romero
cmd_startswith is a boolean so use 'true' to set it instead of 1.
Signed-off-by: Gustavo Romero
Message-Id: <20240628050850.536447-10-gustavo.rom...@linaro.org>
---
gdbstub/gdbstub.c | 80 +++
1 file changed, 40 insertions(+), 40
From: David Woodhouse
The vmclock device addresses the problem of live migration with precision
clocks. The tolerances of a hardware counter (e.g. TSC) are typically
around ±50PPM. We use NTP/PTP/PPS to discipline that counter against an
external source of 'real' time, and track the precise frequ
From: Gustavo Romero
This commit implements the stubs to handle the qIsAddressTagged,
qMemTag, and QMemTag GDB packets, allowing all GDB 'memory-tag'
subcommands to work with QEMU gdbstub on aarch64 user mode. It also
implements the get/set functions for the special GDB MTE register
'tag_ctl', us
From: Gustavo Romero
If page in 'ptr_access' is inaccessible and probe is 'true'
allocation_tag_mem_probe should not throw an exception, but currently it
does, so fix it.
Signed-off-by: Gustavo Romero
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
Message-Id: <20240628050850.536447-5
From: Gustavo Romero
Allow passing the current CPU context to command handlers via user_ctx
when the handler requires it.
Signed-off-by: Gustavo Romero
Signed-off-by: Alex Bennée
Message-Id: <20240628050850.536447-9-gustavo.rom...@linaro.org>
---
include/gdbstub/commands.h | 3 +++
gdbstub/gd
John Snow writes:
> Factor out the compatibility parser helper so it can be shared by other
> directives.
Suggest "Factor out the compatibility parser helper into a base class,
so it can be shared by other directives."
>
> Signed-off-by: John Snow
> ---
> docs/sphinx/qapidoc.py | 64 +
Il ven 28 giu 2024, 10:32 Xiaoyao Li ha scritto:
> On 6/27/2024 10:06 PM, Paolo Bonzini wrote:
> > The recent addition of the SUCCOR bit to kvm_arch_get_supported_cpuid()
> > causes the bit to be visible when "-cpu host" VMs are started on Intel
> > processors.
> >
> > While this should in princi
John Snow writes:
> This is a directive that creates a syntactic sugar for creating
> "Example" boxes very similar to the ones already used in the bitmaps.rst
> document, please see e.g.
> https://www.qemu.org/docs/master/interop/bitmaps.html#creation-block-dirty-bitmap-add
>
> In its simplest fo
We already have a load_cpu_field_low32() to load the low half of a
64-bit CPU struct field to a TCGv_i32; however we haven't yet needed
the store equivalent. We'll want that in the next patch, so
implement it.
Signed-off-by: Peter Maydell
---
target/arm/tcg/translate-a32.h | 7 +++
1 file c
To support FPSR and FPCR bits that don't exist in the AArch32 FPSCR
view of floating point control and status (such as the FEAT_AFP ones),
we need to make sure those bits can be migrated. This commit allows
that, whilst maintaining backwards and forwards migration compatibility
for CPUs where there
The M-profile FPSCR LTPSIZE is bits [18:16]; this is the same
field as A-profile FPSCR Len, not Stride. Correct the comment
in vfp_get_fpscr().
We also implemented M-profile FPSCR.QC, but forgot to delete
a TODO comment from vfp_set_fpscr(); remove it now.
Signed-off-by: Peter Maydell
---
targe
In order to allow FPCR bits that aren't in the FPSCR (like the new
bits that are defined for FEAT_AFP), we need to make sure that writes
to the FPSCR only write to the bits of FPCR that are architecturally
mapped, and not the others.
Implement this with a new function vfp_set_fpcr_masked() which
t
Now that we have refactored the set/get functions so that the FPSCR
format is no longer the authoritative one, we can keep FPSR and FPCR
in separate CPU state fields.
As well as the get and set functions, we also have a scattering of
places in the code which directly access vfp.xregs[ARM_VFP_FPSCR
In AArch32, the floating point control and status bits are all in a
single register, FPSCR. In AArch64, these were split into separate
FPCR and FPSR registers, but the bit layouts remained the same, with
no overlaps, so that you could construct an FPSCR value by ORing FPCR
and FPSR, or equivalentl
In AArch32, the floating point control and status bits are all in a
single register, FPSCR. In AArch64, these were split into separate
FPCR and FPSR registers, but the bit layouts remained the same, with
no overlaps, so that you could construct an FPSCR value by ORing FPCR
and FPSR, or equivalentl
The QC, N, Z, C, V bits live in the FPSR, not the FPCR. Rename the
macros that define these bits accordingly.
Signed-off-by: Peter Maydell
---
target/arm/cpu.h | 17 ++---
target/arm/tcg/mve_helper.c | 8
target/arm/tcg/translate-m-nocp.c | 16 +++
Now that we store FPSR and FPCR separately, the FPSR_MASK and
FPCR_MASK macros are slightly confusingly named and the comment
describing them is out of date. Rename them to FPSCR_FPSR_MASK and
FPSCR_FPCR_MASK, document that they are the mask of which FPSCR bits
are architecturally mapped to which
Make vfp_set_fpscr() call vfp_set_fpsr() and vfp_set_fpcr()
instead of the other way around.
The masking we do when getting and setting vfp.xregs[ARM_VFP_FPSCR]
is a little awkward, but we are going to change where we store the
underlying FPSR and FPCR information in a later commit, so it will
go
On 6/19/24 05:49, Philippe Mathieu-Daudé wrote:
Merge gdbstub64.c in gdbstub.c and remove uses of
target specific TARGET_AARCH64 definition.
Small step toward single ARM/Aarch64 binary.
Philippe Mathieu-Daudé (2):
target/arm: Merge gdbstub64.c within gdbstub.c
target/arm: Always build Aarc
Alex Bennée writes:
> Incorrect brace positions causes an unintended overflow on 32 bit
> builds and shenanigans result.
>
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2413
> Suggested-by: Mark Cave-Ayland
> Signed-off-by: Alex Bennée
This seems to trigger regressions in:
qtest
On Fri, Jun 28, 2024, 3:29 AM Markus Armbruster wrote:
> John Snow writes:
>
> > In a forthcoming series that adds a new QMP documentation generator, it
> > will be helpful to have a linting baseline. However, there's no need to
> > shuffle around the deck chairs too much, because most of this c
On Tue, 25 Jun 2024 at 19:41, Richard Henderson
wrote:
>
> Convert another hand-full of instructions, plus fixes
> for two issues that are related.
>
>
Applied to target-arm.next, thanks.
-- PMM
On Mon, 24 Jun 2024 at 19:09, Gustavo Romero wrote:
>
> Enable FEAT_Debugv8p8 on Arm max CPU.
>
> v2:
> - Revert to the original comment above call to aa32_max_features()
>
> v3:
> - Added feature entry to docs/system/arm/emulation.rst
> - Explicitly set t=0 before using it to set DBGDEVID reg.
On Wed, 26 Jun 2024 at 22:16, Patrick Leis wrote:
>
> Signed-off-by: Patrick Leis
> ---
> MAINTAINERS | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 19f67dc5d2..13255d4a3b 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -2496,7 +249
On Fri, 21 Jun 2024 at 13:59, Sai Pavan Boddu wrote:
>
> Add a way to update the boot-mode via machine properties.
>
> Changes for V2:
> Make boot-mode property work with string,
> Fixed few code style issues,
> Added zynq board doc.
> Changes for V3:
> Mentioned about zynq doc in
On Tue, 25 Jun 2024 at 08:18, Stefano Garzarella wrote:
>
> On Mon, Jun 24, 2024 at 04:19:52PM GMT, Peter Maydell wrote:
> >On Mon, 24 Jun 2024 at 16:11, Stefano Garzarella wrote:
> >>
> >> CCing Jason.
> >>
> >> On Mon, Jun 24, 2024 at 4:30 PM Xoykie wrote:
> >> >
> >> > The virtio packed virtq
Hi Alex,
On 6/28/24 9:14 AM, Alex Bennée wrote:
Gustavo Romero writes:
Factor out the code used for setting the MTE TCF0 field from the prctl
code into a convenient function. Other subsystems, like gdbstub, need to
set this field as well, so keep it as a separate function to avoid
duplication
Add SHMEM_MAP/UNMAP requests to vhost-user to
handle VIRTIO Shared Memory mappings.
This request allows backends to dynamically map
fds into a VIRTIO Shared Memory Region indentified
by its `shmid`. Then, the fd memory is advertised
to the driver as a base addres + offset, so it
can be read/writte
Add a cache BAR in the vhost-user-device
into which files can be directly mapped.
The number, shmid, and size of the VIRTIO Shared
Memory subregions is retrieved through a get_shmem_config
message sent by the vhost-user-base module
on the realize step, after virtio_init().
By default, if VHOST_US
Hi all,
v1->v2:
- Corrected typos and clarifications from
first review
- Added SHMEM_CONFIG frontend request to
query VIRTIO shared memory regions from
backends
- vhost-user-device to use SHMEM_CONFIG
to request and initialise regions
- Added MEM_READ/WRITE backend requests
in case addre
Implement function handlers for memory read and write
operations.
Signed-off-by: Albert Esteve
---
hw/virtio/vhost-user.c | 34 ++
1 file changed, 30 insertions(+), 4 deletions(-)
diff --git a/hw/virtio/vhost-user.c b/hw/virtio/vhost-user.c
index 18cacb2d68..79be
With SHMEM_MAP messages, sharing descriptors between
devices will cause that these devices do not see the
mappings, and fail to access these memory regions.
To solve this, introduce MEM_READ/WRITE requests
that will get triggered as a fallback when
vhost-user memory translation fails.
Signed-off-
The frontend can use this command to retrieve
VIRTIO Shared Memory Regions configuration from
the backend. The response contains the number of
shared memory regions, their size, and shmid.
This is useful when the frontend is unaware of
specific backend type and configuration,
for example, in the `
On 6/28/24 07:23, Peter Maydell wrote:
The M-profile FPSCR LTPSIZE is bits [18:16]; this is the same
field as A-profile FPSCR Len, not Stride. Correct the comment
in vfp_get_fpscr().
We also implemented M-profile FPSCR.QC, but forgot to delete
a TODO comment from vfp_set_fpscr(); remove it now.
On Sat, 22 Jun 2024 at 13:57, Ryan Wendland wrote:
>
> When a usb device is disconnected the transfer service functions bails
> before appropraite transfer error flags are set.
(typo: "appropriate")
> This patch sets the appropriate condition code OHCI_CC_DEVICENOTRESPONDING
> when a device is d
On Fri, Jun 28, 2024, 3:55 AM Markus Armbruster wrote:
> John Snow writes:
>
> > Sphinx does not like sections without titles, because it wants to
> > convert every section into a reference. When there is no title, it
> > struggles to do this and transforms the tree inproperly.
> >
> > Depending
On Thu, 27 Jun 2024 at 14:39, Akihiko Odaki wrote:
>
> This fixes LeakSanitizer warnings.
>
> Signed-off-by: Akihiko Odaki
> ---
> hw/core/cpu-common.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c
> index f131cde2c038..a3073c17d098 100644
>
Gustavo Romero writes:
> Hi Alex,
>
> On 6/28/24 9:14 AM, Alex Bennée wrote:
>> Gustavo Romero writes:
>>
>>> Factor out the code used for setting the MTE TCF0 field from the prctl
>>> code into a convenient function. Other subsystems, like gdbstub, need to
>>> set this field as well, so keep i
On Fri, Jun 28, 2024, 9:09 AM Markus Armbruster wrote:
> John Snow writes:
>
> > Factor out the compatibility parser helper so it can be shared by other
> > directives.
>
> Suggest "Factor out the compatibility parser helper into a base class,
> so it can be shared by other directives."
Sure.
On Thu, 27 Jun 2024 at 14:39, Akihiko Odaki wrote:
>
> FDT properties are aligned by 4 bytes, not 8 bytes.
>
> Signed-off-by: Akihiko Odaki
> ---
> hw/ppc/vof.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/ppc/vof.c b/hw/ppc/vof.c
> index e3b430a81f4f..b5b6514d79fc
On Thu, 27 Jun 2024 at 14:40, Akihiko Odaki wrote:
>
> This fixes LeakSanitizer warnings.
>
> Signed-off-by: Akihiko Odaki
> ---
> tests/qtest/libqtest.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/tests/qtest/libqtest.c b/tests/qtest/libqtest.c
> index f89da7b80797..1605c0c9f615 10
On Fri, Jun 28, 2024, 9:24 AM Markus Armbruster wrote:
> John Snow writes:
>
> > This is a directive that creates a syntactic sugar for creating
> > "Example" boxes very similar to the ones already used in the bitmaps.rst
> > document, please see e.g.
> >
> https://www.qemu.org/docs/master/inter
On Thu, 27 Jun 2024 at 14:41, Akihiko Odaki wrote:
>
> These GThreads are never referenced.
>
> Signed-off-by: Akihiko Odaki
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On Fri, Jun 28, 2024, 11:10 AM John Snow wrote:
>
>
> On Fri, Jun 28, 2024, 3:55 AM Markus Armbruster wrote:
>
>> John Snow writes:
>>
>> > Sphinx does not like sections without titles, because it wants to
>> > convert every section into a reference. When there is no title, it
>> > struggles to
On Fri, 28 Jun 2024 at 11:55, Mark Cave-Ayland
wrote:
>
> This prevents the IRQs from being leaked when the macio IDE device is used.
>
> Signed-off-by: Mark Cave-Ayland
> ---
> hw/ide/macio.c| 10 ++
> include/hw/misc/macio/macio.h | 5 +
> 2 files changed, 11 inser
On 6/28/24 07:23, Peter Maydell wrote:
In AArch32, the floating point control and status bits are all in a
single register, FPSCR. In AArch64, these were split into separate
FPCR and FPSR registers, but the bit layouts remained the same, with
no overlaps, so that you could construct an FPSCR val
On Fri, Jun 28, 2024, 5:52 AM Markus Armbruster wrote:
> John Snow writes:
>
> > We do not need a dedicated section for notes. By eliminating a specially
> > parsed section, these notes can be treated as normal rST paragraphs in
> > the new QMP reference manual, and can be placed and styled much
Hi Phil,
On 6/28/24 4:08 AM, Philippe Mathieu-Daudé wrote:
On 28/6/24 07:08, Gustavo Romero wrote:
Factor out the code used for setting the MTE TCF0 field from the prctl
code into a convenient function. Other subsystems, like gdbstub, need to
set this field as well, so keep it as a separate fun
On 6/28/24 07:23, Peter Maydell wrote:
+void vfp_set_fpsr(CPUARMState *env, uint32_t val)
+{
+ARMCPU *cpu = env_archcpu(env);
+
+vfp_set_fpsr_to_host(env, val);
+
+if (arm_feature(env, ARM_FEATURE_NEON) ||
+cpu_isar_feature(aa32_mve, cpu)) {
+/*
+ * The bit we
On 28/06/2024 16:28, Peter Maydell wrote:
On Fri, 28 Jun 2024 at 11:55, Mark Cave-Ayland
wrote:
This prevents the IRQs from being leaked when the macio IDE device is used.
Signed-off-by: Mark Cave-Ayland
---
hw/ide/macio.c| 10 ++
include/hw/misc/macio/macio.h |
On 6/28/24 07:23, Peter Maydell wrote:
To support FPSR and FPCR bits that don't exist in the AArch32 FPSCR
view of floating point control and status (such as the FEAT_AFP ones),
we need to make sure those bits can be migrated. This commit allows
that, whilst maintaining backwards and forwards mig
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