Re: [PATCH v1 1/2] hw/net:ftgmac100: fix coding style

On 6/19/24 12:01 PM, Jamin Lin wrote: Fix coding style issues from checkpatch.pl Test command: ./scripts/checkpatch.pl --no-tree -f hw/net/ftgmac100.c Signed-off-by: Jamin Lin Reviewed-by: Cédric Le Goater Thanks, C. --- hw/net/ftgmac100.c | 12 1 file changed, 8 inser

Re: [PATCH v2 2/2] tests/avocado: update firmware for sbsa-ref

Hi Marcin, On 20/6/24 08:00, Marcin Juszkiewicz wrote: Update firmware to have graphics card memory fix from EDK2 commit c1d1910be6e04a8b1a73090cf2881fb698947a6e: OvmfPkg/QemuVideoDxe: add feature PCD to remap framebuffer W/C Some platforms (such as SBSA-QEMU on recent builds of the

Re: [PATCH 22/32] hw/sd: Add emmc_cmd_SEND_EXT_CSD() handler

Hello On 6/19/24 7:40 PM, Philippe Mathieu-Daudé wrote: Hi, On 3/7/23 15:24, Cédric Le Goater wrote: The parameters mimick a real 4GB eMMC, but it can be set to various sizes. Initially from Vincent Palatin Signed-off-by: Cédric Le Goater ---   hw/sd/sdmmc-internal.h |  97 +

Re: [RFC PATCH v4 1/5] accel/tcg: Avoid unnecessary call overhead from qemu_plugin_vcpu_mem_cb

Reviewed-by: Frank Chang Max Chou 於 2024年6月14日 週五 上午1:52寫道： > > If there are not any QEMU plugin memory callback functions, checking > before calling the qemu_plugin_vcpu_mem_cb function can reduce the > function call overhead. > > Signed-off-by: Max Chou > --- > accel/tcg/ldst_common.c.inc |

[PATCH v2] tests/qtest/fuzz/virtio_net_fuzz.c: fix virtio_net_fuzz_multi

The main loop is executed during flush_events(), where virtio error may occur. This behavior is legit and should not produce any crash report. But the test is waiting on used descriptors w/o a check, and, in case of error fails with message: "assertion timer != NULL failed". Thus, any invalid input

Re: [PATCH 5/5] s390x: Enable and document boot device fallback on panic

On 17/06/2024 01.44, Jared Rossi wrote: On 6/7/24 1:57 AM, Thomas Huth wrote: On 05/06/2024 16.48, Jared Rossi wrote: diff --git a/pc-bios/s390-ccw/s390-ccw.h b/pc-bios/s390-ccw/s390-ccw.h index c977a52b50..de3d1f0d5a 100644 --- a/pc-bios/s390-ccw/s390-ccw.h +++ b/pc-bios/s390-ccw/s390-ccw.

Re: [PATCH 5/5] s390x: Enable and document boot device fallback on panic

On 17/06/2024 16.49, Christian Borntraeger wrote: Am 05.06.24 um 15:37 schrieb Thomas Huth: On 29/05/2024 17.43, jro...@linux.ibm.com wrote: From: Jared Rossi On a panic during IPL (i.e. a device failed to boot) check for another device to boot from, as indicated by the presence of an unu

[PATCH] plugins/execlog.c: correct dump of registers values

Register values are dumped as 'sz' chunks of two nibbles in the execlog plugin, sz was 1 too big. Signed-off-by: Frédéric Pétrot --- contrib/plugins/execlog.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/contrib/plugins/execlog.c b/contrib/plugins/execlog.c index 371db97eb

Re: [PATCH v2 1/2] tests/avocado: use default amount of cores on sbsa-ref

On Thu, 20 Jun 2024 at 07:00, Marcin Juszkiewicz wrote: > > I was wondering why avocado tests passed with firmware which crashes > when anyone else is using it. > > Turned out that amount of cores matters. Have to find out why still. This commit message confuses me. It reads like "running with tw

Re: [PATCH] hw/net: Fix Coverity Issue for npcm-gmac

On Wed, 19 Jun 2024 at 10:13, Alex Bennée wrote: > > Nabih Estefan writes: > > > There is an extra `buf=` set that is not used by npcm-gmac. Remove it > > for coverity to be happy. By the way, Nabih, it looks like the mailing list received five copies of this patch email. You might want to look

[PATCH 01/10] target/i386: use cpu_cc_dst for CC_OP_POPCNT

It is the only POPCNT that computes ZF from one of the cc_op_* registers, but it uses cpu_cc_src instead of cpu_cc_dst like the others. Do not make it the odd one off. Signed-off-by: Paolo Bonzini --- target/i386/cpu.h | 2 +- target/i386/tcg/cc_helper.c | 2 +- target/i386/tcg/transl

[PATCH 06/10] target/i386: convert CMPXCHG8B/CMPXCHG16B to new decoder

This moves the last LOCK-enabled instructions to the new decoder. It is now possible to assume that PREFIX_LOCK gen_multi0F is called only after checking that LOCK was not specified. The gen_cmpxchg8b and gen_cmpxchg16b functions even have the correct prototype already; the only thing that needs

[PATCH 08/10] target/i386: list instructions still in translate.c

Group them so that it is easier to figure out which two-byte opcodes to tackle together. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/decode-new.c.inc | 31 +++ 1 file changed, 31 insertions(+) diff --git a/target/i386/tcg/decode-n

[PATCH 04/10] target/i386: try not to force EFLAGS computation for CC_OP_ADOX/ADCX

When computing the "other" flag (CF for CC_OP_ADOX, OF for CC_OP_ADCX), take into account that it is already in the right position of cpu_cc_src, just like for CC_OP_EFLAGS. There is no need to call gen_compute_eflags(). Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 4 1 f

[PATCH 03/10] target/i386: convert bit test instructions to new decoder

Signed-off-by: Paolo Bonzini --- target/i386/tcg/decode-new.h | 3 + target/i386/tcg/translate.c | 147 +- target/i386/tcg/decode-new.c.inc | 40 ++--- target/i386/tcg/emit.c.inc | 149 ++- 4 files changed, 181 insertio

[PATCH 09/10] target/i386: assert that cc_op* and pc_save are preserved

Now all decoding has been done before any code generation. There is no need anymore to save and restore cc_op* and pc_save but, for the time being, assert that this is indeed the case. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 12 +++-

Re: [PATCH 22/32] hw/sd: Add emmc_cmd_SEND_EXT_CSD() handler

On 3/7/23 15:24, Cédric Le Goater wrote: The parameters mimick a real 4GB eMMC, but it can be set to various sizes. Initially from Vincent Palatin Signed-off-by: Cédric Le Goater --- hw/sd/sdmmc-internal.h | 97 include/hw/sd/sd.h | 1 + hw/sd/sd

[PATCH 10/10] target/i386: remove gen_ext_tl

With the introduction of tcg_gen_ext_tl, most uses can be converted directly because they do not have a NULL destination. tcg_gen_ext_tl is able to drop no-ops like "tcg_gen_ext_tl(tcgv, tcgv, MO_TL)" just fine, and the only thing that gen_ext_tl was adding on top was avoiding the creation of a us

[PATCH 05/10] target/i386: decode address before going back to translate.c

There are now relatively few unconverted opcodes in translate.c (there are 13 of them including 8 for x87), and all of them have the same format with a mod/rm byte and no immediate. A good next step is to remove the early bail out to disas_insn_x87/disas_insn_old, instead giving these legacy trans

Re: [PATCH v2 1/2] tests/avocado: use default amount of cores on sbsa-ref

W dniu 20.06.2024 o 11:34, Peter Maydell pisze: On Thu, 20 Jun 2024 at 07:00, Marcin Juszkiewicz wrote: I was wondering why avocado tests passed with firmware which crashes when anyone else is using it. Turned out that amount of cores matters. Have to find out why still. This commit message

[PATCH 02/10] target/i386: give CC_OP_POPCNT low bits corresponding to MO_TL

Handle it like the other arithmetic cc_ops. This simplifies a bit the implementation of bit test instructions. Signed-off-by: Paolo Bonzini --- target/i386/cpu.h | 13 +++-- target/i386/tcg/translate.c | 3 +-- 2 files changed, 12 insertions(+), 4 deletions(-) diff --git a/t

[PATCH 07/10] target/i386: do not check PREFIX_LOCK in old-style decoder

It is already checked before getting there. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 26 -- 1 file changed, 8 insertions(+), 18 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index

[PATCH 00/10] target/i386: make decoding entirely table based

The trailing part of the previous series I sent; with fixes for BT/BTS/BTR/BTC, plus moving code generation of CMPXCHG8B/CMPXCHG16B to the new decoder. This way all LOCKable instructions are converted, and the patch "target/i386: do not check PREFIX_LOCK in old-style decoder" is correct. Sneak in

Re: [PATCH v2 1/2] tests/avocado: use default amount of cores on sbsa-ref

On Thu, 20 Jun 2024 at 10:55, Marcin Juszkiewicz wrote: > > W dniu 20.06.2024 o 11:34, Peter Maydell pisze: > > On Thu, 20 Jun 2024 at 07:00, Marcin Juszkiewicz > > wrote: > >> > >> I was wondering why avocado tests passed with firmware which > >> crashes when anyone else is using it. > >> > >> T

Re: [PATCH] hw/timer/a9gtimer: Handle QTest mode in a9_gtimer_get_current_cpu

On Tue, 18 Jun 2024 at 15:51, Philippe Mathieu-Daudé wrote: > > On 18/6/24 16:40, Zheyu Ma wrote: > > This commit updates the a9_gtimer_get_current_cpu() function to handle > > cases where QTest is enabled. When QTest is used, it returns 0 instead > > of dereferencing the current_cpu, which can be

Re: [PATCH] hw/usb/hcd-dwc2: Handle invalid address access in read and write functions

On Tue, 18 Jun 2024 at 22:33, Paul Zimmerman wrote: > > On Tue, Jun 18, 2024 at 1:37 PM Philippe Mathieu-Daudé > wrote: >> >> Hi Paul, >> >> On 18/6/24 20:58, Paul Zimmerman wrote: >> > On Tue, Jun 18, 2024 at 6:56 AM Zheyu Ma > > > wrote: >> > > >> > > This commit

[PATCH v3 1/2] tests/avocado: update firmware for sbsa-ref

Update firmware to have graphics card memory fix from EDK2 commit c1d1910be6e04a8b1a73090cf2881fb698947a6e: OvmfPkg/QemuVideoDxe: add feature PCD to remap framebuffer W/C Some platforms (such as SBSA-QEMU on recent builds of the emulator) only tolerate misaligned accesses to normal me

[PATCH v3 0/2] tests/avocado: make sbsa-ref working with >1 core

t amount of cores on sbsa-ref tests/avocado/machine_aarch64_sbsaref.py | 16 +++- 1 file changed, 7 insertions(+), 9 deletions(-) --- base-commit: 02d9c38236cf8c9826e5c5be61780c4444cb4ae0 change-id: 20240620-b4-new-firmware-177daccc9d76 Best regards, -- Marcin Juszkiewicz

[PATCH v3 2/2] tests/avocado: use default amount of cores on sbsa-ref

The version of the sbsa-ref EDK2 firmware we used to use in this test had a bug where it might make an unaligned access to the framebuffer, which causes a guest crash on newer versions of QEMU where we enforce the architectural requirement that unaligned accesses to Device memory should take an exc

Re: [PATCH 22/32] hw/sd: Add emmc_cmd_SEND_EXT_CSD() handler

On 20/6/24 09:23, Cédric Le Goater wrote: Hello On 6/19/24 7:40 PM, Philippe Mathieu-Daudé wrote: Hi, On 3/7/23 15:24, Cédric Le Goater wrote: The parameters mimick a real 4GB eMMC, but it can be set to various sizes. Initially from Vincent Palatin Signed-off-by: Cédric Le Goater ---   hw/

Re: [PATCH] hw/timer/a9gtimer: Handle QTest mode in a9_gtimer_get_current_cpu

On 20/6/24 12:10, Peter Maydell wrote: On Tue, 18 Jun 2024 at 15:51, Philippe Mathieu-Daudé wrote: On 18/6/24 16:40, Zheyu Ma wrote: This commit updates the a9_gtimer_get_current_cpu() function to handle cases where QTest is enabled. When QTest is used, it returns 0 instead of dereferencing t

[PATCH v3 0/3] Add boot-mode property for zynq

Add a way to update the boot-mode via machine properties. Changes for V2: Make boot-mode property work with string Fixed few code style issues Added zynq board doc. Changes for V3: Mentioned about zynq doc in MAINTAINERS file Stick to small case for mentioning boot modes in doc

[PATCH v3 2/3] hw/arm/xilinx_zynq: Add boot-mode property

Read boot-mode value as machine property and propagate that to SLCR.BOOT_MODE register. Signed-off-by: Sai Pavan Boddu Acked-by: Edgar E. Iglesias --- hw/arm/xilinx_zynq.c | 31 +++ 1 file changed, 31 insertions(+) diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_z

[PATCH v3 3/3] docs/system/arm: Add a doc for zynq board

Added the supported device list and an example command. Signed-off-by: Sai Pavan Boddu Reviewed-by: Edgar E. Iglesias --- MAINTAINERS | 1 + docs/system/arm/xlnx-zynq.rst | 47 +++ docs/system/target-arm.rst| 1 + 3 files changed, 49 inser

[PATCH v3 1/3] hw/misc/zynq_slcr: Add boot-mode property

boot-mode property sets user values into BOOT_MODE register, on hardware these are derived from board switches. Signed-off-by: Sai Pavan Boddu Reviewed-by: Edgar E. Iglesias --- hw/misc/zynq_slcr.c | 22 +- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/hw/mis

Re: [PATCH] target/arm/helper: Fix timer interrupt masking when HCR_EL2.E2H == 0

On Sat, 15 Jun 2024 at 19:56, Florian Lugou wrote: > > CNTHCTL_EL2 based masking of timer interrupts was introduced in > f6fc36deef6abcee406211f3e2f11ff894b87fa4. This masking was however > effective no matter whether EL2 was enabled in the current security > state or not, contrary to arm specific

Re: [PATCH v3] hw/gpio/aspeed: Add reg_table_size to AspeedGPIOClass

Hi, On 19/6/24 20:36, Zheyu Ma wrote: ASan detected a global-buffer-overflow error in the aspeed_gpio_read() function. This issue occurred when reading beyond the bounds of the reg_table. To enhance the safety and maintainability of the Aspeed GPIO code, this commit introduces a reg_table_size

Re: [RFC PATCH v3 2/5] rust: add bindgen step as a meson dependency

Manos Pitsidianakis writes: > Add mechanism to generate rust hw targets that depend on a custom > bindgen target for rust bindings to C. > > This way bindings will be created before the rust crate is compiled. > > The bindings will end up in BUILDDIR/{target}-generated.rs and have the same > nam

Re: [PATCH] hw/riscv/virt.c: Make block devices default to virtio

On 6/20/24 3:47 AM, Sunil V L wrote: RISC-V virt is currently missing default type for block devices. Without this being set, proper backend is not created when option like -cdrom is used. So, make the virt board's default block device type be IF_VIRTIO similar to other architectures. We also

Re: [PATCH 0/4] hw/m68k/virt: Add some devices

Le 27/05/2024 à 19:15, Jiaxun Yang a écrit : Hi all, This series added some devices that I found lacking when I was trying to port U-Boot to m68k virt machine. I have a branch with a bootloader based on petitboot. See https://github.com/vivier/qemu-m68k/commits/m68k-virt/ Thanks Laurent P

Re: [PATCH v4 00/15] vfio: VFIO migration support with vIOMMU

[ ... ] * [v4] vfio: VFIO migration support with vIOMMU https://lore.kernel.org/qemu-devel/20230622214845.3980-1-joao.m.mart...@oracle.com/     Refreshed the patchset on upstream and pushed on vfio-9.1 branch. /me nods Probably deserves an item on the list too related to this subject of v

Re: [RFC PATCH v3 2/5] rust: add bindgen step as a meson dependency

Manos Pitsidianakis writes: > Add mechanism to generate rust hw targets that depend on a custom > bindgen target for rust bindings to C. > > This way bindings will be created before the rust crate is compiled. > > The bindings will end up in BUILDDIR/{target}-generated.rs and have the same > nam

Re: [RFC PATCH v3 2/5] rust: add bindgen step as a meson dependency

On Thu, Jun 20, 2024 at 1:10 PM Alex Bennée wrote: > > +# FIXME: These are the latest stable versions, refine to actual minimum > > ones. > > +msrv = { > > + 'rustc': '1.79.0', > > + 'cargo': '1.79.0', > > + 'bindgen': '0.69.4', > > +} > > So for Debian Bookworm this comes out as: > > msrv =

Re: [PATCH v3] hw/gpio/aspeed: Add reg_table_size to AspeedGPIOClass

@@ -75,6 +75,7 @@ struct AspeedGPIOClass {   uint32_t nr_gpio_pins;   uint32_t nr_gpio_sets;   const AspeedGPIOReg *reg_table; +    uint32_t reg_table_size;   }; - "reg_table_size" is a number of registers, using s/size/count/ might   be clearer. - No point in specifying 32-bit,

[PATCH 0/6] host/i386: allow configuring the x86-64 baseline

As discussed, add a Meson option to configure which x86-64 instruction set to use. QEMU will now default to x86-64-v1 + cmpxchg16b for 64-bit builds (that corresponds to a Pentium 4 for 32-bit builds). The baseline can be tuned down to Pentium Pro for 32-bit builds (with -Dx86_version=0), or up a

[PATCH 2/6] Revert "host/i386: assume presence of SSSE3"

This reverts commit 433cd6d94a8256af70a5200f236dc8047c3c1468. The x86-64 instruction set can now be tuned down to x86-64 v1 or i386 Pentium Pro. Signed-off-by: Paolo Bonzini --- util/cpuinfo-i386.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/util/cpuinfo-i386.c b/util

[PATCH 4/6] meson: allow configuring the x86-64 baseline

Signed-off-by: Paolo Bonzini --- meson.build | 41 --- meson_options.txt | 3 +++ scripts/meson-buildoptions.sh | 3 +++ 3 files changed, 39 insertions(+), 8 deletions(-) diff --git a/meson.build b/meson.build index 97e00d6f59b..6e6

[PATCH 5/6] meson: remove dead optimization option

Signed-off-by: Paolo Bonzini --- meson.build | 13 - meson_options.txt | 2 -- 2 files changed, 15 deletions(-) diff --git a/meson.build b/meson.build index 6e694ecd9fe..54e6b09f4fb 100644 --- a/meson.build +++ b/meson.build @@ -2874,18 +2874,6 @@ config_host_data.set('CONFIG_

[PATCH 1/6] Revert "host/i386: assume presence of POPCNT"

This reverts commit 45ccdbcb24baf99667997fac5cf60318e5e7db51. The x86-64 instruction set can now be tuned down to x86-64 v1 or i386 Pentium Pro. Signed-off-by: Paolo Bonzini --- host/include/i386/host/cpuinfo.h | 1 + tcg/i386/tcg-target.h| 5 +++-- util/cpuinfo-i386.c |

[PATCH 6/6] meson: require compiler support for chosen x86-64 instructions

Signed-off-by: Paolo Bonzini --- meson.build | 2 ++ 1 file changed, 2 insertions(+) diff --git a/meson.build b/meson.build index 54e6b09f4fb..c5360fbd299 100644 --- a/meson.build +++ b/meson.build @@ -2863,6 +2863,7 @@ have_cpuid_h = cc.links(''' config_host_data.set('CONFIG_CPUID_H', have_cpu

[PATCH 3/6] Revert "host/i386: assume presence of SSE2"

This reverts commit b18236897ca15c3db1506d8edb9a191dfe51429c. The x86-64 instruction set can now be tuned down to x86-64 v1 or i386 Pentium Pro. Signed-off-by: Paolo Bonzini --- host/include/i386/host/cpuinfo.h | 1 + util/bufferiszero.c | 4 ++-- util/cpuinfo-i386.c |

Re: [PATCH] vfio: container: Fix missing allocation of VFIOSpaprContainer

Shivaprasad, On 5/9/24 9:14 PM, Shivaprasad G Bhat wrote: The commit 6ad359ec29 "(vfio/spapr: Move prereg_listener into spapr container)" began to use the newly introduced VFIOSpaprContainer structure. After several refactors, today the container_of(container, VFIOSpaprContainer, ABC) is used w

Re: [PATCH v3 09/11] tests/migration-tests: migration_event_wait()

Peter Xu writes: > Introduce a small helper to wait for a migration event, generalized from > the incoming migration path. Make the helper easier to use by allowing it > to keep waiting until the expected event is received. > > Signed-off-by: Peter Xu Reviewed-by: Fabiano Rosas

Re: [PATCH v3 10/11] tests/migration-tests: Verify postcopy-recover-setup status

Peter Xu writes: > Making sure the postcopy-recover-setup status is present in the postcopy > failure unit test. Note that it only applies to src QEMU not dest. > > This also introduces the tiny but helpful migration_event_wait() helper. Not anymore. I'll drop this line. Reviewed-by: Fabiano R

Re: [PATCH v3 08/11] tests/migration-tests: Always enable migration events

Peter Xu writes: > Libvirt should always enable it, so it'll be nice qtest also cover that for > all tests on both sides. migrate_incoming_qmp() used to enable it only on > dst, now we enable them on both, as we'll start to sanity check events even > on the src QEMU. > > We'll need to leave the

Re: [RFC PATCH v3 1/5] build-sys: Add rust feature option

On 6/19/24 22:13, Manos Pitsidianakis wrote: Add options for Rust in meson_options.txt, meson.build, configure to prepare for adding Rust code in the followup commits. `rust` is a reserved meson name, so we have to use an alternative. `with_rust` was chosen. A cargo_wrapper.py script is added t

How to use designware-root-port and designware-root-host devices ?

Hi all, My question may sound stupid, however... Currently I'm trying to make available designware-root-{port,host} devices in linux when I run it in qemu. I try the following way to run: qemu-system-arm -M virt -m 2G \ -kernel images/Image \ -append "rootwait root=/dev/vda ro" \

Re: [PATCH] hw/timer/a9gtimer: Handle QTest mode in a9_gtimer_get_current_cpu

On Thu, Jun 20, 2024 at 12:25:51PM +0200, Philippe Mathieu-Daudé wrote: > On 20/6/24 12:10, Peter Maydell wrote: > > On Tue, 18 Jun 2024 at 15:51, Philippe Mathieu-Daudé > > wrote: > > > > > > On 18/6/24 16:40, Zheyu Ma wrote: > > > > This commit updates the a9_gtimer_get_current_cpu() function

[PATCH 1/2] migration: Implement dirty ring

This commit implements the dirty ring as an alternative dirty tracking method to the dirty bitmap. While the dirty ring has already been implemented in accel/kvm using KVM's dirty ring, it was designed to set bits in the ramlist and ramblock bitmap. This commit introduces a new dirty ring to repla

[PATCH 2/2] qtest/migration: Add dirty ring tests

This commit adds tests for migration using the dirty ring. To avoid confusion with KVM's dirty ring, use_dirty_ring has been changed to use_kvm_dirty_ring, and use_qemu_dirty_ring has been added. Signed-off-by: Shota Imamura --- tests/qtest/migration-test.c | 78 -

[PATCH 0/2] Implement dirty ring for pre-copy migration

This patch series introduces the dirty ring as an additional method for dirty tracking, alongside the existing dirty bitmap. Shota Imamura (2): migration: Implement dirty ring qtest/migration: Add dirty ring tests accel/kvm/kvm-all.c| 36 - include/exec/ram_addr.h

Re: [PATCH v4 2/5] ppc/pnv: Extend SPI model

On 20-06-2024 03:44, Miles Glenn wrote: Hi Chalapathi, I can't say I have a great understanding of this IBM SPI controller, but I did find some places for improvement, mostly dealing with the use of "magic numbers" throughout the code. Please see comments below. Thanks, Glenn Hello Glenn,

Re: [PATCH 09/13] qapi: convert "Note" sections to plain rST

Markus Armbruster writes: > John Snow writes: [...] >> diff --git a/qga/qapi-schema.json b/qga/qapi-schema.json >> index b3de1fb6b3a..57598331c5c 100644 >> --- a/qga/qapi-schema.json >> +++ b/qga/qapi-schema.json [...] >> @@ -631,8 +632,8 @@ >> # Errors: >> # - If hybrid suspend is not

Re: [RFC PATCH v3 1/5] build-sys: Add rust feature option

Manos Pitsidianakis writes: > Add options for Rust in meson_options.txt, meson.build, configure to > prepare for adding Rust code in the followup commits. > > `rust` is a reserved meson name, so we have to use an alternative. > `with_rust` was chosen. > > A cargo_wrapper.py script is added that i

Re: [PATCH v2 06/12] tests/data/acpi/virt: Move ACPI tables under aarch64

On Wed, 19 Jun 2024 23:30:35 +0530 Sunil V L wrote: > On Wed, Jun 19, 2024 at 05:20:50AM -0400, Michael S. Tsirkin wrote: > > On Wed, Jun 19, 2024 at 11:17:43AM +0200, Igor Mammedov wrote: > > > On Mon, 27 May 2024 20:46:29 +0530 > > > Sunil V L wrote: > > > > > > > On Mon, May 27, 2024 at

Re: [PATCH 09/13] qapi: convert "Note" sections to plain rST

John Snow writes: > We do not need a dedicated section for notes. By eliminating a specially > parsed section, these notes can be treated as normal rST paragraphs in > the new QMP reference manual, and can be placed and styled much more > flexibly. > > Convert all existing "Note" and "Notes" sect

Re: [PATCH] target/arm/helper: Fix timer interrupt masking when HCR_EL2.E2H == 0

On Thu, Jun 20, 2024 at 11:43:17AM +0100, Peter Maydell wrote: > On Sat, 15 Jun 2024 at 19:56, Florian Lugou > wrote: > > > > CNTHCTL_EL2 based masking of timer interrupts was introduced in > > f6fc36deef6abcee406211f3e2f11ff894b87fa4. This masking was however > > effective no matter whether EL2

[PATCH] docs: add precision about capstone for execlog plugin

Some people are wondering why they get an empty string as disassembly. Most of the time, they configured QEMU without Capstone support. Let's document this behaviour to help users. Signed-off-by: Alexandre Iooss --- docs/devel/tcg-plugins.rst | 4 +++- 1 file changed, 3 insertions(+), 1 deletion

Re: [PATCH-for-9.0? 0/2] hw/sd/sdcard: Avoid OOB in sd_read_byte()

On 8/4/24 16:17, Philippe Mathieu-Daudé wrote: Since this is Fix day, I went over this old bug: https://gitlab.com/qemu-project/qemu/-/issues/487 It happens to be a QEMU implementation detail not really related to the spec. Philippe Mathieu-Daudé (2): hw/sd/sdcard: Avoid OOB in sd_read_byte()

Re: [RFC PATCH v3 2/5] rust: add bindgen step as a meson dependency

On 6/19/24 13:13, Manos Pitsidianakis wrote: +# FIXME: These are the latest stable versions, refine to actual minimum ones. +msrv = { + 'rustc': '1.79.0', + 'cargo': '1.79.0', + 'bindgen': '0.69.4', +} A note for other rust newbies: These versions are pretty darn close to actual minima. Ub

[PATCH v4] hw/gpio/aspeed: Add reg_table_count to AspeedGPIOClass

ASan detected a global-buffer-overflow error in the aspeed_gpio_read() function. This issue occurred when reading beyond the bounds of the reg_table. To enhance the safety and maintainability of the Aspeed GPIO code, this commit introduces a reg_table_count member to the AspeedGPIOClass structure.

Re: [PATCH v3] hw/gpio/aspeed: Add reg_table_size to AspeedGPIOClass

On Thu, Jun 20, 2024 at 2:35 PM Cédric Le Goater wrote: > > >> @@ -75,6 +75,7 @@ struct AspeedGPIOClass { > >> uint32_t nr_gpio_pins; > >> uint32_t nr_gpio_sets; > >> const AspeedGPIOReg *reg_table; > >> +uint32_t reg_table_size; > >> }; > > > > - "reg_table_size" is a num

Re: [PATCH v4 5/5] iotests: add backup-discard-source

On 13.06.24 11:02, Kevin Wolf wrote: Am 12.06.2024 um 21:21 hat Vladimir Sementsov-Ogievskiy geschrieben: On 11.06.24 20:49, Kevin Wolf wrote: Am 13.03.2024 um 16:28 hat Vladimir Sementsov-Ogievskiy geschrieben: Add test for a new backup option: discard-source. Signed-off-by: Vladimir Sements

Re: [PATCH v4] hw/gpio/aspeed: Add reg_table_count to AspeedGPIOClass

On 20/6/24 16:02, Zheyu Ma wrote: ASan detected a global-buffer-overflow error in the aspeed_gpio_read() function. This issue occurred when reading beyond the bounds of the reg_table. To enhance the safety and maintainability of the Aspeed GPIO code, this commit introduces a reg_table_count memb

Re: [RFC PATCH v4 1/5] accel/tcg: Avoid unnecessary call overhead from qemu_plugin_vcpu_mem_cb

Max Chou writes: > If there are not any QEMU plugin memory callback functions, checking > before calling the qemu_plugin_vcpu_mem_cb function can reduce the > function call overhead. > > Signed-off-by: Max Chou Queued this patch to maintainer/june-2024-omnibus, thanks. -- Alex Bennée Virtuali

Re: [PATCH] linux-user: open_self_stat: Implement num_threads

"Fabio D'Urso" writes: > The num_threads field reports the total number of threads in the > process. In QEMU, this is equal to the number of CPU instances. > > Signed-off-by: Fabio D'Urso > --- > linux-user/syscall.c | 10 ++ > 1 file changed, 10 insertions(+) > > diff --git a/linux-use

[PATCH 2/2] iotests/backup-discard-source: don't use actual-size

Relying on disk usage is bad thing, and test just doesn't work on XFS. Let's instead add a dirty bitmap to track writes to test image. Signed-off-by: Vladimir Sementsov-Ogievskiy --- .../qemu-iotests/tests/backup-discard-source | 29 +-- 1 file changed, 20 insertions(+), 9 dele

[PATCH 1/2] iotests/backup-discard-source: convert size variable to be int

Make variable reusable in code for checks. Don't care to change "512 * 1024" invocations as they will be dropped in the next commit. Signed-off-by: Vladimir Sementsov-Ogievskiy --- tests/qemu-iotests/tests/backup-discard-source | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-)

[PATCH 0/2] fix backup-discard-source test for XFS

Hi all! As Kevin reported, the test doesn't work on XFS, as it rely on disk usage. Fix it, switching to dirty bitmap for guest write tracking. Vladimir Sementsov-Ogievskiy (2): iotests/backup-discard-source: convert size variable to be int iotests/backup-discard-source: don't use actual-size

Re: [PATCH 04/13] qapi/parser: preserve indentation in QAPIDoc sections

On Wed, Jun 19, 2024, 8:03 AM Markus Armbruster wrote: > John Snow writes: > > > Change get_doc_indented() to preserve indentation on all subsequent text > > lines, and create a compatibility dedent() function for qapidoc.py to > > remove that indentation. This is being done for the benefit of a

Re: [PATCH 4/6] meson: allow configuring the x86-64 baseline

On Thu, Jun 20, 2024 at 03:02:52PM +0200, Paolo Bonzini wrote: > Signed-off-by: Paolo Bonzini > --- > meson.build | 41 --- > meson_options.txt | 3 +++ > scripts/meson-buildoptions.sh | 3 +++ > 3 files changed, 39 insertions(+), 8

Re: [PATCH 6/6] meson: require compiler support for chosen x86-64 instructions

On Thu, Jun 20, 2024 at 03:02:54PM +0200, Paolo Bonzini wrote: > Signed-off-by: Paolo Bonzini > --- > meson.build | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/meson.build b/meson.build > index 54e6b09f4fb..c5360fbd299 100644 > --- a/meson.build > +++ b/meson.build > @@ -2863,6 +286

Re: [PATCH 01/10] target/i386: use cpu_cc_dst for CC_OP_POPCNT

On 6/20/24 02:54, Paolo Bonzini wrote: It is the only POPCNT that computes ZF from one of the cc_op_* registers, but it uses cpu_cc_src instead of cpu_cc_dst like the others. Do not make it the odd one off. Signed-off-by: Paolo Bonzini --- target/i386/cpu.h | 2 +- target/i386/tcg/

Re: [PATCH 4/6] meson: allow configuring the x86-64 baseline

On Thu, Jun 20, 2024 at 4:55 PM Daniel P. Berrangé wrote: > Any particular reason you chose to list various instructions individually > rather than just ask GCC for the full ABI ? I'd think all of the above > condences down to just To avoid that the default ('1') forces a lower level than the com

Re: [PATCH 04/13] qapi/parser: preserve indentation in QAPIDoc sections

John Snow writes: > On Wed, Jun 19, 2024, 8:03 AM Markus Armbruster wrote: > >> John Snow writes: >> >> > Change get_doc_indented() to preserve indentation on all subsequent text >> > lines, and create a compatibility dedent() function for qapidoc.py to >> > remove that indentation. This is bei

Re: [PATCH 6/6] meson: require compiler support for chosen x86-64 instructions

On Thu, Jun 20, 2024 at 5:01 PM Daniel P. Berrangé wrote: > > config_host_data.set('CONFIG_AVX2_OPT', get_option('avx2') \ > > + .enable_auto_if(get_option('x86_version') >= '3') \ > >.require(have_cpuid_h, error_message: 'cpuid.h not available, cannot > > enable AVX2') \ > >.require(cc

Re: [PATCH 3/3] exec: use char* for pointer arithmetic

Daniel P. Berrangé writes: > On Tue, Jun 18, 2024 at 04:05:36PM -0700, Richard Henderson wrote: >> On 6/18/24 15:46, Roman Kiryanov wrote: >> > @@ -2839,7 +2839,7 @@ static inline uint8_t >> > address_space_ldub_cached(MemoryRegionCache *cache, >> > { >> > assert(addr < cache->len); >> >

Re: [PATCH 02/10] target/i386: give CC_OP_POPCNT low bits corresponding to MO_TL

On 6/20/24 02:54, Paolo Bonzini wrote: Handle it like the other arithmetic cc_ops. This simplifies a bit the implementation of bit test instructions. Signed-off-by: Paolo Bonzini --- target/i386/cpu.h | 13 +++-- target/i386/tcg/translate.c | 3 +-- 2 files changed, 12 i

Re: [PATCH 04/13] qapi/parser: preserve indentation in QAPIDoc sections

On Thu, Jun 20, 2024, 11:07 AM Markus Armbruster wrote: > John Snow writes: > > > On Wed, Jun 19, 2024, 8:03 AM Markus Armbruster > wrote: > > > >> John Snow writes: > >> > >> > Change get_doc_indented() to preserve indentation on all subsequent > text > >> > lines, and create a compatibility

Re: [PATCH 03/10] target/i386: convert bit test instructions to new decoder

On 6/20/24 02:54, Paolo Bonzini wrote: Signed-off-by: Paolo Bonzini --- target/i386/tcg/decode-new.h | 3 + target/i386/tcg/translate.c | 147 +- target/i386/tcg/decode-new.c.inc | 40 ++--- target/i386/tcg/emit.c.inc | 149 ++

[PATCH v2 06/12] sysemu: generalise qtest_warp_clock as qemu_clock_advance_virtual_time

Move the key functionality of moving time forward into the clock sub-system itself. This will allow us to plumb in time control into plugins. Signed-off-by: Pierrick Bouvier Signed-off-by: Alex Bennée Message-Id: <20240530220610.1245424-4-pierrick.bouv...@linaro.org> -- v2 - use target_ns in

[PATCH v2 01/12] include/exec: add missing include guard comment

Message-Id: <20240612153508.1532940-2-alex.ben...@linaro.org> Reviewed-by: Pierrick Bouvier Signed-off-by: Alex Bennée --- include/exec/gdbstub.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/exec/gdbstub.h b/include/exec/gdbstub.h index eb14b91139..008a92198a 10064

[PATCH v2 00/12] maintainer updates pre-PR (gdbstub, plugins, time control)

Hi, This is the current state of my maintainer trees. The gdbstub patches are just minor clean-ups. The main feature this brings in is the ability for plugins to control time. This has been discussed before but represents the first time plugins can "control" the execution of the core. The idea wou

[PATCH v2 09/12] plugins: add migration blocker

If the plugin in controlling time there is some state that might be missing from the plugin tracking it. Migration is unlikely to work in this case so lets put a migration blocker in to let the user know if they try. Signed-off-by: Alex Bennée Suggested-by: "Dr. David Alan Gilbert" --- plugins/

[PATCH v2 10/12] contrib/plugins: add Instructions Per Second (IPS) example for cost modeling

From: Pierrick Bouvier This plugin uses the new time control interface to make decisions about the state of time during the emulation. The algorithm is currently very simple. The user specifies an ips rate which applies per core. If the core runs ahead of its allocated execution time the plugin s

[PATCH v2 08/12] plugins: add time control API

Expose the ability to control time through the plugin API. Only one plugin can control time so it has to request control when loaded. There are probably more corner cases to catch here. Signed-off-by: Pierrick Bouvier [AJB: tweaked user-mode handling, merged QEMU_PLUGIN_API fix] Signed-off-by: Al

[PATCH v2 02/12] gdbstub: move enums into separate header

This is an experiment to further reduce the amount we throw into the exec headers. It might not be as useful as I initially thought because just under half of the users also need gdbserver_start(). Message-Id: <20240612153508.1532940-3-alex.ben...@linaro.org> Reviewed-by: Pierrick Bouvier Signed-

[PATCH v2 04/12] sysemu: add set_virtual_time to accel ops

We are about to remove direct calls to individual accelerators for this information and will need a central point for plugins to hook into time changes. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Pierrick Bouvier Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson Message-Id: <20

[PATCH v2 05/12] qtest: use cpu interface in qtest_clock_warp

This generalises the qtest_clock_warp code to use the AccelOps handlers for updating its own sense of time. This will make the next patch which moves the warp code closer to pure code motion. From: Alex Bennée Acked-by: Thomas Huth Signed-off-by: Pierrick Bouvier Signed-off-by: Alex Bennée Mes

[PATCH v2 11/12] plugins: fix inject_mem_cb rw masking

From: Pierrick Bouvier These are not booleans, but masks. Issue found by Richard Henderson. Fixes: f86fd4d8721 ("plugins: distinct types for callbacks") Signed-off-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240612195147.93121-3-pierrick.bouv...@linaro.org> Signed-off-

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