On Thu, Mar 07, 2024 at 11:33:25AM +1000, Alistair Francis wrote:
> On Thu, Mar 7, 2024 at 4:59 AM Daniel Henrique Barboza
> wrote:
> >
> > Hi,
> >
> > This patch break check-qtest, most specifically 'bios-table'test', for
> > aarch64.
> > I found this while running riscv-to-apply.next in the Git
> On 06-Mar-2024, at 12:11, Ani Sinha wrote:
>
>
>
> On Tue, 5 Mar 2024, Igor Mammedov wrote:
>
>> currently smbios_entry_add() preserves internally '-smbios type='
>> options but tables provided with '-smbios file=' are stored directly
>> into blob that eventually will be exposed to VM. An
On 06/03/2024 10.54, Zhao Liu wrote:
From: Zhao Liu
The q35 machine is trying to support up to 4096 vCPUs [1], so it's
necessary to bump max_cpus in test-smp-parse to 4096 to cover the
topological needs of future machines.
[1]:
https://lore.kernel.org/qemu-devel/20240228143351.3967-1-anisi...
On 06/03/2024 10.54, Zhao Liu wrote:
From: Zhao Liu
Since s390 machine supports both "drawers" and "books" in -smp, add the
"drawers" and "books" combination test case to match the actual topology
usage scenario.
Signed-off-by: Zhao Liu
Tested-by: Xiaoling Song
---
tests/unit/test-smp-pars
On 06/03/2024 10.54, Zhao Liu wrote:
From: Zhao Liu
The support for "parameter=0" SMP configurations is removed, and QEMU
returns error for those cases.
So add the related test cases to ensure parameters can't accept 0.
Signed-off-by: Zhao Liu
---
tests/unit/test-smp-parse.c | 92 +
On 06/03/2024 10.53, Zhao Liu wrote:
From: Zhao Liu
Currentlt, it was allowed for users to specify the unsupported
s/Currentlt/Currently/
topology parameter as "1". For example, x86 PC machine doesn't
support drawer/book/cluster topology levels, but user could specify
"-smp drawers=1,books=
On 3/7/2024 8:48 AM, Alistair Francis wrote:
> On Thu, Mar 7, 2024 at 5:13 AM Atish Kumar Patra wrote:
>>
>> On Wed, Mar 6, 2024 at 4:56 AM Wu, Fei wrote:
>>>
>>> On 3/6/2024 8:19 AM, Alistair Francis wrote:
On Mon, Mar 4, 2024 at 8:28 PM Fei Wu wrote:
>
> The RISC-V Server Platform
On 3/5/2024 5:10 PM, Isaku Yamahata wrote:
On Thu, Feb 29, 2024 at 01:36:29AM -0500,
Xiaoyao Li wrote:
From: Chao Peng
When geeting KVM_EXIT_MEMORY_FAULT exit, it indicates userspace needs to
do the memory conversion on the RAMBlock to turn the memory into desired
attribute, i.e., private/sh
> -Original Message-
> From: Fabiano Rosas
> Sent: Wednesday, March 6, 2024 7:56 PM
> To: Liu, Yuan1 ; pet...@redhat.com
> Cc: qemu-devel@nongnu.org; hao.xi...@bytedance.com;
> bryan.zh...@bytedance.com; Zou, Nanhai
> Subject: RE: [PATCH v4 3/8] configure: add --enable-qpl build option
>
Hi Thomas,
> > /*
> > - * config: -smp 512
> > + * config: -smp 4096
> >* The test machine should tweak the supported max CPUs to
> > - * 511 (MAX_CPUS - 1) for testing.
> > + * 4095 (MAX_CPUS - 1) for testing.
> >*/
> > -.c
On Thu, Mar 07, 2024 at 07:22:10AM +0100, Thomas Huth wrote:
> Date: Thu, 7 Mar 2024 07:22:10 +0100
> From: Thomas Huth
> Subject: Re: [PATCH 02/14] hw/core/machine-smp: Deprecate unsupported
> "parameter=1" SMP configurations
>
> On 06/03/2024 10.53, Zhao Liu wrote:
> > From: Zhao Liu
> >
> >
Hi Philippe,
> In a previous community call, Zhao asked us how his work will scale
> in the heterogeneous context.
>
> My first idea is CPUs must belong to a cluster.
Thank you for considering this!
At present, cluster is a arch-specific topology level used by ARM.
So maybe we need call this ab
On 3/6/24 21:51, Philippe Mathieu-Daudé wrote:
On 6/3/24 14:34, Cédric Le Goater wrote:
It will simplify the changes coming after.
Signed-off-by: Cédric Le Goater
---
hw/vfio/common.c | 22 +-
1 file changed, 13 insertions(+), 9 deletions(-)
diff --git a/hw/vfio/common.
Hi Philippe,
On 3/6/24 21:44, Philippe Mathieu-Daudé wrote:
> On 6/3/24 21:32, Eric Auger wrote:
>> We are missing an entry for the virtio-iommu-pci device. Add the
>> information on which machine it is currently supported and document
>> the new granule option.
>>
>> Signed-off-by: Eric Auger
>>
On 3/6/24 21:45, Philippe Mathieu-Daudé wrote:
> On 6/3/24 21:32, Eric Auger wrote:
>> aw-bits is a new option that allows to set the bit width of
>> the input address range. This value will be used as a default for
>> the device config input_range.end. By default it is set to 64 bits
>> which i
On 3/6/2024 9:26 PM, Wu, Fei wrote:
> On 3/5/2024 1:58 PM, Wu, Fei wrote:
>> On 3/5/2024 3:43 AM, Daniel Henrique Barboza wrote:
>>>
>>>
>>> On 3/4/24 07:25, Fei Wu wrote:
The harts requirements of RISC-V server platform [1] require RVA23 ISA
profile support, plus Sv48, Svadu, H, Sscofmpf
When we use qemu tcg simulation, the page size of bios is 4KB.
When using the level 2 super large page (page size is 1G) to create the page
table,
it is found that the content of the corresponding address space is abnormal,
resulting in the bios can not start the operating system and graphical
in
When we use qemu tcg simulation, the page size of bios is 4KB.
When using the level 2 super large page (page size is 1G) to create the page
table,
it is found that the content of the corresponding address space is abnormal,
resulting in the bios can not start the operating system and graphical
in
On 3/6/24 21:48, Philippe Mathieu-Daudé wrote:
> On 6/3/24 21:32, Eric Auger wrote:
>> Document the new aw-bits option.
>>
>> Signed-off-by: Eric Auger
>> Reviewed-by: Cédric Le Goater
>>
>> ---
>>
>> v4 -> v5
>> - tweek the aw-bits option description according to Cédric's
>> suggestion
>>
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