The contents of the FIFO should only be copied to cmdfifo for ESP commands that
are sending data to the SCSI bus, which are the SEL_* commands and the TI
command. Otherwise any incoming data should be held in the FIFO as normal.
This fixes booting of really old 32-bit SPARC Linux kernels such as A
With the latest changes this condition cannot occur anymore and so the logic
can be completely removed.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 9 -
1 file changed, 9 deletions(-)
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
index ec82097a01..3db90c9ab7 100644
--- a/hw/scsi/es
Detect the case where the guest underflows TC by requesting a DMA transfer which
is larger than the available data. If this case is detected, immediately
complete the SCSI request and handle any remaining FIFO accesses in the STATUS
phase by raising INTR_BS once the FIFO is below the threshold.
No
Rather than wait for the FIFO to fill up before calling the PDMA callback, push
that logic directly into the from_device logic in do_dma_pdma_cb().
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/hw/scsi/esp.c b/hw/scs
This helps to simplify esp_reg_write() and potentially allows for a 2-level
deep FIFO to be implemented in future.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 177 ++
1 file changed, 92 insertions(+), 85 deletions(-)
diff --git a/hw/scsi/e
No change to the condition itself, other than to clarify that esp_dma_done()
must be called when TC is zero.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 16 +---
1 file changed, 5 insertions(+), 11 deletions(-)
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
index dc515e6435..967
Make use of this new function in all places where the SCSI phase bits are
manually masked from the ESP_RSTAT register.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 23 ++-
1 file changed, 14 insertions(+), 9 deletions(-)
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
inde
Both esp_raise_irq() and esp_lower_irq() check the STAT_INT bit in ESP_RSTAT
to ensure that the IRQ is raised or lowered if its state changes. When reading
ESP_RINTR, esp_lower_irq() was being called *after* ESP_RSTAT had been
cleared meaning that STAT_INT was already clear, and so if STAT_INT was
Now that the DMA logic is identical between do_dma_pdma_cb() and esp_do_dma()
we can replace do_dma_pdma_cb() with esp_do_dma().
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 138 +-
1 file changed, 1 insertion(+), 137 deletions(-)
diff --gi
This is so that PDMA transfers can be performend by esp_do_dma() as well as
do_dma_pdma_cb().
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
index 14c6d05253..65b4baab83 100644
--- a/hw/scsi/esp.c
+++ b
Currently do_cmd is used to determine whether MESSAGE OUT and COMMAND phase data
is being accumulated in cmdfifo. Update esp_do_dma() to check directly for these
two SCSI phases instead.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 8
1 file changed, 4 insertions(+), 4 deletions(
This field is currently used to handle deferred interrupts for the DATA IN phase
but the code will soon be updated to do the same for the DATA OUT phase.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 8
include/hw/scsi/esp.h | 2 +-
2 files changed, 5 insertions(+), 5 dele
Currently do_cmd is used to determine whether MESSAGE OUT and COMMAND phase data
is being accumulated in cmdfifo. Update esp_do_dma() to check directly for these
two SCSI phases instead.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 13 +
1 file changed, 5 insertions(+), 8 dele
The existing check for TC == 0 is only valid during a TI command.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 32 ++--
1 file changed, 18 insertions(+), 14 deletions(-)
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
index f8c20d0584..9f787d12a8 100644
--- a/hw/sc
This allows the removal of duplicate logic shared between the two
implementations.
Note that we restrict esp_raise_drq() to PDMA to help reduce the log verbosity
for normal DMA.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff
This can now be done using the existing logic in esp_do_dma() and
do_dma_pdma_cb().
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 22 ++
1 file changed, 10 insertions(+), 12 deletions(-)
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
index 9f787d12a8..3cf8b2b4eb 100644
--
Currently do_cmd is used to determine whether MESSAGE OUT and COMMAND phase data
is being accumulated in cmdfifo. Update esp_do_dma() to check directly for these
two SCSI phases instead.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 8
1 file changed, 4 insertions(+), 4 deletions(
This is to allow the logic to be moved during the next commit.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 51 +--
1 file changed, 29 insertions(+), 22 deletions(-)
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
index dd6bf6f033..97e48e9526 10
The IRQ represented by irq_data is actually the DRQ (DMA request) line so rename
it accordingly.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 8
include/hw/scsi/esp.h | 2 +-
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
inde
This is the behaviour documented in the datasheet and allows the state machine
to correctly process multiple consecutive TI commands.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 8
1 file changed, 8 insertions(+)
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
index 4c1ca63a57..ccb8
This series has involved rewriting and/or updating a considerable part of the
ESP
emulation so update the copyright in esp.c to reflect this.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
index b8762d5ee0..590
Certain versions of MacOS send the first 5 bytes of the CDB using DMA and then
send the last byte of the CDB by writing to the FIFO. Update the non-DMA state
machine to detect the end of the CDB and execute the SCSI command using similar
logic as that which already exists for transferring the remai
This brings DATA OUT transfers in line with DATA IN transfers by ensuring that
the guest visible function complete interrupt is only set once the SCSI layer
has returned.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 35 ++-
1 file changed, 18 insertions(+),
This variable can be replaced by the existing len variable.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
index ae65c2ef37..8ef6d203e0 100644
--- a/hw/scsi/esp.c
+++ b/hw/scsi/esp.c
@@ -
Currently only the DATA IN and DATA OUT phases are supported.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 19 ---
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
index 67d1d39db2..f6d05b0de7 100644
--- a/hw/scsi/esp.c
+++ b/hw/
Currently the DRQ IRQ is updated every time DMA data is sent/received which
is both inefficient and causes excessive logging of the DRQ state. Add a
new drq_state bool that only updates the DRQ IRQ if its state changes.
This commit adds the new drq_state bool to the migration state: since the
vers
There is now only a single implementation contained within esp_do_dma() so
call it directly.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
index c6e5ddd537..bdbdb209f7 100644
--- a/hw/scs
The handling of the INTR_FC and INTR_BS bits is different depending upon the
last command executed by the ESP. Note that currently INTR_FC is managed
elsewhere, but that will change soon.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 30 --
1 file changed, 16 in
The use of the DEFINE_TYPES() macro will soon be recommended over the use of
calling type_init() directly.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 39 +--
1 file changed, 17 insertions(+), 22 deletions(-)
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
Now that the esp_do_nodma() state machine correctly handles incoming FIFO
data, all remaining users of get_cmd() can be replaced with esp_do_nodma()
and the get_cmd() function removed completely.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 54 -
This allows the removal of duplicate logic shared between the two
implementations.
Note that we restrict esp_raise_drq() to PDMA to help reduce the log verbosity
for normal DMA.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 51 +--
1 file ch
This is because a single DMA request can be transferred using multiple TI
commands, and so a TC equal to zero may not represent the completion of
the SCSI DMA command.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff
The contents of the FIFO should only be copied to cmdfifo for ESP commands that
are sending data to the SCSI bus, which are the SEL_* commands and the TI
command. Otherwise any incoming data should be held in the FIFO as normal.
This fixes booting of NetBSD m68k under the Q800 machine once again.
This allows the removal of duplicate logic shared between the two
implementations.
Note that we restrict esp_raise_drq() to PDMA to help reduce the log verbosity
for normal DMA.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
The TI end of transfer interrupt only occurs when the TC reaches zero and is
not related to the SCSI layer transfer.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
index 5b9c3f1e5e..dc515e6435 10
The Transfer Pad command is used to either drop incoming FIFO data during the
DATA IN phase or generate a series of zero bytes in the FIFO during the DATA
OUT phase.
Implement the DMA Transfer Pad command for the DATA phases which is used by
the NeXTCube firmware in the DATA IN phase to ignore par
This brings esp_do_nodma() in line with esp_do_dma().
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 40
1 file changed, 20 insertions(+), 20 deletions(-)
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
index 879e311bc4..73379a3c65 100644
--- a/hw/scsi/e
This allows the removal of duplicate logic shared between the two
implementations.
Note that we restrict esp_raise_drq() to PDMA to help reduce the log verbosity
for normal DMA.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 35 ---
1 file changed, 12 insert
The latest state machines can handle mixing DMA and non-DMA FIFO access for all
SCSI phases except DATA IN and DATA OUT. For DATA IN and DATA OUT phases, the
transfer is complete when TC == 0 and the updated logic will now handle TC
underflow correctly, which makes it just about impossible to manua
The ESP_RSEQ logic is scattered in a few places throughout the ESP state machine
which is mainly because the ESP_RSEQ register isn't always reset when executing
an ESP select command. Once this is done, the ESP_RSEQ register only needs to be
updated at the point where the sequencer command complete
Peter Maydell writes:
> On Fri, 12 Jan 2024 at 11:11, Alex Bennée wrote:
>>
>> This reverts commit c2ef5ee89d76f0ab77c4dd6a1c9eeed4d35d20ed.
>>
>> While the fixes for #2010 and #2013 have improved things locally it
>> seems GitLab still continues to be flaky.
>>
>> Signed-off-by: Alex Bennée
>>
Currently any write to the ESP FIFO in the MESSAGE OUT or COMMAND phases will
manually raise the bus service interrupt. Instead of duplicating the interrupt
logic in esp_reg_write(), update esp_do_nodma() to correctly process incoming
FIFO data during the MESSAGE OUT and COMMAND phases. Part of thi
This moves the remaining non-DMA STATUS and MESSAGE IN phase logic from
write_response() to esp_do_nodma(). Note that we can also now drop the extra
fifo_reset() which is no longer required.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 32 +++-
1 file changed,
The special logic in satn_pdma_cb() is now no longer required since esp_do_dma()
can be used as a direct replacement.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 75 +--
include/hw/scsi/esp.h | 1 -
2 files changed, 43 insertions(+), 33 de
Currently do_cmd is used to determine whether MESSAGE OUT and COMMAND phase data
is being accumulated in cmdfifo. Update esp_do_dma() to check directly for these
two SCSI phases instead.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
The internal state of the ESP sequencer is not affected when raising an
interrupt
to indicate the end of a DMA transfer.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
index a4a1f41a40..5b9c3f1e5e 100644
--- a/h
This makes it clearer that ATN is asserted until the end of the next TI command
in the MESSAGE OUT phase.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 48 ++--
1 file changed, 26 insertions(+), 22 deletions(-)
diff --git a/hw/scsi/esp.c b/hw/sc
The special logic in satn_stop_pdma_cb() is now no longer required since
esp_do_dma() can be used as a direct replacement.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 82 +--
include/hw/scsi/esp.h | 1 -
2 files changed, 41 insertions(+),
According to the documentation ESP_RSTAT is cleared (except the STAT_TC bit)
when ESP_RINTR is read. This should not include the SCSI bus phase bits which
are currently live from the SCSI bus, otherwise the current SCSI phase is lost
when clearing an end-of-transfer interrupt.
Signed-off-by: Mark
The end of command sequences for the ICCS command are currently different
between the DMA and non-DMA versions, and also different from the description
in the datasheet.
Update the sequence so that only INTR_FC is asserted in both cases, and keep
all the logic in esp_do_dma() and esp_do_nodma() ra
The fifo8_pop_buf() function returns a pointer to the FIFO buffer up to the
specified length. Since the FIFO buffer is modelled as an array then once
the FIFO wraps around, only the continuous portion of the buffer can be
returned.
In future the use of continuous and unaligned accesses will advanc
Even though the BLAST command isn't fully implemented in QEMU, the
DMA_STAT_BCMBLT
bit should be set after the command has been issued to indicate that the command
has completed.
This fixes an issue with the DC390 DOS driver which issues the BLAST command as
part of its normal error recovery rout
The ESP SCSI chip fundamentally consists of a FIFO for transferring data to/from
the SCSI bus along with a command sequencer which automates various processes
such
as selection, message/command transfer and data transfer. What makes this chip
particularly interesting is that the FIFO is also used
The am53c974/dc390 PCI interrupt has two separate sources: the first is from the
internal ESP device, and the second is from the PCI DMA transfer logic.
Update the ESP interrupt handler so that it sets DMA_STAT_SCSIINT rather than
driving the PCI IRQ directly, and introduce a new esp_pci_update_ir
The setting of DMA_STAT_DONE at the end of a DMA transfer can be configured to
generate an interrupt, however the Linux driver manually checks for
DMA_STAT_DONE
being set and if it is, considers that a DMA transfer has completed.
If DMA_STAT_DONE is set but the ESP device isn't indicating an inte
The FIFO contents should not be affected by performing SCSI target selection.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
index 8d8f6a817a..89fce05e58 100644
--- a/hw/scsi/esp.c
+++ b/hw/scsi/esp.c
@@ -220,7 +
Whilst the FIFO is used a storage buffer for both DMA and non-DMA requests, the
loading and unloading is managed directly issuing commands to the ESP. As a
result there is no need to manually invoke the non-DMA command handler.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 11 ---
This makes it clearer that ATN is asserted until the end of the next TI command
in the MESSAGE OUT phase.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 40 +++-
1 file changed, 23 insertions(+), 17 deletions(-)
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
The handling of the INTR_FC and INTR_BS bits is different depending upon the
last command executed by the ESP. Note that currently INTR_FC is managed
elsewhere, but that will change soon.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 32 ++--
1 file changed, 26
According to the datasheet the previous ESP command remains in the ESP_CMD
register, which caused a problem when consecutive TI commands were issued as
it becomes impossible for the state machine to know when the first TI
command finishes.
This was the original reason for introducing the ti_cmd fi
The current code in esp_pci_dma_memory_rw() sets the DMA address to the value
of the DMA_SPA (Starting Physical Address) register which is incorrect: this
means that for each callback from the SCSI layer the DMA address is set back
to the starting address.
In the case where only a single SCSI call
Note that this is a migration break for the q800 machine because the extra PDMA
information is no longer included.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 55 ---
include/hw/scsi/esp.h | 6 -
2 files changed, 5 insertions(+), 56 de
This series contains fixes for the esp-pci device (am53c974 or dc390) for a
few issues spotted whilst testing the previous ESP series.
Patches 1-3 are fixes for issues found by Helge/Guenter whilst testing the
hppa C3700 machine with the amd53c974/dc390 devices under Linux, whilst patch
4 fixes an
Since esp_dma_done() is called in both cases, and ti_size cannot be zero
(otherwise esp_command_complete() would have been called instead), replace
the conditional logic with a single call to esp_dma_done().
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 14 --
1 file changed, 4
Thomas Huth writes:
> On 08/01/2024 16.13, Alex Bennée wrote:
>> With the latest fixes for #2010 and #2013 these tests look pretty
>> stable now. Of course the only way to be really sure is to run it in
>> the CI infrastructure and see what breaks.
>> Acked-by: Pavel Dovgalyuk
>> Signed-off-by:
On Fri, 2024-01-12 at 13:52 +1000, Alistair Francis wrote:
> On Thu, Jan 11, 2024 at 5:20 AM Daniel Henrique Barboza
> wrote:
> >
> > Himanshu,
> >
> > We spoke offline but let's make everyone aware:
> >
> > - 'sdtrig' should be marked with 'x-' and be an experimental
> > extension since
> > th
When running under TCG, the 'test-x86-cpuid-compat' qtest produces
warnings. You can see these for instance in the x64-freebsd-13-build
CI job; here's an example:
https://gitlab.com/qemu-project/qemu/-/jobs/5918818568
24/837 qemu:qtest+qtest-x86_64 / qtest-x86_64/test-x86-cpuid-compat
O
The raven_io_ops MemoryRegionOps is the only one in the source tree
which sets .valid.unaligned to indicate that it should support
unaligned accesses and which does not also set .impl.unaligned to
indicate that its read and write functions can do the unaligned
handling themselves. This is a proble
On Thu, Jan 11 2024, Gavin Shan wrote:
> It's found that some of the CPU type names in the array of valid
> CPU types are invalid because their corresponding classes aren't
> registered, as reported by Peter Maydell.
>
> [gshan@gshan build]$ ./qemu-system-arm -machine virt -cpu cortex-a9
> qemu-s
On Thu, 11 Jan 2024 at 05:11, Gavin Shan wrote:
>
> It's found that some of the CPU type names in the array of valid
> CPU types are invalid because their corresponding classes aren't
> registered, as reported by Peter Maydell.
>
> [gshan@gshan build]$ ./qemu-system-arm -machine virt -cpu cortex-a
Alistair Francis writes:
> On Tue, Jan 9, 2024 at 1:43 AM Alex Bennée wrote:
>>
>> Alex Bennée writes:
>>
>> > From: Akihiko Odaki
>> >
>> > It is initialized with a simple assignment and there is little room for
>> > error. In fact, the validation is even more complex.
>> >
>> > Signed-off-by
With VNC, it can be that a client sends a VNC_MSG_CLIENT_CUT_TEXT
message before sending a VNC_MSG_CLIENT_SET_ENCODINGS message with
VNC_ENCODING_CLIPBOARD_EXT for configuring the clipboard extension.
This means that qemu_clipboard_request() can be reached (via
vnc_client_cut_text_ext()) before vn
The following changes since commit 3fab43d2f638b98765b0f8ef033ec93e3ea6b809:
Merge tag 'firmware/edk2-20231213-pull-request' of
https://gitlab.com/kraxel/qemu into staging (2024-01-11 15:19:42 +)
are available in the Git repository at:
https://gitlab.com/stsquad/qemu.git tags/pull-testi
Do the same we did with 'cbom_blocksize' in the previous patch.
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Alistair Francis
Tested-by: Vladimir Isaev
---
target/riscv/cpu.c | 38 +-
1 file changed, 37 insertions(+), 1 deletion(-)
diff --git a/targe
After adding a KVM finalize() implementation, turn cbom_blocksize into a
class property. Follow the same design we used with 'vlen' and 'elen'.
The duplicated 'cbom_blocksize' KVM property can be removed from
kvm_riscv_add_cpu_user_properties().
Signed-off-by: Daniel Henrique Barboza
Reviewed-by
Keep all class properties in riscv_cpu_properties[].
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Alistair Francis
Tested-by: Vladimir Isaev
---
target/riscv/cpu.c | 110 +++--
1 file changed, 57 insertions(+), 53 deletions(-)
diff --git a/target
To turn cbom_blocksize and cboz_blocksize into class properties we need
KVM specific changes.
KVM is creating its own version of these options with a customized
setter() that prevents users from picking an invalid value during init()
time. This comes at the cost of duplicating each option that KVM
Keep all class properties in riscv_cpu_properties[].
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Alistair Francis
Tested-by: Vladimir Isaev
---
target/riscv/cpu.c | 68 --
1 file changed, 36 insertions(+), 32 deletions(-)
diff --git a/target
The array is empty and can be removed.
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Alistair Francis
Tested-by: Vladimir Isaev
---
target/riscv/cpu.c | 5 -
target/riscv/cpu.h | 1 -
target/riscv/kvm/kvm-cpu.c | 9 -
target/riscv/tcg/tcg-cpu.c | 4
4 fil
And remove the now unused kvm_cpu_set_cbomz_blksize() setter.
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Alistair Francis
Tested-by: Vladimir Isaev
---
target/riscv/cpu.c | 38 +-
target/riscv/kvm/kvm-cpu.c | 28
Hi,
This version is a resend of patches 10 to 17 from v4, reviewed-by and
tested-by tags added, rebased with Alistair's riscv-to-apply.next.
Patches 01 to 09 of v4 are already queued.
All patches acked.
Changes from v4:
- patches 1 to 9: already queued
- patches 10 to 17: reviewed-by and tested-
Keep all class properties in riscv_cpu_properties[].
Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Alistair Francis
Tested-by: Vladimir Isaev
---
target/riscv/cpu.c | 69 +-
1 file changed, 37 insertions(+), 32 deletions(-)
diff --git a/target
Hyman Huang writes:
> The QMP command "x-query-virtio-status" outputs the full
> feature and status bit information, so there is no need
> to maintain it in the HMP output; drop it.
>
> Signed-off-by: Hyman Huang
I'm not sure hiding unknown bits from HMP users is a good idea. Sure,
you can use
Hyman Huang writes:
> Maintain the feature and status bits in the x-query-virtio-status
> output and, as usual, add human-readable output only in HMP.
>
> Applications may find it useful to compare features and status
> information directly. An upper application, for example, could
> use the QMP
Am 12.01.24 um 14:55 schrieb Fiona Ebner:
>
> Then when noVNC sends a VNC_MSG_CLIENT_CUT_TEXT message (it did set
> the feature correctly, so the check added by your patch passes),
Sorry, forgot to adapt this part. This should read "it did set the
VNC_FEATURE_CLIPBOARD_EXT feature correctly, so a
Hi Jason,
Le 11/01/2024 à 19:58, Jason Thorpe a écrit :
On Jan 10, 2024, at 8:01 AM, Philippe Mathieu-Daudé wrote:
IIUC Goldfish virtual HW is maintained externally by Google
https://android.googlesource.com/platform/external/qemu/+/master/docs/GOLDFISH-VIRTUAL-HARDWARE.TXT
I suppose the sp
11.01.2024 19:28, Gerd Hoffmann:
..
Yes, Cc'ing qemu-stable was the intention, thanks for fixing it up.
I'd leave it to the stable maintainer(s). If they prefer a respin with
Cc qemu-stable added to all patches I surely can do that. If being
notified with this reply is good enough I'm happy to
On 1/12/24 02:04, Richard Henderson wrote:
On 1/12/24 01:23, Pierrick Bouvier wrote:
Instead of working on a fixed memory location, allow to index it based
on cpu_index and a given offset (ptr + cpu_index * offset).
Current semantic is not modified as we use a 0 offset, thus inline
operation sti
12.01.2024 17:27, Michael Tokarev:
There's no requirement to have Cc: qemu-stable tags on the patches.
This tagging is only to easily find changes which are supposed to be
picked up for stable, nothing more, so it's completely optional.
An additional note: without this Cc by Peter, I would've n
Hello Ninad,
This is looking much better. I have a couple more comments.
Please wait a little before sending a respin ! :) and please
run make check and script/checkpatch.pl.
On 1/11/24 00:15, Ninad Palsule wrote:
Hello,
Please review the patch-set version 10.
I have incorporated review comme
On 1/11/24 00:15, Ninad Palsule wrote:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
The LBUS is modelled to maintain mapped memory for the devices. The
memory is mapped after CFAM config, peek table and FSI slave registers.
The scratchpad provides a set of no
On Fri, Jan 12, 2024 at 10:04 PM Markus Armbruster
wrote:
> Hyman Huang writes:
>
> > The QMP command "x-query-virtio-status" outputs the full
> > feature and status bit information, so there is no need
> > to maintain it in the HMP output; drop it.
> >
> > Signed-off-by: Hyman Huang
>
> I'm no
On 1/11/24 00:15, Ninad Palsule wrote:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
The Common FRU Access Macro (CFAM), an address space containing
various "engines" that drive accesses on busses internal and external
to the POWER chip. Examples include the SB
On 1/11/24 00:15, Ninad Palsule wrote:
This is a part of patchset where FSI bus is introduced.
The FSI bus is a simple bus where FSI master is attached.
The FSI slave: The slave is the terminal point of the FSI bus for
FSI symbols addressed to it. Slaves can be cascaded off of one
another. The
On Fri, Jan 12, 2024 at 10:10 PM Markus Armbruster
wrote:
> Hyman Huang writes:
>
> > Maintain the feature and status bits in the x-query-virtio-status
> > output and, as usual, add human-readable output only in HMP.
> >
> > Applications may find it useful to compare features and status
> > info
Define MigrationNotifyFunc to improve type safety and simplify migration
notifiers.
Signed-off-by: Steve Sistare
---
hw/net/virtio-net.c | 4 +---
hw/vfio/migration.c | 3 +--
include/migration/misc.h | 5 -
migration/migration.c| 4 ++--
net/vhost-vdpa.c | 6 ++
ui
Pass an error object as the third parameter to "notifier with return"
notifiers, so clients no longer need to bundle an error object in the
opaque data. The new parameter is used in a later patch.
Signed-off-by: Steve Sistare
---
hw/virtio/vhost-user.c | 2 +-
hw/virtio/virtio-balloon.c | 3
Delete the explicit MigrationState parameter from migration_in_postcopy,
so we can eliminate MigrationState from notifiers in a later patch.
No functional change.
Signed-off-by: Steve Sistare
---
include/migration/misc.h | 2 +-
migration/migration.c| 27 ---
ui/spic
Passing MigrationState to notifiers is unsound because they could access
unstable migration state internals or even modify the state. Instead, pass
the minimal info needed in a new MigrationEvent struct, which could be
extended in the future if needed.
Suggested-by: Peter Xu
Signed-off-by: Steve
Move common code for the error path in migrate_fd_connect to a shared
fail label. No functional change.
Signed-off-by: Steve Sistare
---
migration/migration.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/migration/migration.c b/migration/migration
101 - 200 of 337 matches
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