From: Tianrui Zhao
Implement kvm_arch_init_vcpu interface for loongarch,
in this function, we register VM change state handler.
And when VM state changes to running, the counter value
should be put into kvm to keep consistent with kvm,
and when state change to stop, counter value should be
refres
From: Bibo Mao
On LoongArch physical machine, one extioi interrupt controller only
supports 4 cpus. With processor more than 4 cpus, there are multiple
extioi interrupt controllers; if interrupts need to be routed to
other cpus, they are forwarded from extioi node0 to other extioi nodes.
On virt
From: Bibo Mao
There are elements sw_ipmap and sw_coremap, which is usd to speed
up irq injection flow. They are saved and restored in vmstate during
migration, indeed they can calculated from hw registers. Here
post_load is added for get sw_ipmap and sw_coremap from extioi hw
state.
Signed-off-
From: Tianrui Zhao
Define some functions in target/loongarch/kvm/kvm.c,
such as kvm_arch_put_registers, kvm_arch_get_registers
and kvm_arch_handle_exit, etc. which are needed by
kvm/kvm-all.c. Now the most functions has no content
and they will be implemented in the next patches.
Signed-off-by:
From: Tianrui Zhao
Add kvm.c into meson.build to compile it when kvm
is configed. Meanwhile in meson.build, we set the
kvm_targets to loongarch64-softmmu when the cpu is
loongarch. And fix the compiling error when config
is enable-kvm,disable-tcg.
Signed-off-by: Tianrui Zhao
Signed-off-by: xian
From: Tianrui Zhao
Implement the kvm_arch_init of loongarch, in the function, the
KVM_CAP_MP_STATE cap is checked by kvm ioctl.
Signed-off-by: Tianrui Zhao
Signed-off-by: xianglai li
Reviewed-by: Richard Henderson
Reviewed-by: Song Gao
Message-Id: <20240105075804.1228596-6-zhaotian...@loongs
在 2024/1/11 下午7:26, Philippe Mathieu-Daudé 写道:
On 11/1/24 10:51, gaosong wrote:
在 2024/1/11 下午5:04, Thomas Huth 写道:
On 11/01/2024 09.50, gaosong wrote:
在 2024/1/11 下午4:20, Thomas Huth 写道:
On 11/01/2024 08.37, gaosong wrote:
LoongArch no support these cmds or some problems .
- "gva2gpa
Kevin Wolf writes:
> Commit ff32bb53 tried to get minimal struct support into the string
> output visitor by just making it return "". Unfortunately, it
> forgot that the caller will still make more visitor calls for the
> content of the struct.
>
> If the struct is contained in a list, such as I
On 1/10/24 15:29, Thomas Huth wrote:
It's a common scenario to copy guest images from one host to another
to run the guest on the other machine. This (of course) does not work
with "secure exection" guests since they are encrypted with one certain
host key. However, if you still (accidentally) do
accel_init_ops_interfaces() is system specific, so
rename it as accel_system_init_ops_interfaces() to
ease navigating the code.
Signed-off-by: Philippe Mathieu-Daudé
---
accel/accel-system.h | 2 +-
accel/accel-system.c | 2 +-
accel/accel-target.c | 2 +-
3 files changed, 3 insertions(+), 3 del
cpu_class_init() is specific to s390x SCLP, so rename
it as sclp_cpu_class_init() (as other names in this file)
to ease navigating the code.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/s390x/sclpcpu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/s390x/sclpcpu.c b/h
The tcg_cpu_FOO() names are x86 specific, so rename
them as x86_tcg_cpu_FOO() (as other names in this file)
to ease navigating the code.
Signed-off-by: Philippe Mathieu-Daudé
---
target/i386/tcg/tcg-cpu.c | 32
1 file changed, 16 insertions(+), 16 deletions(-)
d
Daniel P. Berrangé writes:
> On Tue, Jan 09, 2024 at 03:54:07PM +0100, Markus Armbruster wrote:
>> Daniel P. Berrangé writes:
>>
>> > To quote wikipedia:
>> >
>> > "Return-oriented programming (ROP) is a computer security exploit
>> >technique that allows an attacker to execute code in th
Rename some code names to ease navigating / grepping
the code.
I plan to queue these patches once reviewed.
Thanks,
Phil.
Philippe Mathieu-Daudé (5):
accel: Rename accel_init_ops_interfaces() to include 'system'
hw/core/cpu: Rename cpu_class_init() to include 'common'
hw/s390x: Rename cpu
The tcg_cpu_FOO() names are riscv specific, so rename
them as riscv_tcg_cpu_FOO() (as other names in this file)
to ease navigating the code.
Signed-off-by: Philippe Mathieu-Daudé
---
target/riscv/tcg/tcg-cpu.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
cpu_class_init() is common, so rename it as cpu_common_class_init()
to ease navigating the code.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/core/cpu-common.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c
index 3ccfe882e2..67
在 2024/1/11 下午4:26, Thomas Huth 写道:
On 11/01/2024 08.25, gaosong wrote:
Hi,
在 2024/1/11 下午3:08, Thomas Huth 写道:
On 02/01/2024 18.22, Philippe Mathieu-Daudé wrote:
Full build config to run CI tests on a Loongarch64 host.
Forks might enable this by setting LOONGARCH64_RUNNER_AVAILABLE
in their
Frédéric Pétrot writes:
> Hello Alex,
>
> just reporting below what might be a riscv only oddity (also applies to
> patch 41 but easier to report here).
>
> Le 03/01/2024 à 18:33, Alex Bennée a écrit :
>> With the new plugin register API we can now track changes to register
>> values. Current
On Wed, 10 Jan 2024 15:29:16 +0100
Thomas Huth wrote:
> It's a common scenario to copy guest images from one host to another
> to run the guest on the other machine. This (of course) does not work
> with "secure exection" guests since they are encrypted with one certain
*execution
with that fix
On Tue, 9 Jan 2024 17:45:50 +
Jonathan Cameron wrote:
> On Fri, 22 Dec 2023 18:00:49 +0900
> Hyeonggon Yoo <42.hye...@gmail.com> wrote:
>
> > In the current mdev_reg_read() implementation, it consistently returns
> > that the Media Status is Ready (01b). This was fine until commit
> > 25a529
Pierrick Bouvier writes:
> On 1/3/24 21:33, Alex Bennée wrote:
>> We can only request a list of registers once the vCPU has been
>> initialised so the user needs to use either call the get function on
>> vCPU initialisation or during the translation phase.
>> We don't expose the reg number to the
During the review of a fix for a concurrency issue in blklogwrites,
it was found that the driver needs an additional fix when enabling
multiqueue, which is a new feature introduced in QEMU 9.0, as the
driver state may be read and written by multiple threads at the same
time, which was not the case
Any takers?
Markus Armbruster writes:
> -z without -R has no effect: the dump format remains @elf. Fix the
> logic error so it becomes @kdump-zlib.
>
> Fixes: e6549197f7ed (dump: Add command interface for kdump-raw formats)
> Fixes: CID 1523841
> Signed-off-by: Markus Armbruster
> Reviewed-by:
Alex Bennée writes:
> This brings in the first batch of testing updates for the next
> release. The main bulk of these is Daniel and Thomas' cleanups of the
> qtest timeouts and allowing meson control them. There are a few minor
> tweaks I've made to some avocado and gitlab tests.
>
> The big upd
On 12/11/23 15:32, Andrey Drobyshev wrote:
> There're tests whose logic implies running without O_DIRECT set,
> otherwise they fail when running iotests in '-nocache' mode. For these
> tests let's add _require_no_o_direct() helper which can be put in the
> preabmle and which makes sure '-nocache'
On 12/11/23 13:27, Denis V. Lunev wrote:
> On 12/11/23 11:55, Andrey Drobyshev wrote:
>> In case we're truncating an image opened with O_DIRECT, we might get
>> -EINVAL on write with unaligned buffer. In particular, when running
>> iotests/298 with '-nocache' we get:
>>
>> qemu-io: Failed to resiz
Sometimes the CI "pages" job fails with a message like this from
htags:
$ htags -anT --tree-view=filetree -m qemu_init -t "Welcome to the QEMU
sourcecode"
htags: Negative exec line limit = -371
This is due to a bug in hflags where if the environment is too large it
falls over:
https://lists.gnu.
On 1/11/24 09:02, Philippe Mathieu-Daudé wrote:
cpu_class_init() is common, so rename it as cpu_common_class_init()
to ease navigating the code.
Signed-off-by: Philippe Mathieu-Daudé
---
Reviewed-by: Daniel Henrique Barboza
hw/core/cpu-common.c | 4 ++--
1 file changed, 2 insertions(
On 1/11/24 09:02, Philippe Mathieu-Daudé wrote:
The tcg_cpu_FOO() names are riscv specific, so rename
them as riscv_tcg_cpu_FOO() (as other names in this file)
to ease navigating the code.
Signed-off-by: Philippe Mathieu-Daudé
---
Reviewed-by: Daniel Henrique Barboza
target/riscv/tcg/
On 1/11/24 09:02, Philippe Mathieu-Daudé wrote:
accel_init_ops_interfaces() is system specific, so
rename it as accel_system_init_ops_interfaces() to
ease navigating the code.
Signed-off-by: Philippe Mathieu-Daudé
---
Reviewed-by: Daniel Henrique Barboza
accel/accel-system.h | 2 +-
On Wed, Jan 10, 2024 at 03:32:21PM -0300, Daniel Henrique Barboza wrote:
>
>
> On 1/9/24 14:07, Rob Bradford wrote:
> > Signed-off-by: Rob Bradford
> > ---
> > target/riscv/tcg/tcg-cpu.c | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/target/riscv/tcg/tcg-cpu
On Tue, Jan 09, 2024 at 05:07:35PM +, Rob Bradford wrote:
> Add the infrastructure for the 'B' extension which is the union of the
> Zba, Zbb and Zbs instructions.
>
> Signed-off-by: Rob Bradford
> ---
> target/riscv/cpu.c | 5 +++--
> target/riscv/cpu.h | 1 +
> target/riscv
On Tue, Jan 09, 2024 at 05:07:36PM +, Rob Bradford wrote:
> If the B extension is enabled warn if the user has disabled any of the
> required extensions that are part of the 'B' extension. Conversely
> enable the extensions that make up the 'B' extension if it is enabled.
>
> Signed-off-by: Ro
On 11/1/24 13:05, gaosong wrote:
在 2024/1/11 下午4:26, Thomas Huth 写道:
On 11/01/2024 08.25, gaosong wrote:
Hi,
在 2024/1/11 下午3:08, Thomas Huth 写道:
On 02/01/2024 18.22, Philippe Mathieu-Daudé wrote:
Full build config to run CI tests on a Loongarch64 host.
Forks might enable this by setting LOO
On Thu, Jan 11, 2024 at 02:07:34PM +0100, Andrew Jones wrote:
> On Tue, Jan 09, 2024 at 05:07:35PM +, Rob Bradford wrote:
> > Add the infrastructure for the 'B' extension which is the union of the
> > Zba, Zbb and Zbs instructions.
> >
> > Signed-off-by: Rob Bradford
> > ---
> > target/riscv
On 11/1/23 18:13, Denis V. Lunev wrote:
> On 11/1/23 16:23, Andrey Drobyshev wrote:
>> Currently we emit GUEST_PANICKED event in case kvm_vcpu_ioctl() returns
>> KVM_EXIT_SYSTEM_EVENT with the event type KVM_SYSTEM_EVENT_CRASH. Let's
>> extend this scenario and emit GUEST_PANICKED in case of an ab
On Tue, Jan 09, 2024 at 05:07:35PM +, Rob Bradford wrote:
> Add the infrastructure for the 'B' extension which is the union of the
> Zba, Zbb and Zbs instructions.
>
> Signed-off-by: Rob Bradford
> ---
> target/riscv/cpu.c | 5 +++--
> target/riscv/cpu.h | 1 +
> target/riscv
On 03/01/2024 18.33, Alex Bennée wrote:
This reverts aeb5f8f248e (gitlab: build the correct microblaze target)
now we actually have a little-endian test in avocado thanks to this
years advent calendar.
Signed-off-by: Alex Bennée
---
.gitlab-ci.d/buildtest.yml | 4 ++--
1 file changed, 2 inse
On 3/1/24 18:33, Alex Bennée wrote:
This ensures the rootfs is never permanently changed as we don't need
persistence between tests anyway.
Signed-off-by: Alex Bennée
---
tests/avocado/kvm_xen_guest.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Philippe Mathieu-Daud
This patch implements a 32 half word FIFO as per imx serial device
specifications. If a non empty FIFO is below the trigger level, an ageing
timer will tick for a duration of 8 characters. On expiry, AGTIM will be set
triggering an interrupt. AGTIM timer resets when there is activity in
the receive
On 1/10/2024 9:16 PM, Peter Xu wrote:
> On Wed, Jan 10, 2024 at 01:08:41PM -0500, Steven Sistare wrote:
>> On 1/10/2024 2:18 AM, Peter Xu wrote:
>>> On Wed, Dec 13, 2023 at 10:11:32AM -0800, Steve Sistare wrote:
After calling notifiers, check if an error has been reported via
migrate_set_
Peter Xu writes:
> On Wed, Jan 10, 2024 at 11:42:18AM -0300, Fabiano Rosas wrote:
>> Peter Xu writes:
>>
>> > On Tue, Jan 09, 2024 at 11:46:32AM -0300, Fabiano Rosas wrote:
>> >> Hm, it would be better to avoid the extra maintenance task at the start
>> >> of every release, no? It also blocks u
On Wed, Dec 13, 2023 at 11:50:12AM +0100, Gerd Hoffmann wrote:
> The following changes since commit 9c74490bff6c8886a922008d0c9ce6cae70dd17e:
>
> Update version for v8.2.0-rc3 release (2023-12-06 14:34:20 -0500)
>
> are available in the Git repository at:
>
> https://gitlab.com/kraxel/qemu.g
On 3/1/24 18:33, Alex Bennée wrote:
This makes them a bit more visible in the TCG emulation menu rather
than hiding them away bellow the ToC limit.
Signed-off-by: Alex Bennée
---
docs/devel/tcg-plugins.rst | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
Reviewed-by: Philippe Ma
When running the command `qemu-img snapshot -l SNAPSHOT` the output of
VM_CLOCK (measures the offset between host and VM clock) cannot to
accommodate values in the order of thousands (4-digit).
This line [1] hints on the problem. Additionally, the column width for
the VM_CLOCK field was reduced fr
Changes from v2:
- Change email provider to 'gmail', to prevent auto-wrapping patches.
- Change more unit tests in
'tests/qemu-iotests/tests/qcow2-internal-snapshots.out'
On Thu, 11 Jan 2024 at 10:39, Abhiram Tilak wrote:
> When running the command `qemu-img snapshot -l SNAPSHOT` the output of
>
On 11/1/24 13:55, Peter Maydell wrote:
Sometimes the CI "pages" job fails with a message like this from
htags:
$ htags -anT --tree-view=filetree -m qemu_init -t "Welcome to the QEMU
sourcecode"
htags: Negative exec line limit = -371
This is due to a bug in hflags where if the environment is to
On Wed, Jan 10, 2024 at 09:26:37PM +, Joe Komlodi wrote:
> Hi all,
>
> This series adds some resets for SMBus and for the I2C core. Along with
> it, we make SMBus slave error printing a little more helpful.
>
> These reset issues were very infrequent, they would maybe occur in 1 out
> of hund
On Thu, 2024-01-11 at 13:02 +0100, Philippe Mathieu-Daudé wrote:
> cpu_class_init() is specific to s390x SCLP, so rename
> it as sclp_cpu_class_init() (as other names in this file)
> to ease navigating the code.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/s390x/sclpcpu.c | 4 ++--
> 1 f
Fails to compile for me:
../block/crypto.c: In function ‘block_crypto_co_create_luks’:
../block/crypto.c:784:1: error: control reaches end of non-void function
[-Werror=return-type]
784 | }
| ^
Am 10.01.2024 um 20:50 hat Ari Sundholm geschrieben:
> During the review of a fix for a concurrency issue in blklogwrites,
> it was found that the driver needs an additional fix when enabling
> multiqueue, which is a new feature introduced in QEMU 9.0, as the
> driver state may be read and written
Le 11/01/2024 à 13:24, Alex Bennée a écrit :
Frédéric Pétrot writes:
Hello Alex,
just reporting below what might be a riscv only oddity (also applies to
patch 41 but easier to report here).
Le 03/01/2024 à 18:33, Alex Bennée a écrit :
With the new plugin register API we can now track
Introduce a lock so global count is correct.
This was found by comparing with new inline per_vcpu inline op.
Signed-off-by: Pierrick Bouvier
---
tests/plugin/mem.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/tests/plugin/mem.c b/tests/plugin/mem.c
index 44e91065ba7..beca8232342 100644
This series adds a new thread-safe API to declare inline operation
inside plugins. As well, it removes the existing non thread-safe API,
and migrates all existing plugins to use it.
Tested on Linux (user, system) for i386, x86_64 and aarch64.
To give some context, this a long term series of work
Signed-off-by: Pierrick Bouvier
---
tests/plugin/mem.c | 18 +-
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/tests/plugin/mem.c b/tests/plugin/mem.c
index beca8232342..06f2d80d0ec 100644
--- a/tests/plugin/mem.c
+++ b/tests/plugin/mem.c
@@ -16,7 +16,9 @@
QEMU_
Instead of working on a fixed memory location, allow to index it based
on cpu_index and a given offset (ptr + cpu_index * offset).
Current semantic is not modified as we use a 0 offset, thus inline
operation still targets always the same memory location.
Signed-off-by: Pierrick Bouvier
---
accel
Signed-off-by: Pierrick Bouvier
---
contrib/plugins/howvec.c | 33 ++---
1 file changed, 22 insertions(+), 11 deletions(-)
diff --git a/contrib/plugins/howvec.c b/contrib/plugins/howvec.c
index 644a7856bb2..46230a43927 100644
--- a/contrib/plugins/howvec.c
+++ b/contr
Since we need a fixed offset between count memory location, we now need
a contiguous array of CPUCount (instead of array of pointers).
Signed-off-by: Pierrick Bouvier
---
tests/plugin/bb.c | 54 +++
1 file changed, 27 insertions(+), 27 deletions(-)
di
Signed-off-by: Pierrick Bouvier
---
tests/plugin/insn.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/tests/plugin/insn.c b/tests/plugin/insn.c
index 5fd3017c2b3..be79c5080fd 100644
--- a/tests/plugin/insn.c
+++ b/tests/plugin/insn.c
@@ -23,7 +23,7 @@ typedef
Signed-off-by: Pierrick Bouvier
---
tests/plugin/inline.c | 17 -
1 file changed, 17 deletions(-)
diff --git a/tests/plugin/inline.c b/tests/plugin/inline.c
index 6114ebca545..ae59f7af7a7 100644
--- a/tests/plugin/inline.c
+++ b/tests/plugin/inline.c
@@ -18,15 +18,12 @@
static u
Signed-off-by: Pierrick Bouvier
---
contrib/plugins/hotblocks.c | 25 +++--
1 file changed, 19 insertions(+), 6 deletions(-)
diff --git a/contrib/plugins/hotblocks.c b/contrib/plugins/hotblocks.c
index 4de1b134944..1d95ac53143 100644
--- a/contrib/plugins/hotblocks.c
+++ b/co
Extends API with three new functions:
qemu_plugin_register_vcpu_{tb, insn, mem}_exec_inline_per_vcpu().
Compared to non per_vcpu versions, ptr is now a base, and current
cpu_index and an offset are used to compute memory location on which
operation happens (ptr + cpu_index * offset).
This allows
For now, it simply performs instruction, bb and mem count, and ensure
that inline vs callback versions have the same result. Later, we'll
extend it when new inline operations are added.
Use existing plugins to test everything works is a bit cumbersome, as
different events are treated in different
Signed-off-by: Pierrick Bouvier
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 00ec1f7ecaf..4a621aca978 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3660,6 +3660,7 @@ TCG Plugins
M: Alex Bennée
R: Alexandre Iooss
R: Mahmoud Mandour
+R:
Now we have a thread-safe equivalent of inline operation, and that all
plugins were changed to use it, there is no point to keep the old API.
In more, it will help when we implement more functionality (conditional
callbacks), as we know can assume that all inline operation have an
offset associate
Hyman Huang writes:
> Add the "header" option for the LUKS format. This field would be
> used to identify the blockdev's position where a detachable LUKS
> header is stored.
>
> In addition, introduce header field in struct BlockCrypto
>
> Signed-off-by: Hyman Huang
> Reviewed-by: Daniel P. Berr
On 1/11/24 16:06, Kevin Wolf wrote:
Am 10.01.2024 um 20:50 hat Ari Sundholm geschrieben:
During the review of a fix for a concurrency issue in blklogwrites,
it was found that the driver needs an additional fix when enabling
multiqueue, which is a new feature introduced in QEMU 9.0, as the
driver
On 1/11/24 10:02, Andrew Jones wrote:
On Wed, Jan 10, 2024 at 03:32:21PM -0300, Daniel Henrique Barboza wrote:
On 1/9/24 14:07, Rob Bradford wrote:
Signed-off-by: Rob Bradford
---
target/riscv/tcg/tcg-cpu.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/
From: Hyeonggon Yoo <42.hye...@gmail.com>
In the current mdev_reg_read() implementation, it consistently returns
that the Media Status is Ready (01b). This was fine until commit
25a52959f99d ("hw/cxl: Add support for device sanitation") because the
media was presumed to be ready.
However, as per
On Thu, Jan 11, 2024 at 03:35:10PM +0100, Markus Armbruster wrote:
> Hyman Huang writes:
>
> > Add the "header" option for the LUKS format. This field would be
> > used to identify the blockdev's position where a detachable LUKS
> > header is stored.
> >
> > In addition, introduce header field in
On 1/11/24 10:43, Cédric Le Goater wrote:
On 1/10/24 21:28, Matthew Rosato wrote:
On 1/10/24 1:30 PM, Cédric Le Goater wrote:
On 9/12/23 13:41, Thomas Huth wrote:
From: Janosch Frank
Bound APQNs have to be reset before tearing down the secure config via
s390_machine_unprotect(). Otherwise th
Hi Markus
On Thu, Jan 11, 2024 at 4:36 PM Markus Armbruster wrote:
>
> Any takers?
>
I have it in my "dump" queue, but it's the only patch I got so far (I
could have missed others).
If it can go through my other means, that's fine with me
> Markus Armbruster writes:
>
> > -z without -R has no
;
> are available in the Git repository at:
>
> https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20240111
>
> for you to fetch changes up to 1d513e06d96697f44de4a1b85c6ff627c443e306:
>
> util: fix build wit
ps://gitlab.com/stefanha/qemu into
> staging (2024-01-09 10:32:23 +)
>
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu-arm.git
> tags/pull-target-arm-20240111
>
> for you to fetch changes up to e2862554c257e908a3833265e38365e794
+ Ved
On Thu, 2024-01-11 at 14:14 +0100, Andrew Jones wrote:
> On Thu, Jan 11, 2024 at 02:07:34PM +0100, Andrew Jones wrote:
> > On Tue, Jan 09, 2024 at 05:07:35PM +, Rob Bradford wrote:
> > > Add the infrastructure for the 'B' extension which is the union
> > > of the
> > > Zba, Zbb and Zbs i
Hi Vladimir,
hope I didn't miss a newer version of this series. I'm currently
evaluating fleecing backup for Proxmox downstream, so I pulled in this
series and wanted to let you know about two issues I encountered while
testing. We are still based on 8.1, but if I'm not mistaken, they are
still re
On 1/11/24 5:18 AM, Christian Borntraeger wrote:
>
>
> Am 11.01.24 um 10:43 schrieb Cédric Le Goater:
> [...]
>>
>>
>> On a side note, I am also seeing :
>
> Michael?
>
Hmm, it looks like this warning is tripping because we have a path in PCI
passthrough where we don't unregister the gisc. T
On 1/11/24 4:43 AM, Cédric Le Goater wrote:
> OK. this condition is considered serious enough to be reported to a
> management level. This seems a bit excessive since the recovery can be
> handled by software, but manually. Are there any plans to address this
> problem ?
Yes, eventually. Current
On Fri, 21 Jul 2023 at 12:29, Peter Maydell wrote:
>
> On Fri, 21 Jul 2023 at 11:44, Gavin Shan wrote:
> >
> > There are warning messages printed from tests/qtest/numa-test.c,
> > to complain the CPU cluster and NUMA node boundary is broken. Since
> > the broken boundary is expected, we don't wan
This commit extends the APIC ID to 32-bit long and remove the 255 max APIC
ID limit in userspace APIC. The array that manages local APICs is now
dynamically allocated based on the max APIC ID of created x86 machine.
Also, new x2APIC IPI destination determination scheme, self IPI and x2APIC
mode reg
This commit adds XTSup configuration to let user choose to whether enable
this feature or not. When XTSup is enabled, additional bytes in IRTE with
enabled guest virtual VAPIC are used to support 32-bit destination id.
Additionally, this commit exports IVHD type 0x11 besides the old IVHD type
0x10
Hi everyone,
This series implements x2APIC mode in userspace local APIC and the
RDMSR/WRMSR helper to access x2APIC registers in x2APIC mode. Intel iommu
and AMD iommu are adjusted to support x2APIC interrupt remapping. With this
series, we can now boot Linux kernel into x2APIC mode with TCG accel
This commit adds support for x2APIC transitions when writing to
MSR_IA32_APICBASE register and finally adds CPUID_EXT_X2APIC to
TCG_EXT_FEATURES.
The set_base in APICCommonClass now returns an integer to indicate error in
execution. apic_set_base return -1 on invalid APIC state transition,
acceler
This commit creates apic_register_read/write which are used by both
apic_mem_read/write for MMIO access and apic_msr_read/write for MSR access.
The apic_msr_read/write returns -1 on error, accelerator can use this to
raise the appropriate exception.
Signed-off-by: Bui Quang Minh
---
hw/intc/api
Following the instructions in bios-tables-test, this lists that IVRS.ivrs
in ACPI table will be changed to add new IVHD type 0x11.
Signed-off-by: Bui Quang Minh
---
tests/qtest/bios-tables-test-allowed-diff.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/qtest/bios-tables-test-allowe
Following the instructions in bios-tables-test, this adds the changed
IVRS.ivrs binary.
New IVRS differs in length, checksum, it enables EFRSup in Virtualization
Info and adds IVHD type 0x11 with the same device entries as in IVHD type
0x10.
ASL diff:
/*
* Intel ACPI Component Architecture
As userspace APIC now supports x2APIC, intel interrupt remapping
hardware can be set to EIM mode when userspace local APIC is used.
Suggested-by: Joao Martins
Acked-by: Peter Xu
Signed-off-by: Bui Quang Minh
---
hw/i386/intel_iommu.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
On Thu, 2024-01-11 at 11:53 -0300, Daniel Henrique Barboza wrote:
>
>
> On 1/11/24 10:02, Andrew Jones wrote:
> > On Wed, Jan 10, 2024 at 03:32:21PM -0300, Daniel Henrique Barboza
> > wrote:
> > >
> > >
> > > On 1/9/24 14:07, Rob Bradford wrote:
> > > > Signed-off-by: Rob Bradford
> > > > ---
On Thu, 11 Jan 2024 at 14:01, Gerd Hoffmann wrote:
>
> On Wed, Dec 13, 2023 at 11:50:12AM +0100, Gerd Hoffmann wrote:
> > The following changes since commit 9c74490bff6c8886a922008d0c9ce6cae70dd17e:
> >
> > Update version for v8.2.0-rc3 release (2023-12-06 14:34:20 -0500)
> >
> > are available i
On Thu, Jan 11, 2024 at 10:05 PM Markus Armbruster
wrote:
> Fails to compile for me:
>
> ../block/crypto.c: In function ‘block_crypto_co_create_luks’:
> ../block/crypto.c:784:1: error: control reaches end of non-void function
> [-Werror=return-type]
> 784 | }
> | ^
>
>
Ok, I'll check it o
Hi Pierrick,
On 11/1/24 15:23, Pierrick Bouvier wrote:
For now, it simply performs instruction, bb and mem count, and ensure
that inline vs callback versions have the same result. Later, we'll
extend it when new inline operations are added.
Use existing plugins to test everything works is a bit
On Thu, 11 Jan 2024 at 15:52, Peter Maydell wrote:
>
> On Thu, 11 Jan 2024 at 14:01, Gerd Hoffmann wrote:
> >
> > On Wed, Dec 13, 2023 at 11:50:12AM +0100, Gerd Hoffmann wrote:
> > > The following changes since commit
> > > 9c74490bff6c8886a922008d0c9ce6cae70dd17e:
> > >
> > > Update version f
On Thu, Jan 11, 2024 at 10:58 PM Daniel P. Berrangé
wrote:
> On Thu, Jan 11, 2024 at 03:35:10PM +0100, Markus Armbruster wrote:
> > Hyman Huang writes:
> >
> > > Add the "header" option for the LUKS format. This field would be
> > > used to identify the blockdev's position where a detachable LUK
Marc-André Lureau writes:
> Hi Markus
>
> On Thu, Jan 11, 2024 at 4:36 PM Markus Armbruster wrote:
>>
>> Any takers?
>>
>
> I have it in my "dump" queue, but it's the only patch I got so far (I
> could have missed others).
>
> If it can go through my other means, that's fine with me
Let's try q
On Fri 22 Dec 2023 11:31:12 AM +01, Markus Armbruster wrote:
>> This allows returning a tree of all object properties under a given
>> path, in a way similar to scripts/qmp/qom-tree.
>
> Use case? We already have that script, and also HMP info qom-tree.
The main use case is convenience.
Manageme
If the B extension is enabled warn if the user has disabled any of the
required extensions that are part of the 'B' extension. Conversely
enable the extensions that make up the 'B' extension if it is enabled.
Signed-off-by: Rob Bradford
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Andrew Jo
Add support for the new (fast track) 'B' extension [1] this extension
uses the misa.B bit to indicate that the Zba, Zbb and Zbs extensions are
present.
Since this extension is not yet frozen it is exposed via the 'x-b' cpu
option. The validation logic is based on the new approach taken for the
'G'
Add the infrastructure for the 'B' extension which is the union of the
Zba, Zbb and Zbs instructions.
Signed-off-by: Rob Bradford
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: Andrew Jones
---
target/riscv/cpu.c | 5 +++--
target/riscv/cpu.h | 1 +
target/riscv/tcg/tcg-cpu.
Since the CPUState::start-powered-off property is irrelevant
to user emulation, restrict it to system emulation.
Signed-off-by: Philippe Mathieu-Daudé
---
cpu-target.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/cpu-target.c b/cpu-target.c
index c4ea795bdd..7e4241c3
Keep system/watchpoint.c accelerator-agnostic by moving
TCG specific code to accel/tcg/watchpoint.c. Update meson.
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/watchpoint.c | 143 +
system/watchpoint.c| 124 ---
a
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