Re: [PATCH 01/11] hw/arm/aspeed: Extract code common to all boards to a common file

On 10/24/23 18:24, Philippe Mathieu-Daudé wrote: aspeed_soc.c contains definitions specific to the AST2400 and AST2500 SoCs, but also some definitions for other AST SoCs: move them to a common file. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Thanks, C. --- hw

Re: [PATCH 02/11] hw/arm/aspeed: Rename aspeed_soc_init() as AST2400/2500 specific

On 10/24/23 18:24, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Thanks, C. --- hw/arm/aspeed_soc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index f6c2ead4ac

Re: [PATCH 03/11] hw/arm/aspeed: Rename aspeed_soc_realize() as AST2400/2500 specific

On 10/24/23 18:24, Philippe Mathieu-Daudé wrote: Keep aspeed_soc_class_init() generic, set the realize handler to aspeed_ast2400_soc_realize() in each 2400/2500 class_init. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Thanks, C. --- hw/arm/aspeed_soc.c | 15 +++

Re: [PATCH 04/11] hw/arm/aspeed: Dynamically allocate AspeedMachineState::soc field

On 10/24/23 18:24, Philippe Mathieu-Daudé wrote: We want to derivate the big AspeedSoCState object in some more SoC-specific ones. Since the object size will vary, allocate it dynamically. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Thanks, C. --- hw/arm/aspee

Re: [PATCH 05/11] hw/arm/aspeed: Introduce TYPE_ASPEED10X0_SOC

On 10/24/23 18:24, Philippe Mathieu-Daudé wrote: TYPE_ASPEED10X0_SOC inherits from TYPE_ASPEED_SOC. In few commits we'll add more fields, but to keep review process simple, don't add any yet. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Thanks, C. --- include/h

Re: [RFC PATCH 9/9] target/ppc: Use tcg_gen_sextract_tl

On Tue Oct 24, 2023 at 11:04 AM AEST, Richard Henderson wrote: > On 10/23/23 09:09, Philippe Mathieu-Daudé wrote: > > Inspired-by: Richard Henderson > > Signed-off-by: Philippe Mathieu-Daudé > > --- > > RFC: Please double-check 32/64 & bits > > --- > > target/ppc/translate.c | 22 --

Re: [PATCH 07/11] hw/arm/aspeed: Introduce TYPE_ASPEED2400_SOC

On 10/24/23 18:24, Philippe Mathieu-Daudé wrote: TYPE_ASPEED2400_SOC inherits from TYPE_ASPEED_SOC. In few commits we'll add more fields, but to keep review process simple, don't add any yet. TYPE_ASPEED_SOC is common to various Aspeed SoCs, define it in aspeed_soc_common.c. Signed-off-by: Phil

Re: [PATCH v2 5/9] target/ppc: Use tcg_gen_extract_i32

On Wed Oct 25, 2023 at 2:58 AM AEST, Philippe Mathieu-Daudé wrote: > Inspired-by: Richard Henderson > Signed-off-by: Philippe Mathieu-Daudé > Reviewed-by: Richard Henderson Reviewed-by: Nicholas Piggin > --- > target/ppc/translate.c | 6 ++ > 1 file changed, 2 insertions(+), 4 deletions(

Re: [PATCH 06/11] hw/arm/aspeed: Introduce TYPE_ASPEED2600_SOC

On 10/24/23 18:24, Philippe Mathieu-Daudé wrote: TYPE_ASPEED2600_SOC inherits from TYPE_ASPEED_SOC. In few commits we'll add more fields, but to keep review process simple, don't add any yet. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Thanks, C. --- include/

Re: [PATCH 08/11] hw/arm/aspeed: Check 'memory' link is set in common aspeed_soc_realize

On 10/24/23 18:24, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Thanks, C. --- hw/arm/aspeed_soc_common.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/hw/arm/aspeed_soc_common.c b/hw/arm/aspeed_soc_common.c ind

Re: [PATCH 09/11] hw/arm/aspeed: Move AspeedSoCState::armv7m to Aspeed10x0SoCState

On 10/24/23 18:24, Philippe Mathieu-Daudé wrote: The v7-M core is specific to the Aspeed 10x0 series, remove it from the common AspeedSoCState. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Thanks, C. --- include/hw/arm/aspeed_soc.h | 5 ++--- hw/arm/aspeed_as

[PATCH 09/29] tcg/arm: Support TCG_COND_TST{EQ,NE}

Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.c.inc | 59 ++-- 1 file changed, 44 insertions(+), 15 deletions(-) diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc index fc78566494..344143cd10 100644 --- a/tcg/arm/tcg-target.c.inc +++ b

[PATCH 13/29] tcg/i386: Support TCG_COND_TST{EQ,NE}

Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 43 +++ 1 file changed, 30 insertions(+), 13 deletions(-) diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc index f4f456a2c0..0d97864174 100644 --- a/tcg/i386/tcg-target.c.inc ++

[PATCH 19/29] tcg/sparc64: Pass TCGCond to tcg_out_cmp

Signed-off-by: Richard Henderson --- tcg/sparc64/tcg-target.c.inc | 21 +++-- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/tcg/sparc64/tcg-target.c.inc b/tcg/sparc64/tcg-target.c.inc index 13ad92b9b6..e958e3c242 100644 --- a/tcg/sparc64/tcg-target.c.inc +++ b/tc

[PATCH 02/29] tcg/optimize: Split out arg_is_const_val

Signed-off-by: Richard Henderson --- tcg/optimize.c | 38 +++--- 1 file changed, 23 insertions(+), 15 deletions(-) diff --git a/tcg/optimize.c b/tcg/optimize.c index 2db5177c32..e8a13fedb5 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -112,11 +112,22 @@ stat

[PATCH 16/29] tcg/riscv: Support TCG_COND_TST{EQ,NE}

Signed-off-by: Richard Henderson --- tcg/riscv/tcg-target.c.inc | 20 ++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc index 34e10e77d9..3997e2f274 100644 --- a/tcg/riscv/tcg-target.c.inc +++ b/tcg/riscv/tc

[PATCH 18/29] tcg/sparc64: Hoist read of tcg_cond_to_rcond

Use a non-zero value here (an illegal encoding) as a better condition than is_unsigned_cond for when MOVR/BPR is usable. Signed-off-by: Richard Henderson --- tcg/sparc64/tcg-target.c.inc | 25 ++--- 1 file changed, 14 insertions(+), 11 deletions(-) diff --git a/tcg/sparc64/t

[PATCH 24/29] tcg/ppc: Support TCG_COND_TST{EQ,NE}

Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 31 +-- 1 file changed, 29 insertions(+), 2 deletions(-) diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index fe141a26f9..5a316f364d 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/t

[PATCH 17/29] tcg/sparc64: Implement tcg_out_extrl_i64_i32

Build fix for missing symbol. Cc: qemu-sta...@nongnu.org Fixes: b8b94ac6753 ("tcg: Split out tcg_out_extrl_i64_i32") Signed-off-by: Richard Henderson --- tcg/sparc64/tcg-target.c.inc | 5 + 1 file changed, 5 insertions(+) diff --git a/tcg/sparc64/tcg-target.c.inc b/tcg/sparc64/tcg-target.c.

[PATCH 21/29] tcg/ppc: Sink tcg_to_bc usage into tcg_out_bc

Rename the current tcg_out_bc function to tcg_out_bc_lab, and create a new function that takes an integer displacement + link. Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 28 +--- 1 file changed, 17 insertions(+), 11 deletions(-) diff --git a/tcg/ppc/

[PATCH 06/29] tcg/optimize: Handle TCG_COND_TST{EQ,NE}

Fold constant comparisons. Canonicalize "tst x,x" to equality vs zero. Canonicalize "tst x,sign" to sign test vs zero. Fold double-word comparisons with zero parts. Fold setcond of "tst x,pow2" to a bit extract. Signed-off-by: Richard Henderson --- tcg/optimize.c | 225 ++

[PATCH 07/29] tcg/aarch64: Support TCG_COND_TST{EQ,NE}

Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target-con-set.h | 4 +-- tcg/aarch64/tcg-target.c.inc | 58 +--- 2 files changed, 41 insertions(+), 21 deletions(-) diff --git a/tcg/aarch64/tcg-target-con-set.h b/tcg/aarch64/tcg-target-con-set.h index 3fdee2

[PATCH 15/29] tcg/mips: Support TCG_COND_TST{EQ,NE}

Signed-off-by: Richard Henderson --- tcg/mips/tcg-target.c.inc | 41 +++ 1 file changed, 41 insertions(+) diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc index 328984ccff..739a0f60b7 100644 --- a/tcg/mips/tcg-target.c.inc +++ b/tcg/mips/tcg-

[PATCH 29/29] target/alpha: Use TCG_COND_TSTNE for gen_fold_mzero

Signed-off-by: Richard Henderson --- target/alpha/translate.c | 49 +++- 1 file changed, 23 insertions(+), 26 deletions(-) diff --git a/target/alpha/translate.c b/target/alpha/translate.c index c7daf46de7..c68c2bcd21 100644 --- a/target/alpha/translate.c +++ b

[PATCH 20/29] tcg/sparc64: Support TCG_COND_TST{EQ,NE}

Signed-off-by: Richard Henderson --- tcg/sparc64/tcg-target.c.inc | 16 ++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/tcg/sparc64/tcg-target.c.inc b/tcg/sparc64/tcg-target.c.inc index e958e3c242..feeb318c39 100644 --- a/tcg/sparc64/tcg-target.c.inc +++ b/tcg/spar

[PATCH 26/29] tcg/tci: Support TCG_COND_TST{EQ,NE}

Signed-off-by: Richard Henderson --- tcg/tci.c | 14 ++ 1 file changed, 14 insertions(+) diff --git a/tcg/tci.c b/tcg/tci.c index 4640902c88..5e1c4a491d 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -228,6 +228,12 @@ static bool tci_compare32(uint32_t u0, uint32_t u1, TCGCond condition)

[PATCH 22/29] tcg/ppc: Use cr0 in tcg_to_bc and tcg_to_isel

Using cr0 means we could choose to use rc=1 to compute the condition. Adjust the tables and tcg_out_cmp that feeds them. Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 68 1 file changed, 34 insertions(+), 34 deletions(-) diff --git a/tc

[PATCH 00/29] tcg: Introduce TCG_COND_TST{EQ,NE}

Inspired by some other patch review this week, expose a pair of comparison operators that map to the "test" comparison that is available on many architectures. Convert target/alpha to use this as an exemplar. r~ Richard Henderson (29): tcg: Introduce TCG_COND_TST{EQ,NE} tcg/optimize: Split

[PATCH 03/29] tcg/optimize: Split out do_constant_folding_cond1

Handle modifications to the arguments and condition in a single place. Signed-off-by: Richard Henderson --- tcg/optimize.c | 57 -- 1 file changed, 27 insertions(+), 30 deletions(-) diff --git a/tcg/optimize.c b/tcg/optimize.c index e8a13fedb5..89

[PATCH 23/29] tcg/ppc: Create tcg_out_and_rc

Merge tcg_out_andi32, tcg_out_andi64, and code to handle two register inputs. Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 86 +++- 1 file changed, 40 insertions(+), 46 deletions(-) diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target

[PATCH 04/29] tcg/optimize: Do swap_commutative2 in do_constant_folding_cond2

Mirror the new do_constant_folding_cond1 by doing all argument and condition adjustment within one helper. Signed-off-by: Richard Henderson --- tcg/optimize.c | 107 ++--- 1 file changed, 57 insertions(+), 50 deletions(-) diff --git a/tcg/optimize.c b

[PATCH 08/29] tcg/aarch64: Generate TBZ, TBNZ

Test the sign bit for LT/GE vs 0, and TSTNE/EQ vs a power of 2. Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.c.inc | 100 --- 1 file changed, 81 insertions(+), 19 deletions(-) diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc

[PATCH 27/29] target/alpha: Use TCG_COND_TST{EQ,NE} for BLB{C,S}

Signed-off-by: Richard Henderson --- target/alpha/translate.c | 39 --- 1 file changed, 16 insertions(+), 23 deletions(-) diff --git a/target/alpha/translate.c b/target/alpha/translate.c index 32333081d8..49e6a7b62d 100644 --- a/target/alpha/translate.c +++ b/

[PATCH 12/29] tcg/i386: Add rexw argument to tcg_out_testi

Move up above tcg_out_cmp, where it will be used. Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 36 1 file changed, 16 insertions(+), 20 deletions(-) diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc index 6e8af1fcf6..f4f4

[PATCH 11/29] tcg/i386: Move tcg_cond_to_jcc[] into tcg_out_cmp

Return the x86 condition codes to use after the compare. Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 24 +--- 1 file changed, 13 insertions(+), 11 deletions(-) diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc index 0daffb0e70..6e8af1fcf

[PATCH 28/29] target/alpha: Use TCG_COND_TST{EQ,NE} for CMOVLB{C,S}

Signed-off-by: Richard Henderson --- target/alpha/translate.c | 8 ++-- 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/target/alpha/translate.c b/target/alpha/translate.c index 49e6a7b62d..c7daf46de7 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -1676,

[PATCH 14/29] tcg/loongarch64: Support TCG_COND_TST{EQ,NE}

Signed-off-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 56 ++-- 1 file changed, 38 insertions(+), 18 deletions(-) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index ccf133db4b..4e850a29e5 100644 --- a/tcg/loongarch6

Re: [RFC PATCH 9/9] target/ppc: Use tcg_gen_sextract_tl

Hi Nicholas, On 25/10/23 09:09, Nicholas Piggin wrote: On Tue Oct 24, 2023 at 11:04 AM AEST, Richard Henderson wrote: On 10/23/23 09:09, Philippe Mathieu-Daudé wrote: Inspired-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- RFC: Please double-check 32/64 & bits --- target/

[PATCH 25/29] tcg/s390x: Support TCG_COND_TST{EQ,NE}

Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target.c.inc | 127 + 1 file changed, 88 insertions(+), 39 deletions(-) diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index fbee43d3b0..ef3cb87e9f 100644 --- a/tcg/s390x/tcg-target.c.inc

[PATCH 01/29] tcg: Introduce TCG_COND_TST{EQ,NE}

Add the enumerators, adjust the helpers to match, and dump. Not supported anywhere else just yet. Signed-off-by: Richard Henderson --- include/tcg/tcg-cond.h | 49 -- tcg/tcg.c | 4 +++- docs/devel/tcg-ops.rst | 2 ++ 3 files changed, 43 ins

[PATCH 05/29] tcg/optimize: Split out arg_new_constant

Fixes a bug wherein raw uses of tcg_constant_internal do not have their TempOptInfo initialized. Signed-off-by: Richard Henderson --- tcg/optimize.c | 29 ++--- 1 file changed, 18 insertions(+), 11 deletions(-) diff --git a/tcg/optimize.c b/tcg/optimize.c index 76be0fc33

[PATCH 10/29] tcg/i386: Pass x86 condition codes to tcg_out_cmov

Hoist the tcg_cond_to_jcc index outside the function. Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc index a83f8aab30..0daffb0e70 100644 ---

Re: [RFC PATCH 9/9] target/ppc: Use tcg_gen_sextract_tl

On 10/25/23 00:09, Nicholas Piggin wrote: I'd be tempted to use and+movcond instead of sext+andc. That would be simpler / more mechnical following of specification in the ISA. Might be better to save that for a later patch though. Any downsides for backend generation? On host without cmov? Pr

Re: [PATCH 1/1] ui: Replacing pointer in function

Hello! Is there any progress on this patch? От: Marc-André Lureau Отправлено: 16 октября 2023 г. 15:23:42 Кому: Миронов Сергей Владимирович Копия: kra...@redhat.com; qemu-devel@nongnu.org; Linux Verification Center Тема: Re: [PATCH 1/1] ui: Replacing pointer in fu

Re: [PATCH 11/11] hw/arm/aspeed: Move AspeedSoCState::cpu/vic to Aspeed2400SoCState

On 10/24/23 18:24, Philippe Mathieu-Daudé wrote: The ARM array and VIC peripheral are only used by the 2400 series, remove them from the common AspeedSoCState. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Thanks, C. --- include/hw/arm/aspeed_soc.h

Re: [PATCH 10/11] hw/arm/aspeed: Move AspeedSoCState::a7mpcore to Aspeed2600SoCState

On 10/24/23 18:24, Philippe Mathieu-Daudé wrote: The v7-A cluster is specific to the Aspeed 2600 series, remove it from the common AspeedSoCState. The ARM cores belong to the MP cluster, but the array is currently used by TYPE_ASPEED2600_SOC. We'll clean that soon, but for now keep it in Aspeed2

Re: [PATCH 2/4] hw/xen: update Xen PV NIC to XenDevice model

On Tue, 2023-10-24 at 15:47 +0100, Paul Durrant wrote: > > >    > > -    if (netdev->xendev.be_state != XenbusStateConnected) { > > +    if (netdev->rx_ring.sring == NULL) { > > Why not a straight swap for xen_device_backend_get_state()? Hard to see > whether there any hidden side effects of th

Re: [PATCH 1/1] ui: Replacing pointer in function

Hi On Wed, Oct 25, 2023 at 11:42 AM Миронов Сергей Владимирович wrote: > > Hello! Is there any progress on this patch? I queued it, waiting for the freeze (in 2w) to focus on bug fixes. thanks > > > От: Marc-André Lureau > Отправлено: 16 октября 2023 г. 15:23:

Re: [PATCH v5 02/20] tests: Rename test-x86-cpuid.c to test-x86-topo.c

On Tue, Oct 24, 2023 at 11:09:34AM +0200, Thomas Huth wrote: > Date: Tue, 24 Oct 2023 11:09:34 +0200 > From: Thomas Huth > Subject: Re: [PATCH v5 02/20] tests: Rename test-x86-cpuid.c to > test-x86-topo.c > > On 24/10/2023 11.03, Zhao Liu wrote: > > From: Zhao Liu > > > > The tests in this fil

Re: [PATCH 06/12] hw/xen: add get_frontend_path() method to XenDeviceClass

On Tue, 2023-10-24 at 14:37 +0100, Paul Durrant wrote: > > > > Ok, but a prepend to say that a lack of path there means we skip > > > frontend creation seems reasonable? > > > > No, it *is* returning an error. Perhaps I can make it > > > > I understand it is returning an error. I thought the po

Re: [PATCH 12/12] hw/xen: add support for Xen primary console in emulated mode

On 24/10/2023 17:34, David Woodhouse wrote: On Tue, 2023-10-24 at 17:25 +0100, Paul Durrant wrote: On 24/10/2023 16:49, David Woodhouse wrote: On Tue, 2023-10-24 at 16:39 +0100, Paul Durrant wrote: On 24/10/2023 16:37, David Woodhouse wrote: On Tue, 2023-10-24 at 15:20 +0100, Paul Durrant wro

Re: [PATCH v2 28/29] migration: Add direct-io parameter

On Tue, Oct 24, 2023 at 04:32:10PM -0300, Fabiano Rosas wrote: > Markus Armbruster writes: > > > Fabiano Rosas writes: > > > >> Add the direct-io migration parameter that tells the migration code to > >> use O_DIRECT when opening the migration stream file whenever possible. > >> > >> This is cur

Re: [PATCH v2 06/29] migration: Add auto-pause capability

On Mon, Oct 23, 2023 at 05:35:45PM -0300, Fabiano Rosas wrote: > Add a capability that allows the management layer to delegate to QEMU > the decision of whether to pause a VM and perform a non-live > migration. Depending on the type of migration being performed, this > could bring performance benef

Re: [PATCH v3 1/1] migration: vmstate_register() check that instance_id is valid

Peter Xu wrote: >> > IIUC you want to suggest using vmstate_register_any(), but I think it's all >> > fine to do vmstate_register(VMSTATE_INSTANCE_ID_ANY)? You didn't have a >> > commit message, so I am guessing.. >> >> This is v3. v1 and v2 had much more messages, so I thought this was not >>

Re: [PATCH] MAINTAINERS: aspeed: Update Andrew's email address

On 10/24/23 11:36, Cédric Le Goater wrote: On 9/25/23 08:22, Andrew Jeffery wrote: I've changed employers, have company email that deals with patch-based workflows without too much of a headache, and am trying to steer some content out of my personal mail. Signed-off-by: Andrew Jeffery --- Hi

[PULL 00/12] aspeed queue

The following changes since commit a95260486aa7e78d7c7194eba65cf03311ad94ad: Merge tag 'pull-tcg-20231023' of https://gitlab.com/rth7680/qemu into staging (2023-10-23 14:45:46 -0700) are available in the Git repository at: https://github.com/legoater/qemu/ tags/pull-aspeed-202

[PULL 02/12] hw/arm/aspeed: Extract code common to all boards to a common file

From: Philippe Mathieu-Daudé aspeed_soc.c contains definitions specific to the AST2400 and AST2500 SoCs, but also some definitions for other AST SoCs: move them to a common file. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Signed-off-by: Cédric Le Goater --- hw/arm/as

[PULL 08/12] hw/arm/aspeed: Introduce TYPE_ASPEED2400_SOC

From: Philippe Mathieu-Daudé TYPE_ASPEED2400_SOC inherits from TYPE_ASPEED_SOC. In few commits we'll add more fields, but to keep review process simple, don't add any yet. TYPE_ASPEED_SOC is common to various Aspeed SoCs, define it in aspeed_soc_common.c. Signed-off-by: Philippe Mathieu-Daudé

[PULL 10/12] hw/arm/aspeed: Move AspeedSoCState::armv7m to Aspeed10x0SoCState

From: Philippe Mathieu-Daudé The v7-M core is specific to the Aspeed 10x0 series, remove it from the common AspeedSoCState. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Signed-off-by: Cédric Le Goater --- include/hw/arm/aspeed_soc.h | 5 ++--- hw/arm/aspeed_ast10x0.c

[PULL 03/12] hw/arm/aspeed: Rename aspeed_soc_init() as AST2400/2500 specific

From: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Signed-off-by: Cédric Le Goater --- hw/arm/aspeed_soc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index f6c2ead4ace0..bb37

Re: [PATCH 12/12] hw/xen: add support for Xen primary console in emulated mode

On Wed, 2023-10-25 at 09:31 +0100, Paul Durrant wrote: > On 24/10/2023 17:34, David Woodhouse wrote: > > On Tue, 2023-10-24 at 17:25 +0100, Paul Durrant wrote: > > > On 24/10/2023 16:49, David Woodhouse wrote: > > > > On Tue, 2023-10-24 at 16:39 +0100, Paul Durrant wrote: > > > > > On 24/10/2023 16

[PULL 11/12] hw/arm/aspeed: Move AspeedSoCState::a7mpcore to Aspeed2600SoCState

From: Philippe Mathieu-Daudé The v7-A cluster is specific to the Aspeed 2600 series, remove it from the common AspeedSoCState. The ARM cores belong to the MP cluster, but the array is currently used by TYPE_ASPEED2600_SOC. We'll clean that soon, but for now keep it in Aspeed2600SoCState. Signed

[PULL 04/12] hw/arm/aspeed: Rename aspeed_soc_realize() as AST2400/2500 specific

From: Philippe Mathieu-Daudé Keep aspeed_soc_class_init() generic, set the realize handler to aspeed_ast2400_soc_realize() in each 2400/2500 class_init. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Signed-off-by: Cédric Le Goater --- hw/arm/aspeed_soc.c | 15 ++

[PULL 12/12] hw/arm/aspeed: Move AspeedSoCState::cpu/vic to Aspeed2400SoCState

From: Philippe Mathieu-Daudé The ARM array and VIC peripheral are only used by the 2400 series, remove them from the common AspeedSoCState. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Signed-off-by: Cédric Le Goater --- include/hw/arm/aspeed_soc.h | 5 +

[PULL 09/12] hw/arm/aspeed: Check 'memory' link is set in common aspeed_soc_realize

From: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Signed-off-by: Cédric Le Goater --- hw/arm/aspeed_soc_common.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/hw/arm/aspeed_soc_common.c b/hw/arm/aspeed_soc_common.c index b66f76

[PULL 01/12] MAINTAINERS: aspeed: Update Andrew's email address

From: Andrew Jeffery I've changed employers, have company email that deals with patch-based workflows without too much of a headache, and am trying to steer some content out of my personal mail. Signed-off-by: Andrew Jeffery Signed-off-by: Cédric Le Goater --- MAINTAINERS | 2 +- 1 file chang

[PULL 06/12] hw/arm/aspeed: Introduce TYPE_ASPEED10X0_SOC

From: Philippe Mathieu-Daudé TYPE_ASPEED10X0_SOC inherits from TYPE_ASPEED_SOC. In few commits we'll add more fields, but to keep review process simple, don't add any yet. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Signed-off-by: Cédric Le Goater --- include/hw/arm/a

Re: [PATCH 01/12] qemu-file: We only call qemu_file_transferred_* on the sending side

Fabiano Rosas wrote: > Juan Quintela writes: > >> Remove the increase in qemu_file_fill_buffer() and add asserts to >> qemu_file_transferred* functions. > > Patch looks ok, but I would rewrite the whole commit message like this: > > Don't increment qemu_file_transferred at qemu_file_fill_buffer >

[PULL 05/12] hw/arm/aspeed: Dynamically allocate AspeedMachineState::soc field

From: Philippe Mathieu-Daudé We want to derivate the big AspeedSoCState object in some more SoC-specific ones. Since the object size will vary, allocate it dynamically. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Signed-off-by: Cédric Le Goater --- hw/arm/aspeed.c | 1

[PULL 07/12] hw/arm/aspeed: Introduce TYPE_ASPEED2600_SOC

From: Philippe Mathieu-Daudé TYPE_ASPEED2600_SOC inherits from TYPE_ASPEED_SOC. In few commits we'll add more fields, but to keep review process simple, don't add any yet. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Signed-off-by: Cédric Le Goater --- include/hw/arm/a

Re: [PATCH 02/12] qemu_file: Use a stat64 for qemu_file_transferred

Eric Blake wrote: > On Tue, Oct 24, 2023 at 05:10:32PM +0200, Juan Quintela wrote: >> This way we can read it from any thread. >> I checked that it gives the same value than the current one. We never > > s/than/as/ Done >> use to qemu_files at the same time. > > s/to/two/ Done Thanks.

Re: [PATCH v2 28/29] migration: Add direct-io parameter

On Mon, Oct 23, 2023 at 05:36:07PM -0300, Fabiano Rosas wrote: > Add the direct-io migration parameter that tells the migration code to > use O_DIRECT when opening the migration stream file whenever possible. > > This is currently only used for the secondary channels of fixed-ram > migration, whic

[PATCH 4/6] Add RISC-V IOPMP support

Support specification Version 1.0.0-draft4 rapid-k model. Signed-off-by: Ethan Chen --- hw/misc/Kconfig | 3 + hw/misc/meson.build | 1 + hw/misc/riscv_iopmp.c | 881 ++ include/hw/misc/riscv_iopmp.h | 322 + 4 files

[PATCH 0/6] Support RISC-V IOPMP

This series implements IOPMP specification v1.0.0-draft4 rapid-k model: https://github.com/riscv-non-isa/iopmp-spec/blob/main/riscv_iopmp_specification.pdf When IOPMP is enabled, a DMA device ATCDMAC300 is added to RISC-V virt platform. This DMA devce is connected to the IOPMP and has the function

[PATCH 5/6] hw/dma: Add Andes ATCDMAC300 support

Signed-off-by: Ethan Chen --- hw/dma/Kconfig | 3 + hw/dma/atcdmac300.c | 435 hw/dma/meson.build | 1 + include/hw/dma/atcdmac300.h | 171 ++ 4 files changed, 610 insertions(+) create mode 100644 hw/dma/atcdmac30

[PATCH 1/1] Add acpi option to microvm documentation

From: Julius Andreas Hiller --- docs/system/i386/microvm.rst | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/docs/system/i386/microvm.rst b/docs/system/i386/microvm.rst index 1675e37d3e..5e11dbab0d 100644 --- a/docs/system/i386/microvm.rst +++ b/docs/system/i386/microvm

[PATCH 1/6] exec/memory: Introduce the translate_size function within the IOMMU class

IOMMU have size information during translation. Signed-off-by: Ethan Chen --- include/exec/memory.h | 19 +++ 1 file changed, 19 insertions(+) diff --git a/include/exec/memory.h b/include/exec/memory.h index 9087d02769..5520b7c8c0 100644 --- a/include/exec/memory.h +++ b/include

[PATCH] target/arm: kvm64: remove a redundant KVM_CAP_SET_GUEST_DEBUG probe

The KVM_CAP_SET_GUEST_DEBUG is probed during kvm_init(). gdbserver will fail to start if the CAP is not supported. So no need to make another probe here, like other targets. Signed-off-by: Chao Du --- target/arm/kvm64.c | 28 +++- 1 file changed, 7 insertions(+), 21 delet

Re: [PATCH v2 24/29] migration/ram: Ignore multifd flush when doing fixed-ram migration

On Mon, Oct 23, 2023 at 05:36:03PM -0300, Fabiano Rosas wrote: > Some functionalities of multifd are incompatible with the 'fixed-ram' > migration format. > > The MULTIFD_FLUSH flag in particular is not used because in fixed-ram > there is no sinchronicity between migration source and destination

[PATCH 2/6] system/physmem: IOMMU: Invoke the translate_size function if it is implemented

Signed-off-by: Ethan Chen --- system/physmem.c | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/system/physmem.c b/system/physmem.c index fc2b0fee01..53b6ab735c 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -432,8 +432,13 @@ static MemoryRegionSection addres

[PATCH 3/6] exec/memattrs: Add iopmp source id to MemTxAttrs

Signed-off-by: Ethan Chen --- include/exec/memattrs.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/exec/memattrs.h b/include/exec/memattrs.h index d04170aa27..e27b4fab00 100644 --- a/include/exec/memattrs.h +++ b/include/exec/memattrs.h @@ -64,6 +64,9 @@ typedef struct MemTxAttr

[PATCH] target/arm: kvm64: remove a redundant KVM_CAP_SET_GUEST_DEBUG probe

The KVM_CAP_SET_GUEST_DEBUG is probed during kvm_init(). gdbserver will fail to start if the CAP is not supported. So no need to make another probe here, like other targets. Signed-off-by: Chao Du --- target/arm/kvm64.c | 28 +++- 1 file changed, 7 insertions(+), 21 delet

[PATCH 6/6] hw/riscv/virt: Add IOPMP support

- Add 'iopmp=on' option to enable iopmp - Add 'iopmp_cascade=on' option to enable iopmp cascading. Signed-off-by: Ethan Chen --- hw/riscv/Kconfig| 2 ++ hw/riscv/virt.c | 72 +++-- include/hw/riscv/virt.h | 10 +- 3 files changed, 81 inser

[PATCH v2 07/12] migration: migration_transferred_bytes() don't need the QEMUFile

Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Juan Quintela --- migration/migration-stats.h | 4 +--- migration/migration-stats.c | 6 +++--- migration/migration.c | 6 +++--- 3 files changed, 7 insertions(+), 9 deletions(-) diff --git a/migration/migration-stats.h b/migration/migrat

[PATCH v2 00/12] migration: Yet another round of atomic counters

Hi On this v2: - Redid commint for patch 1 - Every other patch is reviewed now. Please review pending patch. Thanks, Juan. [v1] Goal of the whole series was to be able to move rate_limit logic to not use qemu_file. Goal achieved. Removal of trasnferred atomic counter. After this series, we h

[PATCH v2 06/12] qemu-file: Remove _noflush from qemu_file_transferred_noflush()

qemu_file_transferred() don't exist anymore, so we can reuse the name. Reviewed-by: Fabiano Rosas Signed-off-by: Juan Quintela --- v2: Update the documentation (thanks fabiano) --- migration/qemu-file.h | 9 - migration/block.c | 4 ++-- migration/qemu-file.c | 2 +- migration/sav

[PATCH 0/1] Add acpi option to microvm documentation

Microvm machine received ACPI support which impacts passing of mmio devices to guests without ACPI support. Without acpi=off, auto-kernel-cmdline will be ignored. Julius Andreas Hiller (1): added acpi option docs/system/i386/microvm.rst | 6 -- 1 file changed, 4 insertions(+), 2 deletions

[PATCH v2 08/12] migration: migration_rate_limit_reset() don't need the QEMUFile

Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Juan Quintela --- migration/migration-stats.h | 4 +--- migration/migration-stats.c | 2 +- migration/migration.c | 2 +- 3 files changed, 3 insertions(+), 5 deletions(-) diff --git a/migration/migration-stats.h b/migration/migration-stat

[PATCH v2 01/12] qemu-file: Don't increment qemu_file_transferred at qemu_file_fill_buffer

We only call qemu_file_transferred_* on the sending side. Remove the increment at qemu_file_fill_buffer() and add asserts to qemu_file_transferred* functions. Signed-off-by: Juan Quintela --- migration/qemu-file.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/migration/q

[PATCH v2 11/12] migration: Remove transferred atomic counter

After last commit, it is a write only variable. Reviewed-by: Fabiano Rosas Signed-off-by: Juan Quintela --- migration/migration-stats.h | 4 migration/multifd.c | 3 --- migration/ram.c | 1 - 3 files changed, 8 deletions(-) diff --git a/migration/migration-stats.h b/m

[PATCH v2 02/12] qemu_file: Use a stat64 for qemu_file_transferred

This way we can read it from any thread. I checked that it gives the same value as the current one. We never use two qemu_files at the same time. Reviewed-by: Fabiano Rosas Signed-off-by: Juan Quintela --- migration/migration-stats.h | 4 migration/qemu-file.c | 5 +++-- 2 files cha

[PATCH v2 05/12] qemu_file: Remove unused qemu_file_transferred()

Reviewed-by: Fabiano Rosas Signed-off-by: Juan Quintela --- migration/qemu-file.h | 18 -- migration/qemu-file.c | 7 --- 2 files changed, 25 deletions(-) diff --git a/migration/qemu-file.h b/migration/qemu-file.h index a29c37b0d0..8b71152754 100644 --- a/migration/qemu-fil

[PATCH v2 09/12] qemu-file: Simplify qemu_file_get_error()

If we pass a NULL error is the same that returning directly the value. Reviewed-by: Fabiano Rosas Signed-off-by: Juan Quintela --- migration/qemu-file.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/migration/qemu-file.c b/migration/qemu-file.c index 0158db2a54..7e738743ce

[PATCH v2 04/12] migration: Use the number of transferred bytes directly

We only use migration_transferred_bytes() to calculate the rate_limit, for that we don't need to flush whatever is on the qemu_file buffer. Remember that the buffer is really small (normal case is 32K if we use iov's can be 64 * TARGET_PAGE_SIZE), so this is not relevant to calculations. Reviewed-

[PATCH v2 12/12] qemu-file: Make qemu_fflush() return errors

This let us simplify code of this shape. qemu_fflush(f); int ret = qemu_file_get_error(f); if (ret) { return ret; } into: int ret = qemu_fflush(f); if (ret) { return ret; } I updated all callers where there is any error check. qemu_fclose() don't need to check f

[PATCH v2 03/12] qemu_file: total_transferred is not used anymore

Reviewed-by: Fabiano Rosas Signed-off-by: Juan Quintela --- migration/qemu-file.c | 4 1 file changed, 4 deletions(-) diff --git a/migration/qemu-file.c b/migration/qemu-file.c index 384985f534..641ab703cc 100644 --- a/migration/qemu-file.c +++ b/migration/qemu-file.c @@ -41,9 +41,6 @@ str

[PATCH v2 10/12] migration: Use migration_transferred_bytes()

There are only two differnces with the old value: - the amount of QEMUFile that hasn't yet been flushed. It can be discussed what is more exact, the new or the old one. - the amount of transferred bytes that we forgot to account for (the newer is better, i.e. exact). Notice that this two val

Re: [PATCH] eeprom_at24c: Model 8-bit data addressing for 16-bit devices

Cc: Klaus On 9/21/23 05:48, Andrew Jeffery wrote: It appears some (many?) EEPROMs that implement 16-bit data addressing will accept an 8-bit address and clock out non-uniform data for the read. This behaviour is exploited by an EEPROM detection routine in part of OpenBMC userspace with a reasona

RE: [Question] x86/microvm: why has_hotpluggable_cpus = false but hot(ub)plug APIs exist?

Hi Igor, > From: Igor Mammedov > Sent: Tuesday, October 24, 2023 9:06 AM > To: Salil Mehta > > On Wed, 18 Oct 2023 17:48:36 +0100 > Salil Mehta wrote: > > > Hi Alex, > > > > On 18/10/2023 16:41, Alex Bennée wrote: > > > > > > Salil Mehta writes: > > > > > >> Hello, > > >> > > >> Came across

Re: [PATCH 00/11] hw/arm/aspeed: Split AspeedSoCState per 2400/2600/10x0

On 24/10/23 18:24, Philippe Mathieu-Daudé wrote: Hi, This series is extracted for a bigger work. Cortex-A MP clusters (TYPE_A15MPCORE_PRIV) should create the ARM cores in its own state. Unfortunately we don't do it that way, and this model calls qemu_get_cpu(). In order to remove the qemu_get_

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