On Sat, Oct 14, 2023 at 09:06:09PM +, Vincent Jardin wrote:
> On 10/14/23 18:37, Michael S. Tsirkin wrote:
> > On Sat, Oct 14, 2023 at 06:22:34PM +0200, Vincent Jardin wrote:
> >> Using interface's settings, let's enforce an always on link up.
> >>
> >> Signed-off-by: Vincent Jardin
> >
> > W
Am 14. Oktober 2023 16:13:19 UTC schrieb BALATON Zoltan :
>On Sat, 14 Oct 2023, Mark Cave-Ayland wrote:
>> On 09/10/2023 20:54, BALATON Zoltan wrote:
>>
>>> The initial value for BARs were set in reset method for emulating
>>> legacy mode at start but this does not work because PCI code resets
Am 5. Oktober 2023 12:45:02 UTC schrieb BALATON Zoltan :
>On Thu, 5 Oct 2023, Bernhard Beschow wrote:
>> According to the datasheet, SCI interrupts of the power management function
>> aren't routed through the PCI pins but rather directly to the integrated PIC.
>> The routing is configurable thr
Richard Henderson writes:
> Remember the value of nb_ops before optimization.
> To be copied into TBStatistics when desired.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
Richard Henderson writes:
> Record the number of ops that are removed during optimization.
> To be copied into TBStatistics when desired.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
Richard Henderson writes:
> Move all of it into accel/tcg/monitor.c. This puts everything
> about tcg that is only used by the monitor in the same place.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
Richard Henderson writes:
> Record the number of times a temporary is forced into memory
> and the store would not have been required if there an infinite
> number of call-saved cpu registers available. This excludes
> stores that are required by semantics to return computed values
> to their
Am 5. Januar 2023 16:32:16 UTC schrieb "Philippe Mathieu-Daudé"
:
>On 5/1/23 16:44, Bernhard Beschow wrote:
>
>> Bernhard Beschow (2):
>>hw/pci-host/bonito: Inline pci_register_root_bus()
>>hw/pci-host/bonito: Map PCI IRQs in board code
>>
>> include/hw/pci-host/bonito.h | 2 ++
>>
On 14/10/2023 17:13, BALATON Zoltan wrote:
On Sat, 14 Oct 2023, Mark Cave-Ayland wrote:
On 09/10/2023 20:54, BALATON Zoltan wrote:
The initial value for BARs were set in reset method for emulating
legacy mode at start but this does not work because PCI code resets
BARs after calling device re
On 14/10/2023 20:43, BALATON Zoltan wrote:
On Sat, 14 Oct 2023, Mark Cave-Ayland wrote:
On 09/10/2023 20:54, BALATON Zoltan wrote:
The initial value for BARs were set in reset method for emulating
legacy mode at start but this does not work because PCI code resets
BARs after calling device res
This series contains fixes and improvements for virtio-net RSS and hash
reporting feature.
V3 -> V4:
Extract patches "tap: Remove tap_receive()" and "net: Remove flag
propagation" from "net: Remove receive_raw()".
Added patch "virtio-net: Always set populate_hash".
Added patch "virtio-net
It was necessary since an Linux older than 2.6.35 may implement the
virtio-net header but may not allow to change its length. Remove it
since such an old Linux is no longer supported.
Signed-off-by: Akihiko Odaki
Acked-by: Michael S. Tsirkin
---
net/tap_int.h | 1 -
net/tap-bsd.c | 5
The member is not cleared during reset so may have a stale value.
Signed-off-by: Akihiko Odaki
---
hw/net/virtio-net.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c
index 20feb20bb1..6eb206f297 100644
--- a/hw/net/virtio-net.c
+++ b/hw/net/virtio-n
calculate_rss_hash() was using hash value 0 to tell if it calculated
a hash, but the hash value may be 0 on a rare occasion. Have a
distinct bool value for correctness.
Fixes: f3fa412de2 ("ebpf: Added eBPF RSS program.")
Signed-off-by: Akihiko Odaki
---
tools/ebpf/rss.bpf.c | 20 +++-
Since qemu_set_vnet_hdr_len() is always called when
qemu_using_vnet_hdr() is called, we can merge them and save some code.
For consistency, express that the virtio-net header is not in use by
returning 0 with qemu_get_vnet_hdr_len() instead of having a dedicated
function, qemu_get_using_vnet_hdr()
vhost requires eBPF for RSS. Even when eBPF is not available, virtio-net
reported RSS availability, and raised a warning only after the
guest requested RSS, and the guest could not know that RSS is not
available.
Check RSS availability during device realization and return an error
if RSS is reques
tap prepends a zeroed virtio-net header when writing a packet to a
tap with virtio-net header enabled but not in use. This only happens
when s->host_vnet_hdr_len == sizeof(struct virtio_net_hdr).
Signed-off-by: Akihiko Odaki
---
net/tap.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
di
RSS is disabled by default.
Fixes: 590790297c ("virtio-net: implement RSS configuration command")
Signed-off-by: Akihiko Odaki
Reviewed-by: Michael Tokarev
---
hw/net/virtio-net.c | 70 +++--
1 file changed, 36 insertions(+), 34 deletions(-)
diff --git a
This saves branches and makes later BPF program changes easier.
Signed-off-by: Akihiko Odaki
---
tools/ebpf/rss.bpf.c | 26 +++---
1 file changed, 11 insertions(+), 15 deletions(-)
diff --git a/tools/ebpf/rss.bpf.c b/tools/ebpf/rss.bpf.c
index 22c75d5912..012af38df1 100644
-
There is no defined flag now.
Signed-off-by: Akihiko Odaki
---
include/net/filter.h| 3 ---
include/net/queue.h | 6 --
include/sysemu/replay.h | 2 +-
net/dump.c | 4 ++--
net/filter-buffer.c | 4 +---
net/filter-mirror.c | 6 ++
net/filter-replay.c
The receive member of NetClientInfo is only for legacy clients and the
receive_iov member is always used when it is set.
Signed-off-by: Akihiko Odaki
---
net/tap.c | 36
1 file changed, 36 deletions(-)
diff --git a/net/tap.c b/net/tap.c
index 087b2d3bc6..668
The code to attach or detach the eBPF program to RSS were duplicated so
unify them into one function to save some code.
Signed-off-by: Akihiko Odaki
---
hw/net/virtio-net.c | 90 ++---
1 file changed, 36 insertions(+), 54 deletions(-)
diff --git a/hw/net/
It makes easier to play with bpftool by allowing it to infer the program
type. It also makes it unnecessary to set the program type manually
when loading the program in ebpf_rss_load().
Signed-off-by: Akihiko Odaki
---
ebpf/rss.bpf.skeleton.h | 1514 ---
ebpf/
The virtio-net header length assertion should happen for any clients.
Signed-off-by: Akihiko Odaki
---
net/net.c | 5 +
net/tap.c | 3 ---
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/net/net.c b/net/net.c
index 1bb4f33a63..6d2fa8d40f 100644
--- a/net/net.c
+++ b/net/net.c
While netmap implements virtio-net header, it does not implement
receive_raw(). Instead of implementing receive_raw for netmap, add
virtio-net headers in the common code and use receive_iov()/receive()
instead. This also fixes the buffer size for the virtio-net header.
Fixes: fbbdbddec0 ("tap: all
Even if eBPF is not available, virtio-net can perform RSS on the
user-space if vhost is disabled although such a configuration results in
a warning. If vhost is enabled, the configuration will be rejected when
realizing the device. Therefore, VIRTIO_NET_F_RSS should not be cleared
even if eBPF is n
The error handling procedures required when rss_bpf__open() and
rss_bpf__load(rss_bpf_ctx) are different so it's better to implement
them separately.
Signed-off-by: Akihiko Odaki
---
ebpf/ebpf_rss.c | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/ebpf/ebpf_rss.c b/
The kernel interprets the returned value as an unsigned 32-bit so -1
will mean queue 4294967295, which is awkward. Return 0 instead.
Signed-off-by: Akihiko Odaki
---
ebpf/rss.bpf.skeleton.h | 1339 +++
tools/ebpf/rss.bpf.c|2 +-
2 files changed, 670 in
This generalizes the rule to generate the skeleton and allows to add
another.
Signed-off-by: Akihiko Odaki
---
tools/ebpf/Makefile.ebpf | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/tools/ebpf/Makefile.ebpf b/tools/ebpf/Makefile.ebpf
index 3391e7ce08..572ca5
virtio-net can report hash values even if the peer does not have a
virtio-net header.
Signed-off-by: Akihiko Odaki
---
hw/net/virtio-net.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c
index 20df40442d..8865825362 100644
--- a/hw/net/virtio-net.c
On 14/10/2023 20:37, BALATON Zoltan wrote:
The initial value for BARs were set in reset method for emulating
legacy mode at start but this does not work because PCI code resets
BARs after calling device reset method. Remove this ineffective
default to avoid confusion.
Instead move setting the B
It is necessary to copy the header only for byte swapping. Worse, when
byte swapping is not needed, the header can be larger than the buffer
due to VIRTIO_NET_F_HASH_REPORT, which results in buffer overflow.
Copy the header only when byte swapping is needed.
Fixes: e22f0603fb ("virtio-net: refere
The VIA south bridgges are now mostly used by other machines not just
fuloong2e so split off into a separate section and take maintanership.
Signed-off-by: BALATON Zoltan
---
v2:
- Rebase on master
- Take Philippe's offer and accept maintaining it (I hope Philippe can
still help with review and
On Sun, 15 Oct 2023, Mark Cave-Ayland wrote:
On 14/10/2023 17:13, BALATON Zoltan wrote:
On Sat, 14 Oct 2023, Mark Cave-Ayland wrote:
On 09/10/2023 20:54, BALATON Zoltan wrote:
The initial value for BARs were set in reset method for emulating
legacy mode at start but this does not work because
Based-on: <20231015140259.259434-1-akihiko.od...@daynix.com>
("[PATCH v4 00/20] virtio-net RSS/hash report fixes and improvements")
I'm proposing to introduce a new BPF program type to report virtio-net
hashes to Linux. This series contain patches to utilize the proposed Linux
feature. The patches
eBPF hash reporting is now available.
Signed-off-by: Akihiko Odaki
---
docs/devel/ebpf_rss.rst | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/docs/devel/ebpf_rss.rst b/docs/devel/ebpf_rss.rst
index 4a68682b31..b015a8a78b 100644
--- a/docs/devel/ebpf_rss.rst
+++ b/docs/d
The vnet_hash BPF program is capable of hash reporting.
Signed-off-by: Akihiko Odaki
---
hw/net/virtio-net.c | 62 ++---
1 file changed, 41 insertions(+), 21 deletions(-)
diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c
index 8865825362..b9d01af39d
On Sat, Oct 14, 2023 at 6:06 PM Richard Henderson <
richard.hender...@linaro.org> wrote:
>
> On 10/14/23 03:01, Paolo Bonzini wrote:
> > +static void prepare_update1_cc(X86DecodedInsn *decode, DisasContext
*s, CCOp op)
> > +{
> > +decode->cc_dst = s->T0;
> > +set_cc_op(s, op);
> > +}
>
> Yo
On Sun, 15 Oct 2023, BALATON Zoltan wrote:
The VIA south bridgges are now mostly used by other machines not just
Noticed typo bridgges -> bridges, hopefully can be fixed when merging and
don't need another version for it.
Regards,
BALATON Zoltan
fuloong2e so split off into a separate secti
Do never set the link down when the vhost-user socket is disconnected.
XXX: currently, it cannot work. It is a reply commit to the former
one that was a RFC on virtio-net. Don't use it.
I do not understand how to get NetdevVhostUserOptions yet.
Signed-off-by: Vincent Jardin
---
net/vhost-user.c
On 10/15/23 10:42, Michael S. Tsirkin wrote:
> On Sat, Oct 14, 2023 at 09:06:09PM +, Vincent Jardin wrote:
>> On 10/14/23 18:37, Michael S. Tsirkin wrote:
>>> On Sat, Oct 14, 2023 at 06:22:34PM +0200, Vincent Jardin wrote:
Using interface's settings, let's enforce an always on link up.
>>>
On 15/10/23 03:00, Mike Frysinger wrote:
Use of the API was removed a while back, but the define wasn't.
The cleanup started in commit 47f7313d81 ("tcg: Create
tcg/tcg-temp-internal.h") and the last use got removed
in d5920b7280 ("tcg: Remove TCGv from tcg_gen_qemu_{ld,st}_*").
Reviewed-by: Ph
On 10/13/23 14:27, Richard Henderson wrote:
The oldest supported cpu is the microsparc 1;
all other cpus use CPU_DEFAULT_FEATURES.
Remove all bits that are always set: FLOAT, SWAP, MUL, DIV,
FLUSH, FSQRT, FMUL.
Signed-off-by: Richard Henderson
I've just found the command-line properties that
On 10/14/23 18:00, Mike Frysinger wrote:
Use of the API was removed a while back, but the define wasn't.
Signed-off-by: Mike Frysinger
---
include/tcg/tcg-op.h | 2 --
1 file changed, 2 deletions(-)
Thanks for the catch.
Queued.
r~
diff --git a/include/tcg/tcg-op.h b/include/tcg/tcg-o
Did anything happen with this, or did it get stuck?
We just had another user hit it in Gentoo at
https://bugs.gentoo.org/915809.
It looks like openembedded (obviously given the author) and Alpine have
been using this for nearly a year.
thanks,
sam
On 10/10/23 05:55, Markus Armbruster wrote:
Richard Henderson writes:
Do not rely on return value of 0 to indicate error,
pass along an Error pointer to be set.
Not wrong, but goes against error.h's recommendation
* - Whenever practical, also return a value that indicates success /
*
Philippe Mathieu-Daudé writes:
> On 3/10/23 20:30, Richard Henderson wrote:
>> From: "Vanderson M. do Rosario"
>> Introduce a MonitorDisasSpace to replace the current is_physical
>> boolean argument to monitor_disas. Generate an error if we attempt
>> to read past the end of a single RAMBlock
On 10/10/23 05:34, Philippe Mathieu-Daudé wrote:
On 3/10/23 20:30, Richard Henderson wrote:
From: Fei Wu
Enable TBStatistics collection from startup.
Signed-off-by: Vanderson M. do Rosario
Signed-off-by: Alex Bennée
Signed-off-by: Fei Wu
[rth: Change "tb_stats_foo" to "tb_stats:foo"]
Signe
On 13/10/2023 22:27, Richard Henderson wrote:
While doing some other testing the other day, I noticed my sparc64
chroot running particularly slowly. I think I know what the problem
is there, but fixing that was going to be particularly ugly with the
existing sparc translator.
So I've converted
Signed-off-by: Bastian Koppelmann
---
target/tricore/helper.h | 1 +
target/tricore/meson.build| 1 +
target/tricore/tricore-semi.c | 197 ++
3 files changed, 199 insertions(+)
create mode 100644 target/tricore/tricore-semi.c
diff --git a/target/tri
Signed-off-by: Bastian Koppelmann
---
target/tricore/tricore-semi.c | 16
1 file changed, 16 insertions(+)
diff --git a/target/tricore/tricore-semi.c b/target/tricore/tricore-semi.c
index 6f321391ef..2188ceeed0 100644
--- a/target/tricore/tricore-semi.c
+++ b/target/tricore/tric
Signed-off-by: Bastian Koppelmann
---
configs/devices/tricore-softmmu/default.mak | 1 +
docs/about/emulation.rst| 3 +++
qemu-options.hx | 3 ++-
target/tricore/translate.c | 13 +++--
4 files changed, 17 insertions(+),
Signed-off-by: Bastian Koppelmann
---
target/tricore/tricore-semi.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/target/tricore/tricore-semi.c b/target/tricore/tricore-semi.c
index ccbeae4bc0..6f321391ef 100644
--- a/target/tricore/tricore-semi.c
+++ b/target/tricore/tricor
Hi,
this patch series implements semihosting as done in the golden Infineon
simulator 'TSIM'. 'TSIM' supports different semihosting variants, specific to
various toolchain vendors. Only the GNU toolchain with Newlib [1] is freely
available, thus I only implemented semihosting for GNU. This port of
Signed-off-by: Bastian Koppelmann
---
target/tricore/tricore-semi.c | 52 +++
1 file changed, 52 insertions(+)
diff --git a/target/tricore/tricore-semi.c b/target/tricore/tricore-semi.c
index 27e1bdc59d..ccbeae4bc0 100644
--- a/target/tricore/tricore-semi.c
+++ b/
Signed-off-by: Bastian Koppelmann
---
target/tricore/tricore-semi.c | 101 ++
1 file changed, 101 insertions(+)
diff --git a/target/tricore/tricore-semi.c b/target/tricore/tricore-semi.c
index 2188ceeed0..34e546c3bf 100644
--- a/target/tricore/tricore-semi.c
+++ b
Am 11. Oktober 2023 18:59:51 UTC schrieb "Philippe Mathieu-Daudé"
:
>PCI functions are plugged on a PCI bus. They can only access
>external memory regions via the bus.
>
>Signed-off-by: Philippe Mathieu-Daudé
With `info mtree` and `info mtree -f` in the QEMU console before and after this
pat
Am 11. Oktober 2023 18:59:53 UTC schrieb "Philippe Mathieu-Daudé"
:
>PCI functions are plugged on a PCI bus. They can only access
>external memory regions via the bus.
>
>Signed-off-by: Philippe Mathieu-Daudé
>---
> hw/pci-host/bonito.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions
On 10/15/23 13:12, Mark Cave-Ayland wrote:
1 ./qemu-system-sparc -cdrom debian-40r4a-sparc-netinst.iso -boot d -bios ss5.bin (Boot
with real SS-5 PROM instead of OpenBIOS)
-> Hangs during PROM memory test
-> Bisected to:
91b579b5293c4c5c3cfaf0214a5523b655dea4fe is the first bad commit
commit 9
With pairs of jmp+rett, pc == DYNAMIC_PC_LOOKUP and
npc == DYNAMIC_PC. Make sure that we exit for interrupts.
Signed-off-by: Richard Henderson
---
Mark, I wonder if this will cure some of your lost interrupt issues.
Spotted while looking at issues from the JMPL+RETT+RETURN patch.
r~
---
targe
On 10/15/23 13:59, Bastian Koppelmann wrote:
Signed-off-by: Bastian Koppelmann
---
target/tricore/tricore-semi.c | 52 +++
1 file changed, 52 insertions(+)
diff --git a/target/tricore/tricore-semi.c b/target/tricore/tricore-semi.c
index 27e1bdc59d..ccbeae4bc0
On Sun, Oct 15, 2023 at 4:05 AM Daniel Henrique Barboza
wrote:
>
>
>
> On 10/14/23 00:35, Akihiko Odaki wrote:
> > TARGET_RISCV64 does not have riscv-32bit-cpu.xml so it shouldn't accept
> > MXL_RV32.
> >
> > Signed-off-by: Akihiko Odaki
> > ---
>
> Reviewed-by: Daniel Henrique Barboza
>
>
> >
On Fri, Oct 13, 2023 at 6:52 PM Emmanouil Pitsidianakis
wrote:
>
> In preparation of raising -Wimplicit-fallthrough to 5, replace all
> fall-through comments with the fallthrough attribute pseudo-keyword.
>
> Signed-off-by: Emmanouil Pitsidianakis
Acked-by: Alistair Francis
Alistair
> ---
>
On Wed, 11 Oct 2023 at 07:28, Nicholas Piggin wrote:
>
> On Tue Oct 10, 2023 at 10:05 PM AEST, Joel Stanley wrote:
> > On Tue, 10 Oct 2023 at 18:24, Nicholas Piggin wrote:
> > >
> > > POWER10 is the latest IBM Power machine. Although it is not offered in
> > > "OPAL mode" (i.e., powernv configura
On 2023/10/13 23:44, Alex Bennée wrote:
> HiSilicon is a wholly owned subsidiary of Huawei so map the domain to
> the same company to avoid splitting the contributions.
>
> Signed-off-by: Alex Bennée
> Cc: Yicong Yang
Reviewed-by: Yicong Yang
> Cc: Jonathan Cameron
> ---
> contrib/gitdm/dom
On Fri, Oct 13, 2023 at 5:07 AM Daniel Henrique Barboza
wrote:
>
>
>
> On 10/11/23 00:01, Alistair Francis wrote:
> > On Sat, Oct 7, 2023 at 12:23 AM Daniel Henrique Barboza
> > wrote:
> >>
> >> Hi,
> >>
> >> Several design changes were made in this version after the reviews and
> >> feedback in
On 10/12/23 03:43, Salil Mehta via wrote:
KVM vCPU creation is done once during the initialization of the VM when Qemu
thread is spawned. This is common to all the architectures.
Hot-unplug of vCPU results in destruction of the vCPU object in QOM but the
corresponding KVM vCPU object in the H
On 10/12/23 03:43, Salil Mehta via wrote:
KVM vCPU creation is done once during the initialization of the VM when Qemu
thread is spawned. This is common to all the architectures.
Hot-unplug of vCPU results in destruction of the vCPU object in QOM but the
corresponding KVM vCPU object in the H
On 10/12/23 03:43, Salil Mehta via wrote:
ACPI GED(as described in the ACPI 6.2 spec) can be used to generate ACPI events
when OSPM/guest receives an interrupt listed in the _CRS object of GED. OSPM
then maps or demultiplexes the event by evaluating _EVT method.
This change adds the support o
在 2023/8/31 上午10:57, Richard Henderson 写道:
This is aimed at improving gvec generated code, which involves large
numbers of loads and stores to the env slots of the guest cpu vector
registers. The final patch helps eliminate redundant zero-extensions
that can appear with e.g. avx2 and sve.
From
On 2023/10/16 10:51, Alistair Francis wrote:
On Sun, Oct 15, 2023 at 4:05 AM Daniel Henrique Barboza
wrote:
On 10/14/23 00:35, Akihiko Odaki wrote:
TARGET_RISCV64 does not have riscv-32bit-cpu.xml so it shouldn't accept
MXL_RV32.
Signed-off-by: Akihiko Odaki
---
Reviewed-by: Daniel H
On Thu, Oct 12, 2023 at 12:52 AM Rob Bradford wrote:
>
> Check the PMU available bitmask when checking if a counter is valid
> rather than comparing the index against the number of PMUs.
>
> Signed-off-by: Rob Bradford
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/csr.c | 5 +++
On Thu, Oct 12, 2023 at 2:37 AM Rob Bradford wrote:
>
> During the FDT generation use the existing mask containing the enabled
> counters rather then generating a new one. Using the existing mask will
> support the use of discontinuous counters.
>
> Signed-off-by: Rob Bradford
Reviewed-by: Alist
On Thu, Oct 12, 2023 at 6:53 PM LIU Zhiwei wrote:
>
>
> On 2023/10/11 22:45, Rob Bradford wrote:
> > Add 32-bit version of mask generating macro and use it in the RISC-V PMU
> > code.
> CC Richard
> > Signed-off-by: Rob Bradford
> > ---
> > include/qemu/bitops.h | 3 +++
> > target/riscv/pmu.c
On Thu, Oct 12, 2023 at 12:52 AM Rob Bradford wrote:
>
> This has been replaced by a "pmu-mask" property that provides much more
> flexibility.
>
> Signed-off-by: Rob Bradford
> ---
> docs/about/deprecated.rst | 10 ++
> 1 file changed, 10 insertions(+)
>
> diff --git a/docs/about/deprec
On Mon, Oct 16, 2023 at 1:22 PM Akihiko Odaki wrote:
>
>
>
> On 2023/10/16 10:51, Alistair Francis wrote:
> > On Sun, Oct 15, 2023 at 4:05 AM Daniel Henrique Barboza
> > wrote:
> >>
> >>
> >>
> >> On 10/14/23 00:35, Akihiko Odaki wrote:
> >>> TARGET_RISCV64 does not have riscv-32bit-cpu.xml so it
On 2023/10/16 13:07, Alistair Francis wrote:
On Mon, Oct 16, 2023 at 1:22 PM Akihiko Odaki wrote:
On 2023/10/16 10:51, Alistair Francis wrote:
On Sun, Oct 15, 2023 at 4:05 AM Daniel Henrique Barboza
wrote:
On 10/14/23 00:35, Akihiko Odaki wrote:
TARGET_RISCV64 does not have riscv-32bi
On Fri, Oct 13, 2023 at 9:02 PM Rob Bradford wrote:
>
> During the FDT generation use the existing mask containing the enabled
> counters rather then generating a new one. Using the existing mask will
> support the use of discontinuous counters.
>
> Signed-off-by: Rob Bradford
> Reviewed-by: LIU
On Fri, Oct 13, 2023 at 9:03 PM Rob Bradford wrote:
>
> Check the PMU available bitmask when checking if a counter is valid
> rather than comparing the index against the number of PMUs.
>
> Signed-off-by: Rob Bradford
> Reviewed-by: LIU Zhiwei
Reviewed-by: Alistair Francis
Alistair
> ---
>
On Fri, Oct 13, 2023 at 11:32 PM Rob Bradford wrote:
>
> Using a mask instead of the number of PMU devices supports the accurate
> emulation of platforms that have a discontinuous set of PMU counters.
>
> Generate a warning if the old property changed from the default but
> still go ahead and use
On Fri, Oct 13, 2023 at 9:04 PM Rob Bradford wrote:
>
> A 32-bit mask can be trivially created using the 64-bit macro so make
> use of that instead.
>
> Signed-off-by: Rob Bradford
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/pmu.c | 4 +---
> 1 file changed, 1 insertion(+), 3
On Fri, Oct 13, 2023 at 2:47 AM Daniel Henrique Barboza
wrote:
>
> Add a leading 'z' to improve grepping. When one wants to search for uses
> of zifencei they're more likely to do 'grep -i zifencei' than 'grep -i
> ifencei'.
>
> Suggested-by: Andrew Jones
> Signed-off-by: Daniel Henrique Barboza
On Fri, Oct 13, 2023 at 4:27 AM Daniel Henrique Barboza
wrote:
>
> Add a leading 'z' to improve grepping. When one wants to search for uses
> of zicsr they're more likely to do 'grep -i zicsr' than 'grep -i icsr'.
>
> Suggested-by: Andrew Jones
> Signed-off-by: Daniel Henrique Barboza
Reviewed-
On Fri, Oct 13, 2023 at 2:47 AM Daniel Henrique Barboza
wrote:
>
> Add a leading 'z' to improve grepping. When one wants to search for uses
> of zicbom they're more likely to do 'grep -i zicbom' than 'grep -i
> icbom'.
>
> Suggested-by: Andrew Jones
> Signed-off-by: Daniel Henrique Barboza
Revi
On Fri, Oct 13, 2023 at 4:07 AM Daniel Henrique Barboza
wrote:
>
> Add a leading 'z' to improve grepping. When one wants to search for uses
> of zicboz they're more likely to do 'grep -i zicboz' than 'grep -i
> icboz'.
>
> Suggested-by: Andrew Jones
> Signed-off-by: Daniel Henrique Barboza
Revi
On 13/10/23 17:44, Alex Bennée wrote:
Signed-off-by: Alex Bennée
Cc: Timothée Cocault
Cc: fanwenjie
---
.mailmap | 2 ++
1 file changed, 2 insertions(+)
diff --git a/.mailmap b/.mailmap
index d214959288..477c1fae2a 100644
--- a/.mailmap
+++ b/.mailmap
@@ -30,10 +30,12 @@ malc malc
# C
On 13/10/23 17:30, Paolo Bonzini wrote:
Install dtc as it is now a mandatory external dependency in order to build QEMU.
Signed-off-by: Paolo Bonzini
---
tests/vm/netbsd | 3 +++
1 file changed, 3 insertions(+)
Reviewed-by: Philippe Mathieu-Daudé
On Wed, Oct 11, 2023 at 7:51 PM Rob Bradford wrote:
>
> On Mon, 2023-10-09 at 11:00 -0700, Atish Kumar Patra wrote:
> > On Sun, Oct 8, 2023 at 5:58 PM Alistair Francis
> > wrote:
> > >
> > > On Wed, Oct 4, 2023 at 7:36 PM Rob Bradford
> > > wrote:
> > > >
> > > > Hi Atish,
> > > >
> > > > On Tue
Hi Mark,
On 13/10/23 20:32, Mark Cave-Ayland wrote:
On 13/10/2023 13:56, Philippe Mathieu-Daudé wrote:
The PPCTimebase structure is only used by the sPAPR machine.
Move its declaration to "hw/ppc/spapr.h".
Move vmstate_ppc_timebase and the VMSTATE_PPC_TIMEBASE_V()
macro to hw/ppc/spapr.c, alon
On Thu, Oct 12, 2023 at 8:03 PM Rajnesh Kanwal wrote:
>
> This change adds support for inserting virtual interrupts from M-mode
> into S-mode using mvien and mvip csrs. IRQ filtering is a use case of
> this change, i-e M-mode can stop delegating an interrupt to S-mode and
> instead enable it in MI
On Fri, Oct 13, 2023 at 2:47 AM Daniel Henrique Barboza
wrote:
>
> Hi,
>
> This series renames the following internal extensions flags:
>
> ext_ifencei, ext_icsr, ext_icbom, ext_icboz
>
> To add a leading 'z':
>
> ext_zifencei, ext_zicsr, ext_zicbom, ext_zicboz
>
> This was proposed by Andrew Jone
Hi Cédric, Liu, Joao,
On 13/10/23 16:56, Cédric Le Goater wrote:
From: Liu Yi L
This patch modifies pci_setup_iommu() to set PCIIOMMUOps
instead of setting PCIIOMMUFunc. PCIIOMMUFunc is used to
get an address space for a PCI device in vendor specific
way. The PCIIOMMUOps still offers this func
On Wed, Sep 27, 2023 at 4:41 AM Daniel Henrique Barboza
wrote:
>
> This API is used to inspect the characteristics of a given CPU model. It
> also allows users to validate a CPU model with a certain configuration,
> e.g. if "-cpu X,a=true,b=false" is a valid setup for a given QEMU
> binary. We'll
On Wed, Sep 27, 2023 at 6:05 AM Daniel Henrique Barboza
wrote:
>
> The query-cpu-model-expansion API is capable of passing extra properties
> to a given CPU model and tell callers if this custom configuration is
> valid.
>
> The RISC-V version of the API is not quite there yet. The reason is the
>
On Fri, Oct 13, 2023 at 1:26 PM Akihiko Odaki wrote:
>
> On 2023/10/13 14:00, Jason Wang wrote:
> > On Fri, Oct 13, 2023 at 12:14 PM Akihiko Odaki
> > wrote:
> >>
> >> On 2023/10/13 10:38, Jason Wang wrote:
> >>> On Wed, Oct 11, 2023 at 11:40 PM Akihiko Odaki
> >>> wrote:
>
> It was
On Wed, Sep 27, 2023 at 4:42 AM Daniel Henrique Barboza
wrote:
>
> Callers can add 'props' when querying for a cpu model expansion to see
> if a given CPU model supports a certain criteria, and what's the
> resulting CPU object.
>
> If we have 'props' to handle, gather it in a QDict and use the ne
On Wed, Sep 27, 2023 at 4:42 AM Daniel Henrique Barboza
wrote:
>
> Add an API to check if a given CPU is compatible with the current
> accelerator.
>
> This will allow query-cpu-model-expansion to work properly in conditions
> where QEMU supports both accelerators (TCG and KVM), QEMU is then
> lau
On Wed, Sep 27, 2023 at 4:42 AM Daniel Henrique Barboza
wrote:
>
> Use the recently added riscv_cpu_accelerator_compatible() to filter
> unavailable CPUs for a given accelerator. At this moment this is the
> case for a QEMU built with KVM and TCG support querying a binary running
> with TCG:
>
> q
On 2023/10/16 14:25, Jason Wang wrote:
On Fri, Oct 13, 2023 at 1:26 PM Akihiko Odaki wrote:
On 2023/10/13 14:00, Jason Wang wrote:
On Fri, Oct 13, 2023 at 12:14 PM Akihiko Odaki wrote:
On 2023/10/13 10:38, Jason Wang wrote:
On Wed, Oct 11, 2023 at 11:40 PM Akihiko Odaki wrote:
It was n
On Fri, Aug 11, 2023 at 5:01 PM Andrew Jones wrote:
>
> On Thu, Aug 10, 2023 at 02:07:17PM -0400, Alistair Francis wrote:
> > On Tue, Aug 8, 2023 at 6:10 PM Vineet Gupta wrote:
> > >
> > >
> > >
> > > On 8/8/23 14:06, Daniel Henrique Barboza wrote:
> > > > (CCing Alistair and other reviewers)
> >
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