Re: [PATCH 14/20] target/riscv/kvm: do not use riscv_cpu_add_misa_properties()

On Fri, Aug 25, 2023 at 10:08:47AM -0300, Daniel Henrique Barboza wrote: > riscv_cpu_add_misa_properties() is being used to fill the missing KVM > MISA properties but it is a TCG helper that was adapted to do so. We'll > move it to tcg-cpu.c in the next patches, meaning that KVM needs to fill > the

Re: [PATCH 15/20] target/riscv/tcg: introduce tcg_cpu_instance_init()

On Fri, Aug 25, 2023 at 10:08:48AM -0300, Daniel Henrique Barboza wrote: > tcg_cpu_instance_init() will be the 'cpu_instance_init' impl for the TCG > accelerator. It'll be called from within riscv_cpu_post_init(), via > accel_cpu_instance_init(), similar to what happens with KVM. In fact, to > pres

Re: [PATCH 16/20] target/riscv/tcg: move riscv_cpu_add_misa_properties() to tcg-cpu.c

On Fri, Aug 25, 2023 at 10:08:49AM -0300, Daniel Henrique Barboza wrote: > All code related to MISA TCG properties is also moved. > > At this point, all TCG properties handling is done in tcg-cpu.c, all KVM > properties handling is done in kvm-cpu.c. > > Signed-off-by: Daniel Henrique Barboza >

Re: [PATCH 17/20] target/riscv/cpu.c: export isa_edata_arr[]

On Fri, Aug 25, 2023 at 10:08:50AM -0300, Daniel Henrique Barboza wrote: > This array will be read by the TCG accel class, allowing it to handle > priv spec verifications on its own. The array will remain here in cpu.c > because it's also used by the riscv,isa string function. > > To export it we'

Re: [PATCH 18/20] target/riscv/cpu: move priv spec functions to tcg-cpu.c

On Fri, Aug 25, 2023 at 10:08:51AM -0300, Daniel Henrique Barboza wrote: > Priv spec validation is TCG specific. Move it to the TCG accel class. > > Signed-off-by: Daniel Henrique Barboza > --- > target/riscv/cpu.c | 39 -- > target/riscv/cpu.h

Re: [PATCH 19/20] target/riscv: add 'tcg_supported' class property

On Fri, Aug 25, 2023 at 10:08:52AM -0300, Daniel Henrique Barboza wrote: > This property indicates if a CPU supports TCG acceleration. All CPUs but > the 'host' CPU supports it. > > The error in tcg_cpu_realizefn() can now be made generic in case more > non-TCG CPUs are added in the future. > > S

[PATCH v3 4/7] hw/ssi: Check for duplicate CS indexes

This to avoid indexes conflicts on the same SSI bus. Adapt machines using multiple devices on the same bus to avoid breakage. Cc: "Edgar E. Iglesias" Cc: Alistair Francis Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Joel Stanley Signed-off-by: Cédric Le Goater --- hw/arm/stellaris.c

[PATCH v3 6/7] m25p80: Introduce an helper to retrieve the BlockBackend of a device

It will help in getting rid of some drive_get(IF_MTD) calls by retrieving the BlockBackend directly from the m25p80 device. Cc: Alistair Francis Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Joel Stanley Signed-off-by: Cédric Le Goater --- include/hw/block/flash.h | 4 hw/block/m25p80

[PATCH v3 3/7] aspeed/smc: Wire CS lines at reset

Currently, a set of default flash devices is created at machine init and drives defined on the QEMU command line are associated to the FMC and SPI controllers in sequence : -drive file,format=raw,if=mtd -drive file,format=raw,if=mtd The CS lines are wired in the same creation loop. This mak

[PATCH v3 7/7] aspeed: Get the BlockBackend of FMC0 from the flash device

and get rid of an unnecessary drive_get(IF_MTD) call. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Joel Stanley Signed-off-by: Cédric Le Goater --- hw/arm/aspeed.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 271512ce5c

[PATCH v3 0/7] aspeed: Add blockdev support for flash device definition

Hello, This is a respin of series [1] without the patches merged in 8.1. Since I renamed a property as suggested, I though people might want to see the result before the next aspeed PR. It offers the capability to define all CS of all SPI controllers without introducing new machine types, using b

[PATCH v3 5/7] aspeed: Create flash devices only when defaults are enabled

When the -nodefaults option is set, flash devices should be created with : -blockdev node-name=fmc0,driver=file,filename=./flash.img \ -device mx66u51235f,cs=0x0,bus=ssi.0,drive=fmc0 \ To be noted that in this case, the ROM will not be installed and the initial boot sequence (U-Boot loadi

[PATCH v3 2/7] hw/ssi: Introduce a ssi_get_cs() helper

Simple routine to retrieve a DeviceState object on a SPI bus using its CS index. It will be useful for the board to wire the CS lines. Cc: Alistair Francis Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Joel Stanley Signed-off-by: Cédric Le Goater --- include/hw/ssi/ssi.h | 2 ++ hw/ssi/ss

[PATCH v3 1/7] hw/ssi: Add a "cs" property to SSIPeripheral

Boards will use this new property to identify the device CS line and wire the SPI controllers accordingly. Cc: Alistair Francis Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Joel Stanley Signed-off-by: Cédric Le Goater --- include/hw/ssi/ssi.h | 3 +++ hw/ssi/ssi.c | 7 +++ 2 f

Re: [PATCH 20/20] target/riscv: add 'kvm_supported' class property

On Fri, Aug 25, 2023 at 10:08:53AM -0300, Daniel Henrique Barboza wrote: > This follows the same idea of 'tcg_support' property added in the > previous patch. Note that we're now implementing the 'cpu_realizefn' for > the KVMAccel class since this verification is done in realize() time. > > Suppor

Re: [PATCH v2 1/2] hw/riscv/virt.c: fix non-KVM --enable-debug build

On 31/8/23 10:42, Andrew Jones wrote: On Wed, Aug 30, 2023 at 10:35:02AM -0300, Daniel Henrique Barboza wrote: A build with --enable-debug and without KVM will fail as follows: /usr/bin/ld: libqemu-riscv64-softmmu.fa.p/hw_riscv_virt.c.o: in function `virt_machine_init': ./qemu/build/../hw/risc

Re: [PATCH RESEND v8 01/20] target/riscv/cpu.c: split CPU options from riscv_cpu_extensions[]

On Thu, Aug 24, 2023 at 07:14:21PM -0300, Daniel Henrique Barboza wrote: > We'll add a new CPU type that will enable a considerable amount of > extensions. To make it easier for us we'll do a few cleanups in our > existing riscv_cpu_extensions[] array. > > Start by splitting all CPU non-boolean op

Re: [PATCH RESEND v8 02/20] target/riscv/cpu.c: skip 'bool' check when filtering KVM props

On Thu, Aug 24, 2023 at 07:14:22PM -0300, Daniel Henrique Barboza wrote: > After the introduction of riscv_cpu_options[] all properties in > riscv_cpu_extensions[] are booleans. This check is now obsolete. > > Signed-off-by: Daniel Henrique Barboza > Reviewed-by: Alistair Francis > --- > target

Re: [PATCH RESEND v8 03/20] target/riscv/cpu.c: split kvm prop handling to its own helper

On Thu, Aug 24, 2023 at 07:14:23PM -0300, Daniel Henrique Barboza wrote: > Future patches will split the existing Property arrays even further, and > the existing code in riscv_cpu_add_user_properties() will start to scale > bad with it because it's dealing with KVM constraints mixed in with TCG >

Re: [PATCH RESEND v8 04/20] target/riscv: add DEFINE_PROP_END_OF_LIST() to riscv_cpu_options[]

On Thu, Aug 24, 2023 at 07:14:24PM -0300, Daniel Henrique Barboza wrote: > Add DEFINE_PROP_END_OF_LIST() and eliminate the ARRAY_SIZE() usage when > iterating in the riscv_cpu_options[] array, making it similar to what > we already do when working with riscv_cpu_extensions[]. > > We also have a mo

[PULL 02/41] accel/tcg: spelling fixes

From: Michael Tokarev Signed-off-by: Michael Tokarev Message-ID: <20230823065335.1919380-18-...@tls.msk.ru> Reviewed-by: Alex Bennée Message-ID: <20230823065335.1919380-19-...@tls.msk.ru> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/tcg-cpu-ops.h | 2 +- include/tcg/helper-info.h

[PATCH v2 1/5] migration: Add migration prefix to functions in target.c

The functions in target.c are not static, yet they don't have a proper migration prefix. Add such prefix. Signed-off-by: Avihai Horon Reviewed-by: Cédric Le Goater --- migration/migration.h | 4 ++-- migration/migration.c | 6 +++--- migration/savevm.c| 2 +- migration/target.c| 8 -

[PATCH v2 0/5] vfio/migration: Block VFIO migration with postcopy and background snapshot

Hello, Recently added VFIO migration is not compatible with some of the pre-existing migration features. This was overlooked and today these combinations are not blocked by QEMU. This series fixes it. Postcopy migration: VFIO migration is not compatible with postcopy migration. A VFIO device in t

[PULL 09/41] target/riscv/pmu: Restrict 'qemu/log.h' include to source

Declarations from "riscv/pmu.h" don't need anything from "qemu/log.h", reduce it's inclusion to the source. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20230828221314.18435-3-phi...@linaro.org> --- target/riscv/pmu.h | 1 - target/riscv/pmu.c | 1 + 2 files

[PATCH v2 2/5] vfio/migration: Fail adding device with enable-migration=on and existing blocker

If a device with enable-migration=on is added and it causes a migration blocker, adding the device should fail with a proper error. This is not the case with multiple device migration blocker when the blocker already exists. If the blocker already exists and a device with enable-migration=on is ad

[PULL 04/41] bulk: Do not declare function prototypes using 'extern' keyword

By default, C function prototypes declared in headers are visible, so there is no need to declare them as 'extern' functions. Remove this redundancy in a single bulk commit; do not modify: - meson.build (used to check function availability at runtime) - pc-bios/ - libdecnumber/ - tests/

[PATCH v2 3/5] migration: Add .save_prepare() handler to struct SaveVMHandlers

Add a new .save_prepare() handler to struct SaveVMHandlers. This handler is called early, even before migration starts, and can be used by devices to perform early checks. Suggested-by: Peter Xu Signed-off-by: Avihai Horon --- include/migration/register.h | 5 + migration/savevm.h

Re: [PATCH for-8.2 2/3] pnv/lpc: Hook up xscom region for P9/P10

On Tue, 29 Aug 2023 at 14:45, Cédric Le Goater wrote: > > On 8/9/23 16:56, Frederic Barrat wrote: > > Hello Joel, > > > > So we're re-using the same xscom ops as on P8. A quick look at the > > definition of those 4 registers on P8 (0xb0020) and on P9/P10 (0x00090040) > > seem to show they are no

[PULL 10/41] target/translate: Include missing 'exec/cpu_ldst.h' header

All these files access the CPU LD/ST API declared in "exec/cpu_ldst.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20230828221314.18435-4-phi...@linaro.org> --- target/avr/helper.c | 1 + target/i386/tcg/fpu_helper.c | 1 + target/

[PULL 03/41] qemu/uri: Use QueryParams type definition

Follow QEMU CODING_STYLE, use the type definition, making that prototype match the following two. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell Message-Id: <20230605175647.88395-4-phi...@linaro.org> --- include/qemu/uri.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

[PULL 08/41] target/ppc/pmu: Include missing 'qemu/timer.h' header

Since commit c2eff582a3 ("target/ppc: PMU basic cycle count for pseries TCG") pmu_update_cycles() uses QEMU_CLOCK_VIRTUAL and calls qemu_clock_get_ns(), both defined in "qemu/timer.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20230828221314.18435-2-phi...

[PULL 15/41] target/mips: Remove unused headers in lcsr_helper.c

This files only access the address_space_ld/st API, declared in "exec/cpu-all.h", already included by "cpu.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20230828221314.18435-9-phi...@linaro.org> --- target/mips/tcg/sysemu/lcsr_helper.c | 3 --- 1 file cha

Re: [PATCH RESEND v8 05/20] target/riscv/cpu.c: split non-ratified exts from riscv_cpu_extensions[]

On Thu, Aug 24, 2023 at 07:14:25PM -0300, Daniel Henrique Barboza wrote: > Create a new riscv_cpu_experimental_exts[] to store the non-ratified > extensions properties. Once they are ratified we'll move them back to > riscv_cpu_extensions[]. > > riscv_cpu_add_user_properties() and riscv_cpu_add_kv

[PULL 07/41] exec/address-spaces.h: Remove unuseful 'exec/memory.h' include

"exec/address-spaces.h" declares get_system_io() and get_system_memory(), both returning a MemoryRegion pointer. MemoryRegion is forward declared in "qemu/typedefs.h", so we don't need any declaration from "exec/memory.h" here. Remove it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard

[PULL 00/41] Misc patches for 2023-08-31

The following changes since commit 156618d9ea67f2f2e31d9dedd97f2dcccbe6808c: Merge tag 'block-pull-request' of https://gitlab.com/stefanha/qemu into staging (2023-08-30 09:20:27 -0400) are available in the Git repository at: https://github.com/philmd/qemu.git tags/misc-20230831

[PATCH v2 4/5] vfio/migration: Block VFIO migration with postcopy migration

VFIO migration is not compatible with postcopy migration. A VFIO device in the destination can't handle page faults for pages that have not been sent yet. Doing such migration will cause the VM to crash in the destination: qemu-system-x86_64: VFIO_MAP_DMA failed: Bad address qemu-system-x86_64: v

[PULL 24/41] hw/char/pl011: Replace magic values by register field definitions

0x400 is Data Register Break Error (DR_BE), 0x10 is Line Control Register Fifo Enabled (LCR_FEN) and 0x1 is Send Break (LCR_BRK). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée Reviewed-by: Richard Henderson Message-Id: <20230522153144.30610-7-phi...@linaro.org> --- hw/char/pl0

[PULL 13/41] target/helpers: Remove unnecessary 'exec/cpu_ldst.h' header

These files don't use the CPU ld/st API, remove the unnecessary "exec/cpu_ldst.h" header. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20230828221314.18435-7-phi...@linaro.org> --- target/riscv/pmu.h | 1 - target/cris/op_helper.c

[PULL 16/41] target/xtensa: Include missing 'qemu/atomic.h' header

Since commit fa92bd4af7 ("target/xtensa: fix access to the INTERRUPT SR") these files use QEMU atomic API. Explicit the header inclusion instead of relying on implicit and indirect inclusion. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20230828221314.18435-1

[PULL 26/41] hw/i2c: spelling fixes

From: Michael Tokarev Signed-off-by: Michael Tokarev Message-ID: <20230823065335.1919380-14-...@tls.msk.ru> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/i2c/npcm7xx_smbus.h | 2 +- include/hw/misc/auxbus.h | 2 +- hw/i2c/pm_smbus.c | 2 +- hw/i2c/pmbus_device.c

Re: [PULL 39/41] meson: Fix MESONINTROSPECT parsing

31.08.2023 15:56, Philippe Mathieu-Daudé wrote: From: Akihiko Odaki The arguments in MESONINTROSPECT are quoted with shlex.quote() so it must be parsed with shlex.split(). Fixes: cf60ccc330 ("cutils: Introduce bundle mechanism") Reported-by: Michael Tokarev Signed-off-by: Akihiko Odaki Revie

[PULL 12/41] target/translate: Restrict 'exec/cpu_ldst.h' to user emulation

Only handle_sigsegv_accerr_write(), declared with user emulation, requires "exec/cpu_ldst.h" (for the abi_ptr typedef). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20230828221314.18435-6-phi...@linaro.org> --- include/exec/exec-all.h | 2 +- 1 file changed,

Re: [PATCH RESEND v8 08/20] target/riscv/cpu.c: add riscv_cpu_add_kvm_unavail_prop_array()

On Thu, Aug 24, 2023 at 07:14:28PM -0300, Daniel Henrique Barboza wrote: > Use a helper in riscv_cpu_add_kvm_properties() to eliminate some of its > code repetition. > > Signed-off-by: Daniel Henrique Barboza > --- > target/riscv/cpu.c | 22 +++--- > 1 file changed, 11 insertions

[PULL 39/41] meson: Fix MESONINTROSPECT parsing

From: Akihiko Odaki The arguments in MESONINTROSPECT are quoted with shlex.quote() so it must be parsed with shlex.split(). Fixes: cf60ccc330 ("cutils: Introduce bundle mechanism") Reported-by: Michael Tokarev Signed-off-by: Akihiko Odaki Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Micha

[PULL 40/41] build: Only define OS_OBJECT_USE_OBJC with gcc

From: Alexander Graf Recent versions of macOS use clang instead of gcc. The OS_OBJECT_USE_OBJC define is only necessary when building with gcc. Let's not define it when building with clang. With this patch, I can successfully include GCD headers in QEMU when building with clang. Signed-off-by:

[PULL 05/41] hw/net/i82596: Include missing 'exec/address-spaces.h' header

hw/net/i82596.c access the global 'address_space_memory' calling the ld/st_phys() API. address_space_memory is declared in "exec/address-spaces.h". Currently this header is indirectly pulled in via another header. Explicitly include it to avoid when refactoring unrelated headers: hw/net/i82596.c

Re: [PATCH RESEND v8 06/20] target/riscv/cpu.c: split vendor exts from riscv_cpu_extensions[]

On Thu, Aug 24, 2023 at 07:14:26PM -0300, Daniel Henrique Barboza wrote: > Our goal is to make riscv_cpu_extensions[] hold only ratified, > non-vendor extensions. > > Create a new riscv_cpu_vendor_exts[] array for them, changing > riscv_cpu_add_user_properties() and riscv_cpu_add_kvm_properties()

Re: [PATCH v3 5/7] aspeed: Create flash devices only when defaults are enabled

On Thu, 31 Aug 2023 at 12:39, Cédric Le Goater wrote: > > When the -nodefaults option is set, flash devices should be created > with : > > -blockdev node-name=fmc0,driver=file,filename=./flash.img \ > -device mx66u51235f,cs=0x0,bus=ssi.0,drive=fmc0 \ > > To be noted that in this case, the

[PULL 36/41] util: spelling fixes

From: Michael Tokarev Signed-off-by: Michael Tokarev Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20230823065335.1919380-3-...@tls.msk.ru> Signed-off-by: Philippe Mathieu-Daudé --- include/elf.h | 4 ++-- include/io/channel-socket.h | 4 ++-- include/io/task.h | 2

[PULL 41/41] tests/tcg/aarch64: Rename bti-crt.inc.c -> bti-crt.c.inc

Since commit 139c1837db ("meson: rename included C source files to .c.inc"), QEMU standard procedure for included C files is to use *.c.inc. Besides, since commit 6a0057aa22 ("docs/devel: make a statement about includes") this is documented as the Coding Style: If you do use template header fil

[PULL 06/41] hw/dma/etraxfs: Include missing 'exec/memory.h' header

The 'fs_dma_ctrl' structure has a MemoryRegion 'mmio' field which is initialized in etraxfs_dmac_init() calling memory_region_init_io() and memory_region_add_subregion(). These functions are declared in "exec/memory.h", along with the MemoryRegion structure. Include the missing header. Signed-off

[PULL 33/41] hw/i386: Remove unuseful kvmclock_create() stub

We shouldn't call kvmclock_create() when KVM is not available or disabled: - check for kvm_enabled() before calling it - assert KVM is enabled once called Since the call is elided when KVM is not available, we can remove the stub (it is never compiled). Signed-off-by: Philippe Mathieu-Daudé Rev

[PULL 30/41] hw/sd: spelling fixes

From: Michael Tokarev Signed-off-by: Michael Tokarev Message-ID: <20230823065335.1919380-18-...@tls.msk.ru> Signed-off-by: Philippe Mathieu-Daudé --- hw/sd/sd.c| 2 +- hw/sd/sdhci.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/sd/sd.c b/hw/sd/sd.c index 77a717d

[PULL 35/41] util/fifo8: Fix typo in fifo8_push_all() description

Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Francisco Iglesias Reviewed-by: Alex Bennée Message-Id: <20230522153144.30610-2-phi...@linaro.org> --- include/qemu/fifo8.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/qemu/fifo8.h b/include/qemu/fifo8.h index 28

[PULL 14/41] target/helpers: Remove unnecessary 'qemu/main-loop.h' header

"qemu/main-loop.h" declares functions related to QEMU's main loop mutex, which these files don't access. Remove the unused "qemu/main-loop.h" header. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20230828221314.18435-8-phi...@linaro.org> --- target/riscv/pmu.

[PULL 21/41] hw/char/pl011: Restrict MemoryRegionOps implementation access sizes

The pl011_read() and pl011_write() handlers shift the offset argument by 2, so are implemented on a 32-bit boundary. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20230710175102.32429-2-phi...@linaro.org> --- hw/char/pl011.c | 2 ++ 1 file changed, 2 insertio

[PULL 25/41] hw/i2c/pmbus_device: Fix modifying QOM class internals from instance

QOM object instance should not modify its class state (because all other objects instanciated from this class get affected). Instead of modifying the PMBusDeviceClass 'device_num_pages' field the first time a instance is initialized (in pmbus_pages_alloc), introduce a new pmbus_pages_num() helper

[PULL 38/41] docs/style: permit inline loop variables

From: Alex Bennée I've already wasted enough of my time debugging aliased variables in deeply nested loops. While not scattering variable declarations around is a good aim I think we can make an exception for stuff used inside a loop. Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson R

[PULL 11/41] target/translate: Remove unnecessary 'exec/cpu_ldst.h' header

All these files only access the translator_ld/st API declared in "exec/translator.h". The CPU ld/st API from declared in "exec/cpu_ldst.h" is not used, remove it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20230828221314.18435-5-phi...@linaro.org> --- targ

[PULL 32/41] hw/usb/hcd-xhci: Avoid variable-length array in xhci_get_port_bandwidth()

From: Peter Maydell In xhci_get_port_bandwidth(), we use a variable-length array to construct the buffer to send back to the guest. Avoid the VLA by using dma_memory_set() to directly request the memory system to fill the guest memory with a string of '80's. The codebase has very few VLAs, and i

[PULL 29/41] hw/mips: spelling fixes

From: Michael Tokarev Signed-off-by: Michael Tokarev Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20230823065335.1919380-7-...@tls.msk.ru> Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/malta.c | 2 +- target/mips/tcg/msa_helper.c| 12 ++-- target/mips/tcg/

Re: [PATCH RESEND v8 10/20] target/riscv: add 'max' CPU type

On Thu, Aug 24, 2023 at 07:14:30PM -0300, Daniel Henrique Barboza wrote: > The 'max' CPU type is used by tooling to determine what's the most > capable CPU a current QEMU version implements. Other archs such as ARM > implements this type. Let's add it to RISC-V. > > What we consider "most capable

[PULL 37/41] ui: spelling fixes

From: Michael Tokarev Signed-off-by: Michael Tokarev Message-ID: <20230823065335.1919380-2-...@tls.msk.ru> Signed-off-by: Philippe Mathieu-Daudé --- include/ui/kbd-state.h | 2 +- include/ui/spice-display.h | 2 +- ui/keymaps.h | 2 +- ui/vnc-enc-zywrle.h| 4 ++-- ui/

[PATCH v2 5/5] vfio/migration: Block VFIO migration with background snapshot

Background snapshot allows creating a snapshot of the VM while it's running and keeping it small by not including dirty RAM pages. The way it works is by first stopping the VM, saving the non-iterable devices' state and then starting the VM and saving the RAM while write protecting it with UFFD. T

[PULL 19/41] chardev/char-fe: Document FEWatchFunc typedef

Signed-off-by: Philippe Mathieu-Daudé Acked-by: Marc-André Lureau Message-Id: <20230705133139.54419-4-phi...@linaro.org> --- include/chardev/char-fe.h | 14 ++ 1 file changed, 14 insertions(+) diff --git a/include/chardev/char-fe.h b/include/chardev/char-fe.h index 8c420fa36e..01096

Re: [PATCH RESEND v8 07/20] target/riscv/cpu.c: add riscv_cpu_add_qdev_prop_array()

On Thu, Aug 24, 2023 at 07:14:27PM -0300, Daniel Henrique Barboza wrote: > The code inside riscv_cpu_add_user_properties() became quite repetitive > after recent changes. Add a helper to hide the repetition away. > > Signed-off-by: Daniel Henrique Barboza > --- > target/riscv/cpu.c | 27

[PULL 17/41] qemu/processor: Remove unused 'qemu/atomic.h' header

Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20230828221314.18435-11-phi...@linaro.org> --- include/qemu/processor.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/include/qemu/processor.h b/include/qemu/processor.h index 8e16c9277d..9f0dcdf28f 100644 -

[PATCH] hw/intc/arm_gicv3_its: Avoid maybe-uninitialized error in get_vte()

Fix when using GCC v11.4 (Ubuntu 11.4.0-1ubuntu1~22.04) with CFLAGS=-Og: [4/6] Compiling C object libcommon.fa.p/hw_intc_arm_gicv3_its.c.o FAILED: libcommon.fa.p/hw_intc_arm_gicv3_its.c.o inlined from ‘lookup_vte’ at hw/intc/arm_gicv3_its.c:453:9, inlined from ‘vmovp_callback’ at h

[PULL 28/41] hw/display: spelling fixes

From: Michael Tokarev Signed-off-by: Michael Tokarev Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20230823065335.1919380-15-...@tls.msk.ru> Signed-off-by: Philippe Mathieu-Daudé --- hw/display/bochs-display.c | 2 +- hw/display/qxl.c | 2 +- hw/display/ssd0303.c | 2 +- hw

[PULL 18/41] exec/translation-block: Clean up includes

'qemu/atomic.h' and 'exec/target_page.h' are not used. 'qemu/interval-tree.h' is only required for user emulation. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20230828221314.18435-12-phi...@linaro.org> --- include/exec/translation-block.h | 6 +++--- 1 file

[PULL 22/41] hw/char/pl011: Display register name in trace events

To avoid knowing the register addresses by heart, display their name along in the trace events. Since the MMIO region is 4K wide (0x1000 bytes), displaying the address with 3 digits is enough, so reduce the address format. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée Reviewed-

[PULL 23/41] hw/char/pl011: Remove duplicated PL011_INT_[RT]X definitions

PL011_INT_TX duplicates INT_TX, and PL011_INT_RX INT_RX. Follow other register fields definitions from this file, keep the shorter form. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée Reviewed-by: Richard Henderson Message-Id: <20230522153144.30610-6-phi...@linaro.org> --- hw/c

[PULL 34/41] hw/i386: Rename 'hw/kvm/clock.h' -> 'hw/i386/kvm/clock.h'

kvmclock_create() is only implemented in hw/i386/kvm/clock.h. Restrict the "hw/kvm/clock.h" header to i386 by moving it to hw/i386/. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée Message-Id: <20230620083228.88796-3-phi...@linaro.org> --- {include/hw => hw/i386}/kvm/clock.h | 4

Re: [PATCH RESEND v8 11/20] avocado, risc-v: add opensbi tests for 'max' CPU

On Thu, Aug 24, 2023 at 07:14:31PM -0300, Daniel Henrique Barboza wrote: > Add smoke tests to ensure that we'll not break the 'max' CPU type when > adding new ratified extensions to be enabled. I'm not really sure what this test proves other than we didn't remove the minimally supported set of ext

[PULL 20/41] hw/char: Have FEWatchFunc handlers return G_SOURCE_CONTINUE/REMOVE

GLib recommend to use G_SOURCE_REMOVE / G_SOURCE_CONTINUE for GSourceFunc callbacks. Our FEWatchFunc is a GSourceFunc returning such value. Use such definitions which are "more memorable" [*]. [*] https://docs.gtk.org/glib/callback.SourceFunc.html#return-value Signed-off-by: Philippe Mathieu-Daud

[PULL 27/41] hw/ide: spelling fixes

From: Michael Tokarev Signed-off-by: Michael Tokarev Message-ID: <20230823065335.1919380-14-...@tls.msk.ru> Signed-off-by: Philippe Mathieu-Daudé --- hw/ide/ahci_internal.h | 4 ++-- hw/ide/cmd646.c| 2 +- hw/ide/core.c | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-)

[PULL 31/41] hw/usb: spelling fixes

From: Michael Tokarev Signed-off-by: Michael Tokarev Message-ID: <20230823065335.1919380-14-...@tls.msk.ru> Signed-off-by: Philippe Mathieu-Daudé --- hw/usb/quirks.h | 2 +- hw/usb/ccid-card-emulated.c | 2 +- hw/usb/hcd-ehci.c | 6 +++--- hw/usb/hcd-ohci.c | 2

[Bug 1863025] Re: Use-after-free after flush in TCG accelerator

CVE-2020-24165 was assigned to this: https://nvd.nist.gov/vuln/detail/CVE-2020-24165 I had no involvement in the assignment, posting here for reference only. ** CVE added: https://cve.mitre.org/cgi-bin/cvename.cgi?name=2020-24165 -- You received this bug notification because you are a member of

[PULL 01/41] accel: Remove HAX accelerator

HAX is deprecated since commits 73741fda6c ("MAINTAINERS: Abort HAXM maintenance") and 90c167a1da ("docs/about/deprecated: Mark HAXM in QEMU as deprecated"), released in v8.0.0. Per the latest HAXM release (v7.8 [*]), the latest QEMU supported is v7.2: Note: Up to this release, HAXM supports QE

[PATCH] fix bdrv_open_child return value check

bdrv_open_child() may return NULL. Usually return value is checked for this function. Check for return value is more reliable. Fixes: 24bc15d1f6 ("vmdk: Use BdrvChild instead of BDS for references to extents") Signed-off-by: Dmitry Frolov --- block/vmdk.c | 2 +- 1 file changed, 1 insertion(+)

[PATCH] target/xtensa/mmu: Avoid maybe-uninitialized error in get_phys_page()

Fix when using GCC v11.4 (Ubuntu 11.4.0-1ubuntu1~22.04) with CFLAGS=-Og: target/xtensa/mmu_helper.c: In function ‘helper_pptlb’: target/xtensa/mmu_helper.c:986:35: error: ‘bg_segment’ may be used uninitialized in this function [-Werror=maybe-uninitialized] 986 | return env->config

Re: [PATCH RESEND v8 12/20] target/riscv: deprecate the 'any' CPU type

On Thu, Aug 24, 2023 at 07:14:32PM -0300, Daniel Henrique Barboza wrote: > The 'any' CPU type was introduced in commit dc5bd18fa5725 ("RISC-V CPU > Core Definition"), being around since the beginning. It's not an easy > CPU to use: it's undocumented and its name doesn't tell users much about > what

Re: [PATCH RESEND v8 13/20] target/riscv/cpu.c: use offset in isa_ext_is_enabled/update_enabled

On Thu, Aug 24, 2023 at 07:14:33PM -0300, Daniel Henrique Barboza wrote: > We'll have future usage for a function where, given an offset of the > struct RISCVCPUConfig, the flag is updated to a certain val. > > Change all existing callers to use edata->ext_enable_offset instead of > 'edata'. > >

Re: [PATCH RESEND v8 14/20] target/riscv: make CPUCFG() macro public

On Thu, Aug 24, 2023 at 07:14:34PM -0300, Daniel Henrique Barboza wrote: > The RISC-V KVM driver uses a CPUCFG() macro that calculates the offset > of a certain field in the struct RISCVCPUConfig. We're going to use this > macro in target/riscv/cpu.c as well in the next patches. Make it public. >

Re: [PATCH v3 5/7] aspeed: Create flash devices only when defaults are enabled

On 8/31/23 15:00, Joel Stanley wrote: On Thu, 31 Aug 2023 at 12:39, Cédric Le Goater wrote: When the -nodefaults option is set, flash devices should be created with : -blockdev node-name=fmc0,driver=file,filename=./flash.img \ -device mx66u51235f,cs=0x0,bus=ssi.0,drive=fmc0 \ To be

[PATCH 3/7] ui: Clean up local variable shadowing

Local variables shadowing other local variables or parameters make the code needlessly hard to understand. Tracked down with -Wshadow=local. Clean up: delete inner declarations when they are actually redundant, else rename variables. Signed-off-by: Markus Armbruster --- ui/gtk.c |

[PATCH 6/7] block: Clean up local variable shadowing

Local variables shadowing other local variables or parameters make the code needlessly hard to understand. Tracked down with -Wshadow=local. Clean up: delete inner declarations when they are actually redundant, else rename variables. Signed-off-by: Markus Armbruster --- block.c |

[PATCH 5/7] block/vdi: Clean up local variable shadowing

Local variables shadowing other local variables or parameters make the code needlessly hard to understand. Tracked down with -Wshadow=local. Clean up: delete inner declarations when they are actually redundant, else rename variables. Signed-off-by: Markus Armbruster --- block/vdi.c | 7 +++

[PATCH 1/7] migration/rdma: Fix save_page method to fail on polling error

qemu_rdma_save_page() reports polling error with error_report(), then succeeds anyway. This is because the variable holding the polling status *shadows* the variable the function returns. The latter remains zero. Broken since day one, and duplicated more recently. Fixes: 2da776db4846 (rdma: cor

[PATCH 4/7] block/dirty-bitmap: Clean up local variable shadowing

Local variables shadowing other local variables or parameters make the code needlessly hard to understand. Tracked down with -Wshadow=local. Clean up: delete inner declarations when they are actually redundant, else rename variables. Signed-off-by: Markus Armbruster --- block/monitor/bitmap-qmp

[PATCH 7/7] qobject atomics osdep: Make a few macros more hygienic

Variables declared in macros can shadow other variables. Much of the time, this is harmless, e.g.: #define _FDT(exp) \ do { \ int ret = (exp);

[PATCH 0/7] Steps towards enabling -Wshadow=local

Local variables shadowing other local variables or parameters make the code needlessly hard to understand. Bugs love to hide in such code. Evidence: PATCH 1. Enabling -Wshadow would prevent bugs like this one. But we'd have to clean up all the offenders first. We got a lot of them. Enabling -W

[PATCH 2/7] migration: Clean up local variable shadowing

Local variables shadowing other local variables or parameters make the code needlessly hard to understand. Tracked down with -Wshadow=local. Clean up: delete inner declarations when they are actually redundant, else rename variables. Signed-off-by: Markus Armbruster --- migration/block.c | 4

Re: [RFC PATCH] docs/style: permit inline loop variables

Peter Maydell writes: > On Wed, 23 Aug 2023 at 06:59, Markus Armbruster wrote: >> >> Peter Maydell writes: >> >> > On Tue, 22 Aug 2023 at 16:50, Alex Bennée wrote: >> >> I've already wasted enough of my time debugging aliased variables in >> >> deeply nested loops. >> > >> > In theory we could

Re: [PATCH v2 4/4] io: follow coroutine AioContext in qio_channel_yield()

On Wed, Aug 30, 2023 at 08:54:40AM +0100, Daniel P. Berrangé wrote: > > > > With those minor fixes, > > > > Reviewed-by: Eric Blake > > Acked-by: Daniel P. Berrangé > > Eric, feel free to merge the two io subsystem changes at the same time > as the NBD changes. Ok; I'm queuing this series th

Re: [PATCH v3 0/4] io: follow coroutine AioContext in qio_channel_yield()

On Wed, Aug 30, 2023 at 06:47:58PM -0400, Stefan Hajnoczi wrote: > v3: > - Fix wrong copy-pasted function name in doc comment [Eric] > - Fix "match" -> "matches" in comment [Eric] > v2: > - Add Patch 1 & 2 to remove unused NBD aio_context arguments and dead code > [Fabiano] > - Remove attach/detac

Re: [PATCH RESEND v8 15/20] target/riscv/cpu.c: introduce cpu_cfg_ext_auto_update()

On Thu, Aug 24, 2023 at 07:14:35PM -0300, Daniel Henrique Barboza wrote: > During realize() time we're activating a lot of extensions based on some > criteria, e.g.: > > if (cpu->cfg.ext_zk) { > cpu->cfg.ext_zkn = true; > cpu->cfg.ext_zkr = true; > cpu->cfg.ext_zkt = tr

Re: [PATCH] util/iov: Avoid dynamic stack allocation

On Thu, Aug 31, 2023 at 10:26:17AM +0200, Philippe Mathieu-Daudé wrote: > Cc'ing qemu-block@ (I suppose this will go via a block tree) Makes sense. I can queue it through my NBD tree if no one else beats me (since the nbd code is a heavy user of iovs). > > On 24/8/23 18:47, Peter Maydell wrote:

Re: [PATCH RESEND v8 16/20] target/riscv/cpu.c: use cpu_cfg_ext_auto_update() during realize()

On Thu, Aug 24, 2023 at 07:14:36PM -0300, Daniel Henrique Barboza wrote: > Let's change the other instances in realize() where we're enabling an > extension based on a certain criteria (e.g. it's a dependency of another > extension). > > We're leaving icsr and ifencei being enabled during RVG for

Re: [PATCH 1/7] migration/rdma: Fix save_page method to fail on polling error

On Thu, Aug 31, 2023 at 03:25:40PM +0200, Markus Armbruster wrote: > qemu_rdma_save_page() reports polling error with error_report(), then > succeeds anyway. This is because the variable holding the polling > status *shadows* the variable the function returns. The latter > remains zero. > > Brok

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