On 8/25/23 17:29, Hanna Czenczek wrote:
> On 01.06.23 21:28, Andrey Drobyshev via wrote:
>> Since commit bb1c05973cf ("qemu-img: Use qemu_blockalign"), buffers for
>> the data read from the old and new backing files are aligned using
>> BlockDriverState (or BlockBackend later on) referring to the t
On 8/22/2023 4:24 PM, Daniel P. Berrangé wrote:
> On Tue, Aug 22, 2023 at 08:52:30AM +0200, Markus Armbruster wrote:
>> Xiaoyao Li writes:
>>
>>> From: Isaku Yamahata
>>>
>>> For GetQuote, delegate a request to Quote Generation Service. Add property
>>> of address of quote generation server a
On 8/29/23 15:27, Sam Li wrote:
> Damien Le Moal 于2023年8月29日周二 14:06写道：
>>
>> On 8/28/23 20:55, Sam Li wrote:
> +/* close one implicitly open zones to make it available */
> +for (int i = s->zoned_header.zone_nr_conv;
> +i < bs->bl.nr_zones; ++i) {
>
Damien Le Moal 于2023年8月29日周二 15:14写道：
>
> On 8/29/23 15:27, Sam Li wrote:
> > Damien Le Moal 于2023年8月29日周二 14:06写道：
> >>
> >> On 8/28/23 20:55, Sam Li wrote:
> > +/* close one implicitly open zones to make it available */
> > +for (int i = s->zoned_header.zone_nr_c
This includes a few more patches cleaning up the configure/meson
separation. The highlights are fixing --host-cc, removing the
last traces of compiler detection from config-host.mak, and
dropping the useless pc-bios/Makefile.
Paolo Bonzini (10):
meson: do not unnecessarily use cmake for depende
If dtc is available, compile the .dts files in the pc-bios directory
instead of using the precompiled binaries.
Signed-off-by: Paolo Bonzini
---
pc-bios/Makefile| 19 ---
pc-bios/meson.build | 25 +
2 files changed, 21 insertions(+), 23 deletions(-)
d
Both gvnc and sysprof-capture come with pkg-config files, so specify
the method to find them.
Signed-off-by: Paolo Bonzini
---
tests/migration/meson.build | 2 +-
tests/qtest/meson.build | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/tests/migration/meson.build b/test
The initial reason to write this patch was to remove the last use of
CONFIG_DEBUG_TCG from the makefiles; the flags to use to build TCG
plugins are unrelated to --enable-debug-tcg, and instead they should
be the same as those used to build emulators (the plugins are not build
via meson for demonstr
$(HOST_CC) is only used to invoke the preprocessor, and $(CC) can be
used instead now that there is a Tricore C compiler. Remove the variable
from config-host.mak.
Signed-off-by: Paolo Bonzini
---
configure | 1 -
tests/tcg/tricore/Makefile.softmmu-target | 2 +-
Unsupported CPU and OSes are not really going away, but the
project simply does not guarantee that they work. Rephrase
the messages accordingly. While at it, move the warning for
TCI performance at the end where it is more visible.
Signed-off-by: Paolo Bonzini
---
meson.build | 38
The target OS is invariant and does not depend on the configuration, so move
away from config_host and just use unconditional rules in softmmu_ss.
Signed-off-by: Paolo Bonzini
---
net/meson.build | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/net/meson.bu
CONFIG_DARWIN and CONFIG_SOLARIS are only used in C sources.
Move them to config_host_data.
Signed-off-by: Paolo Bonzini
---
configure | 12
hw/9pfs/meson.build | 4 +++-
meson.build | 2 ++
3 files changed, 5 insertions(+), 13 deletions(-)
diff --git a/configur
Just use $targetos always.
Signed-off-by: Paolo Bonzini
---
configure | 18 ++
1 file changed, 6 insertions(+), 12 deletions(-)
diff --git a/configure b/configure
index eba5befa2cf..aed48db68fd 100755
--- a/configure
+++ b/configure
@@ -374,12 +374,9 @@ fi
# OS specific
-mi
Signed-off-by: Paolo Bonzini
---
configure | 11 +--
meson.build | 3 ++-
meson_options.txt | 2 ++
scripts/meson-buildoptions.sh | 3 +++
4 files changed, 8 insertions(+), 11 deletions(-)
diff --git a/configure b/configure
index aed48
The argument of --host-cc is not obeyed when cross compiling. To avoid
this issue, place it in a configuration file and pass it to meson
with --native-file.
While at it, clarify that --host-cc is not obeyed anyway when _not_
cross compiling.
Signed-off-by: Paolo Bonzini
---
configure | 11
This series has been successfully tested by QE. Start a vm using
pc.ram id but specifying a different memory-backend from the default
one. Check the error message has been improved.
Tested-by: Mario Casquero
On Wed, Aug 23, 2023 at 5:38 PM David Hildenbrand wrote:
>
> For migration purposes, u
Safe signal handling around system calls is mandatory for user-mode
emulation, and requires a small piece of handwritten assembly code.
So refuse to compile unless the common-user/host subdirectory exists
for the host architecture that was detected or selected with --cpu.
Signed-off-by: Paolo Bonz
On Mon, Aug 28, 2023 at 6:11 PM Philippe Mathieu-Daudé
wrote:
>
> On 27/8/23 13:07, Mauro Matteo Cascella wrote:
> > On Sat, Aug 26, 2023 at 4:31 PM Mauro Matteo Cascella
> > wrote:
> >>
> >> On Fri, Jun 24, 2022 at 4:40 PM Mauro Matteo Cascella
> >> wrote:
> >>>
> >>> rocker_tlv_parse_nested co
On 29.08.23 09:06, Andrey Drobyshev wrote:
On 8/25/23 17:29, Hanna Czenczek wrote:
On 01.06.23 21:28, Andrey Drobyshev via wrote:
Since commit bb1c05973cf ("qemu-img: Use qemu_blockalign"), buffers for
the data read from the old and new backing files are aligned using
BlockDriverState (or Block
On 29.08.23 08:44, Andrey Drobyshev wrote:
On 8/25/23 17:14, Hanna Czenczek wrote:
On 06.07.23 18:30, Andrey Drobyshev wrote:
Right now "qemu-img map" reports compressed blocks as containing data
but having no host offset. This is not very informative. Instead,
let's add another boolean field
This series enables shadowed CVQ to intercept
VIRTIO_NET_CTRL_MQ_HASH_CONFIG command through shadowed CVQ,
update the virtio NIC device model so qemu send it in a
migration, and the restore of that Hash calculation state
in the destination.
Note that this patch should be based on
patch "vdpa: Send
This patch introduces vhost_vdpa_net_load_rss() to restore
the hash calculation state at device's startup.
Note that vhost_vdpa_net_load_rss() has `do_rss` argument,
which allows future code to reuse this function to restore
the receive-side scaling state when the VIRTIO_NET_F_RSS
feature is enabl
Enable SVQ with VIRTIO_NET_F_HASH_REPORT feature.
Signed-off-by: Hawkins Jiawei
---
net/vhost-vdpa.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/net/vhost-vdpa.c b/net/vhost-vdpa.c
index 139bb79468..b29f84f54c 100644
--- a/net/vhost-vdpa.c
+++ b/net/vhost-vdpa.c
@@ -118,6 +118,7 @@ stati
On Tue, 29 Aug 2023 16:28:45 +1000
Gavin Shan wrote:
> Hi Igor,
>
> On 8/29/23 00:46, Igor Mammedov wrote:
> > On Mon, 31 Jul 2023 15:07:30 +1000
> > Gavin Shan wrote:
> >> On 7/27/23 19:00, Igor Mammedov wrote:
> >>> On Thu, 27 Jul 2023 15:16:18 +1000
> >>> Gavin Shan wrote:
> >>>
>
From: Cédric Le Goater
The Intel 82576EB GbE Controller say that the Physical and Virtual
Functions support Function Level Reset. Add the capability to each
device model.
Cc: Sriram Yagnaraman
Fixes: 3a977deebe6b ("Intrdocue igb device emulation")
Reviewed-by: Akihiko Odaki
Tested-by: Akihiko
From: Cédric Le Goater
Hello,
Here is a little series adding FLR to the new IGB models.
Thanks,
C.
Cédric Le Goater (2):
igb: Add a VF reset handler
igb: Add Function Level Reset to PF and VF
hw/net/igb_common.h | 1 +
hw/net/igb_core.h | 3 +++
hw/net/igb.c| 9 +
h
From: Cédric Le Goater
Export the igb_vf_reset() helper routine from the PF model to let the
IGBVF model implement its own device reset.
Cc: Akihiko Odaki
Suggested-by: Sriram Yagnaraman
Signed-off-by: Cédric Le Goater
---
hw/net/igb_common.h | 1 +
hw/net/igb_core.h | 3 +++
hw/net/igb.
This series enables shadowed CVQ to intercept RSS command
through shadowed CVQ, update the virtio NIC device model
so qemu send it in a migration, and the restore of that
RSS state in the destination.
Note that this patch should be based on
patch "Vhost-vdpa Shadow Virtqueue Hash calculation Suppo
At present, to enable the VIRTIO_NET_F_RSS feature, eBPF must
be loaded for the vhost backend.
Given that vhost-vdpa is one of the vhost backend, we need to
implement the SetSteeringEBPF method to support RSS for vhost-vdpa,
even if vhost-vdpa calculates the rss hash in the hardware device
instead
Enable SVQ with VIRTIO_NET_F_RSS feature.
Signed-off-by: Hawkins Jiawei
---
net/vhost-vdpa.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/net/vhost-vdpa.c b/net/vhost-vdpa.c
index 85547b7bbb..13da60aeda 100644
--- a/net/vhost-vdpa.c
+++ b/net/vhost-vdpa.c
@@ -119,6 +119,7 @@ static const
This patch reuses vhost_vdpa_net_load_rss() with some
refactorings to restore the receive-side scaling state
at device's startup.
Signed-off-by: Hawkins Jiawei
---
v3:
- resolve conflict with updated patch
"Vhost-vdpa Shadow Virtqueue Hash calculation Support"
v2:
https://lore.kernel.org/all/
On 2023/8/29 13:54, Hawkins Jiawei wrote:
> This patchset allows QEMU to delay polling and checking the device
> used buffer until either the SVQ is full or control commands shadow
> buffers are full, instead of polling and checking immediately after
> sending each SVQ control command, so that QEMU
On Thu, 24 Aug 2023 at 18:15, Stefan Hajnoczi wrote:
>
> On Thu, Aug 24, 2023 at 05:57:40PM +0100, Peter Maydell wrote:
> > Instead of using a variable length array in notify_guest_bh(), always
> > use a fixed sized bitmap (this will be 128 bytes). This means we
> > need to avoid assuming that bi
On Mon, 28 Aug 2023 at 18:00, Thomas Huth wrote:
>
> On 28/08/2023 17.48, Philippe Mathieu-Daudé wrote:
> > On 28/8/23 14:41, Thomas Huth wrote:
> >> On 28/08/2023 14.19, Philippe Mathieu-Daudé wrote:
> >>> Hi Thomas,
> >>>
> >>> On 25/8/23 19:51, Thomas Huth wrote:
> There is an easier way t
On Tue, 2023-06-20 at 13:24 -0400, Joel Upham wrote:
> The primary difference in PCI device IRQ management between Xen HVM and
> QEMU is that Xen PCI IRQs are "device-centric" while QEMU PCI IRQs are
> "chipset-centric". Namely, Xen uses PCI device BDF and INTx as coordinates
> to assert IRQ while
On Tue, 22 Aug 2023 18:49:48 +0200
Thomas Huth wrote:
> The virtio-iommu device might be missing in the QEMU binary (e.g. in
> downstream RHEL builds), so let's better check for its availability first
> before using it.
>
> Signed-off-by: Thomas Huth
Acked-by: Igor Mammedov
> ---
> tests/qt
On Tue, Aug 29, 2023 at 01:31:37PM +0800, Chenyi Qiang wrote:
>
>
> On 8/22/2023 4:24 PM, Daniel P. Berrangé wrote:
> > On Tue, Aug 22, 2023 at 08:52:30AM +0200, Markus Armbruster wrote:
> >> Xiaoyao Li writes:
> >>
> >>> From: Isaku Yamahata
> >>>
> >>> For GetQuote, delegate a request to Quot
On Mon, Aug 28, 2023 at 09:14:41PM +0800, Xiaoyao Li wrote:
> On 8/21/2023 5:58 PM, Daniel P. Berrangé wrote:
> > On Fri, Aug 18, 2023 at 05:50:30AM -0400, Xiaoyao Li wrote:
> > > Originated-from: Isaku Yamahata
> > > Signed-off-by: Xiaoyao Li
> > > ---
> > > qapi/run-state.json | 17
On Tue, Aug 29, 2023 at 10:29:23AM +0200, Paolo Bonzini wrote:
> Unsupported CPU and OSes are not really going away, but the
> project simply does not guarantee that they work. Rephrase
> the messages accordingly. While at it, move the warning for
> TCI performance at the end where it is more vis
On Thu, 10 Aug 2023 14:18:50 +0100
Jonathan Cameron via wrote:
> On Fri, 4 Aug 2023 09:15:13 -0700
> Richard Henderson wrote:
>
> > On 8/4/23 04:09, Mikhail Tyutin wrote:
> > > Apply save_iotlb_data() to io_readx() as well as to io_writex(). This
> > > fixes
> > > SEGFAULT on qemu_plugin_hwa
On Sat, 26 Aug 2023 16:24:14 -0700
Richard Henderson wrote:
> After system startup, run the update to memory_dispatch
> and the tlb_flush on the cpu. This eliminates a race,
> wherein a running cpu sees the memory_dispatch change
> but has not yet seen the tlb_flush.
>
> Since the update now ha
On 29/8/23 11:05, Cédric Le Goater wrote:
From: Cédric Le Goater
Export the igb_vf_reset() helper routine from the PF model to let the
Preferably splitting in 2 patches to KISS,
Reviewed-by: Philippe Mathieu-Daudé
IGBVF model implement its own device reset.
Cc: Akihiko Odaki
Suggested-b
On 23/8/23 17:34, David Hildenbrand wrote:
Let's remap with the proper protection that we can derive from
RAM_READONLY.
Signed-off-by: David Hildenbrand
---
softmmu/physmem.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 23/8/23 17:34, David Hildenbrand wrote:
Let's add some details about VM templating, focusing on the VM memory
configuration only.
There is much more to VM templating (VM state? block devices?), but I leave
that as future work.
Signed-off-by: David Hildenbrand
---
MAINTAINERS
On 25/8/23 12:10, David Hildenbrand wrote:
On 25.08.23 11:59, David Hildenbrand wrote:
On 25.08.23 11:56, Markus Armbruster wrote:
David Hildenbrand writes:
On 25.08.23 11:10, Markus Armbruster wrote:
David Hildenbrand writes:
On 25.08.23 08:57, ThinerLogoer wrote:
Hello,
At 2023-08-23
I am working on aarch64/sbsa-ref machine so people can have virtual
machine to test their OS against something reminding standards compliant
system.
One of tools I use is BSA ACS (Base System Architecture - Architecture
Compliance Suite) [1] written by Arm. It runs set of tests to check does
syst
On Fri, Aug 25, 2023 at 01:15:16PM -0400, Peter Xu wrote:
> Quotting from Markus in his replies:
>
> migrate-set-parameters sets migration parameters, and
> query-migrate-parameters gets them. Unsurprisingly, the former's
> argument type MigrateSetParameters is quite close to the latter's
>
On Fri, Aug 25, 2023 at 01:15:17PM -0400, Peter Xu wrote:
> Drop the enum in qapi because it is never used in QMP APIs. Instead making
> it an internal definition for QEMU so that we can decouple it from QAPI,
> and also we can deduplicate the QAPI documentations.
>
> Signed-off-by: Peter Xu
> -
Move the definition of VhostUserProtocolFeature to
include/hw/virtio/vhost-user.h.
Remove previous definitions in hw/scsi/vhost-user-scsi.c,
hw/virtio/vhost-user.c, and hw/virtio/virtio-qmp.c.
Previously there were 3 separate definitions of this over 3 different
files. Now only 1 definition of th
The virtio_list duplicates information about virtio devices that already
exist in the QOM composition tree. Instead of creating this list of
realized virtio devices, search the QOM composition tree instead.
This patch modifies the QMP command qmp_x_query_virtio to instead
recursively search the QO
These patches update a few things related to virtio introspection via.
QMP/HMP commands.
1. Remove 'virtio_list' and instead query the QOM composition tree to
find any active & realized virtio devices.
The 'virtio_list' was duplicating information about virtio devices that
was already available i
Add new vhost-user protocol feature to vhost-user protocol feature map
and enumeration:
- VHOST_USER_PROTOCOL_F_STATUS
Add new virtio device features for several virtio devices to their
respective feature mappings:
virtio-blk:
- VIRTIO_BLK_F_SECURE_ERASE
virtio-net:
- VIRTIO_NET_F_NOTF_COAL
Commit 6df0b37e2ab breaks a --enable-debug build in a non-KVM
environment with the following error:
/usr/bin/ld: libqemu-riscv64-softmmu.fa.p/hw_intc_riscv_aplic.c.o: in function
`riscv_kvm_aplic_request':
./qemu/build/../hw/intc/riscv_aplic.c:486: undefined reference to `kvm_set_irq'
collect2: e
A build with --enable-debug and without KVM will fail as follows:
/usr/bin/ld: libqemu-riscv64-softmmu.fa.p/hw_riscv_virt.c.o: in function
`virt_machine_init':
./qemu/build/../hw/riscv/virt.c:1465: undefined reference to
`kvm_riscv_aia_create'
This happens because the code block with "if virt_u
Hi,
There is a couple of build problems that sneaked in riscv-to-apply.next
in the KVM AIA patches. Here's a potential solution for them.
Alistair, feel free to squash the fixes in the original commits since
they're not yet on master.
Cc: Yong-Xuan Wang
Daniel Henrique Barboza (2):
hw/intc/r
On Fri, 11 Aug 2023 at 22:42, Richard Henderson
wrote:
>
> The cortex-a710 is a first generation ARMv9.0-A processor.
> diff --git a/target/arm/tcg/cpu64.c b/target/arm/tcg/cpu64.c
> index b12e10d3ab..81c27c70e8 100644
> --- a/target/arm/tcg/cpu64.c
> +++ b/target/arm/tcg/cpu64.c
> @@ -758,6 +758
On Fri, 11 Aug 2023 at 22:42, Richard Henderson
wrote:
>
> This is one of the first generation Armv9 cores, and gives us something
> concrete to test in that area. Notably, it supports MTE.
>
> Changes for v2:
> * Check GMBS during realize.
> * Fix access checks for neoverse implementation re
On Tue, 22 Aug 2023 at 05:27, Richard Henderson
wrote:
>
> With FEAT_FPAC, AUT* instructions that fail authentication
> do not produce an error value but instead fault.
>
> For pauth-2, install a signal handler and verify it gets called.
>
> For pauth-4 and pauth-5, we are explicitly testing the e
On Tue, 22 Aug 2023 at 05:27, Richard Henderson
wrote:
>
> From: Aaron Lindsay
>
> Rename isar_feature_aa64_pauth_arch to isar_feature_aa64_pauth_qarma5
> to distinguish the other architectural algorithm qarma3.
>
> Add ARMPauthFeature and isar_feature_pauth_feature to cover the
> other pauth con
On Tue, 22 Aug 2023 at 05:27, Richard Henderson
wrote:
>
> We have cpu properties to adjust the pauth algorithm for the
> purpose of speed of emulation. Retain the set of pauth features
> supported by the cpu even as the algorithm changes.
>
> This already affects the neoverse-v1 cpu, which has F
On Tue, 29 Aug 2023 at 12:40, Marcin Juszkiewicz
wrote:
>
> I am working on aarch64/sbsa-ref machine so people can have virtual
> machine to test their OS against something reminding standards compliant
> system.
>
> One of tools I use is BSA ACS (Base System Architecture - Architecture
> Complian
On 8/28/23 13:38, Philippe Mathieu-Daudé wrote:
On 25/8/23 15:08, Daniel Henrique Barboza wrote:
Add a KVM accelerator class like we did with TCG. The difference is
that, at least for now, we won't be using a realize() implementation for
this accelerator.
We'll start by assiging kvm_riscv_cp
On Tue, 22 Aug 2023 at 10:51, Philippe Mathieu-Daudé wrote:
>
> When clearing a bitfield we don't need to lead the
"load" ?
> source register. Use deposit_z_i32() with the BFC
> opcode to save a load_reg() call.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> target/arm/tcg/translate.c | 9 +
Hello Thomas,
On 8/28/23 20:52, Thomas Huth wrote:
On 25/08/2023 22.30, Ninad Palsule wrote:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
The LBUS device is embeded inside the scratchpad. The scratchpad
provides a non-functional registers. There is a 1-1 rel
On 8/28/23 17:18, Avihai Horon wrote:
The functions in target.c are not static, yet they don't have a proper
migration prefix. Add such prefix.
Reviewed-by: Cédric Le Goater
Thanks,
C.
Signed-off-by: Avihai Horon
---
migration/migration.h | 4 ++--
migration/migration.c | 6 +++---
On 8/28/23 17:18, Avihai Horon wrote:
If a device with enable-migration=on is added and it causes a migration
blocker, adding the device should fail with a proper error.
This is not the case with multiple device migration blocker when the
blocker already exists. If the blocker already exists and
On Thu, 24 Aug 2023 at 08:54, Alex Bennée wrote:
>
> This is a mandatory feature for Armv8.1 architectures but we don't
> state the feature clearly in our emulation list. Also include
> FEAT_CRC32 comment in aarch64_max_tcg_initfn for ease of grepping.
>
> Reviewed-by: Philippe Mathieu-Daudé
> Si
On 8/28/23 17:18, Avihai Horon wrote:
Add vfio_migratable_devices_num() function, which returns the number of
VFIO devices that are using VFIO migration, and use it in
vfio_multiple_devices_migration_is_supported().
This is done in preparation for next patches which will block VFIO
migration wit
Richard Henderson writes:
> On 8/24/23 09:39, Alex Bennée wrote:
>> Try to bring up the code to more modern standards by:
>>- use dynamic GString built xml over a fixed buffer
>>- use autofree to save on explicit g_free() calls
>>- don't hand hack strstr to find the delimiter
>> Sig
On 8/25/23 18:00, Hanna Czenczek wrote:
> On 01.06.23 21:28, Andrey Drobyshev via wrote:
>> When rebasing an image from one backing file to another, we need to
>> compare data from old and new backings. If the diff between that data
>> happens to be unaligned to the target cluster size, we might e
On Fri, 25 Aug 2023 at 13:22, Jean-Christophe Dubois
wrote:
>
> i.MX7 IOMUX GPR device is not equivalent to i.MX6UL IOMUXC GPR device.
> In particular, register 22 is not present on i.MX6UL and this is actualy
> The only register that is really emulated in the i.MX7 IOMUX GPR device.
>
> Note: The
On 8/28/23 17:18, Avihai Horon wrote:
VFIO migration is not compatible with postcopy migration. A VFIO device
in the destination can't handle page faults for pages that have not been
sent yet.
Doing such migration will cause the VM to crash in the destination:
qemu-system-x86_64: VFIO_MAP_DMA f
On Fri, 25 Aug 2023 at 13:22, Jean-Christophe Dubois
wrote:
>
> * Add Addr and size definition for most i.MX6UL devices in i.MX6UL header
> file.
> * Use those newly defined named constants whenever possible.
> * Standardize the way we init a familly of unimplemented devices
> - SAI
> - PWM
>
On Fri, 25 Aug 2023 at 13:22, Jean-Christophe Dubois
wrote:
>
> * Add Addr and size definition for all i.MX7 devices in i.MX7 header file.
> * Use those newly defined named constants whenever possible.
> * Standardize the way we init a familly of unimplemented devices
> - SAI
> - PWM
> - CAN
The current description says that these options will create a device
on the IDE bus, which is only true on x86. So rephrase these sentences
a little bit to speak of "default bus" instead.
Signed-off-by: Thomas Huth
---
qemu-options.hx | 20
1 file changed, 12 insertions(+),
Hello Jing,
On 8/22/23 09:29, Jing Liu wrote:
Kernel provides the guidance of dynamic MSI-X allocation support of
passthrough device, by clearing the VFIO_IRQ_INFO_NORESIZE flag to
guide user space.
Fetch the flags from host to determine if dynamic MSI-X allocation is
supported.
Originally-by:
On 24/06/2023 01.12, Philippe Mathieu-Daudé wrote:
On 24/6/23 01:08, Philippe Mathieu-Daudé wrote:
HAX is deprecated since commits 73741fda6c ("MAINTAINERS: Abort
HAXM maintenance") and 90c167a1da ("docs/about/deprecated: Mark
HAXM in QEMU as deprecated"), released in v8.0.0.
Per the QEMU depre
Hello Thomas,
On 8/28/23 21:03, Thomas Huth wrote:
On 25/08/2023 22.30, Ninad Palsule wrote:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
The Common FRU Access Macro (CFAM), an address space containing
various "engines" that drive accesses on busses internal
On 8/29/23 15:39, Ninad Palsule wrote:
Hello Thomas,
On 8/28/23 21:03, Thomas Huth wrote:
On 25/08/2023 22.30, Ninad Palsule wrote:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
The Common FRU Access Macro (CFAM), an address space containing
various "engines
Hi Paolo,
I see a new test error that may have been introduced by this pull request:
https://gitlab.com/qemu-project/qemu/-/jobs/4968468877#L131
AVOCADO Downloading avocado tests VM image for s390x
Failed to load plugin from module "avocado.plugins.journal":
ImportError("Module 'sqlite3' is not in
On Tue, Aug 29, 2023 at 02:14:51PM +0100, Peter Maydell wrote:
> On Tue, 29 Aug 2023 at 12:40, Marcin Juszkiewicz
> wrote:
> >
> > I am working on aarch64/sbsa-ref machine so people can have virtual
> > machine to test their OS against something reminding standards compliant
> > system.
> >
> > On
Applied, thanks. In the future, please invoke git-request-pull(1) with
the public HTTPS repo URL to make it easier for anyone to fetch the
changes:
> are available in the Git repository at:
>
> g...@gitlab.com:bsdimp/qemu.git tags/2023q3-bsd-user-pull-request
^^
Please update the
On 29/8/23 13:39, Marcin Juszkiewicz wrote:
I am working on aarch64/sbsa-ref machine so people can have virtual
machine to test their OS against something reminding standards compliant
system.
One of tools I use is BSA ACS (Base System Architecture - Architecture
Compliance Suite) [1] written by
On 29/8/23 15:48, Michael S. Tsirkin wrote:
On Tue, Aug 29, 2023 at 02:14:51PM +0100, Peter Maydell wrote:
On Tue, 29 Aug 2023 at 12:40, Marcin Juszkiewicz
wrote:
I am working on aarch64/sbsa-ref machine so people can have virtual
machine to test their OS against something reminding standards
On 8/22/23 09:29, Jing Liu wrote:
Guests typically enable MSI-X with all of the vectors masked in the MSI-X
vector table. To match the guest state of device, Qemu enables MSI-X by
QEMU is preferred to Qemu.
enabling vector 0 with userspace triggering and immediately release.
However the relea
On Mon, Aug 28, 2023 at 06:18:37PM +0300, Avihai Horon wrote:
> The functions in target.c are not static, yet they don't have a proper
> migration prefix. Add such prefix.
>
> Signed-off-by: Avihai Horon
No issue on the patch itself, but just noticed that we have hard-coded vfio
calls in migrati
On Fri, 25 Aug 2023 at 13:21, Jean-Christophe Dubois
wrote:
>
> This patch adds a few unimplemented TZ devices (TZASC and CSU) to
> i.MX6UL and i.MX7 processors to avoid bare metal application to
> experiment "bus error" when acccessing these devices.
>
> It also adds some internal memory segments
On 25/8/23 19:15, Peter Xu wrote:
Add a test for StrOrNull parameters (tls-*).
Reviewed-by: Fabiano Rosas
Signed-off-by: Peter Xu
---
tests/qtest/migration-test.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/tests/qtest/migration-test.c b/tests/qtest/migration-
On 25/8/23 19:15, Peter Xu wrote:
QEMU will crash if anyone tries to set tls-authz (which is a type
StrOrNull) with 'null' value. Fix it in the easy way by converting it to
qstring just like the other two tls parameters.
Cc: qemu-sta...@nongnu.org # v4.0+
Fixes: d2f1d29b95 ("migration: add supp
On 29/8/23 14:21, Daniel Henrique Barboza wrote:
Commit 6df0b37e2ab breaks a --enable-debug build in a non-KVM
environment with the following error:
/usr/bin/ld: libqemu-riscv64-softmmu.fa.p/hw_intc_riscv_aplic.c.o: in function
`riscv_kvm_aplic_request':
./qemu/build/../hw/intc/riscv_aplic.c:48
On 29/8/23 14:21, Daniel Henrique Barboza wrote:
A build with --enable-debug and without KVM will fail as follows:
/usr/bin/ld: libqemu-riscv64-softmmu.fa.p/hw_riscv_virt.c.o: in function
`virt_machine_init':
./qemu/build/../hw/riscv/virt.c:1465: undefined reference to
`kvm_riscv_aia_create'
On Tue, 2023-06-20 at 13:24 -0400, Joel Upham wrote:
> The primary difference in PCI device IRQ management between Xen HVM and
> QEMU is that Xen PCI IRQs are "device-centric" while QEMU PCI IRQs are
> "chipset-centric". Namely, Xen uses PCI device BDF and INTx as coordinates
> to assert IRQ while
On 29/8/23 10:29, Paolo Bonzini wrote:
If dtc is available, compile the .dts files in the pc-bios directory
instead of using the precompiled binaries.
Signed-off-by: Paolo Bonzini
---
pc-bios/Makefile| 19 ---
pc-bios/meson.build | 25 +
2 files c
On 29/8/23 10:29, Paolo Bonzini wrote:
The target OS is invariant and does not depend on the configuration, so move
away from config_host and just use unconditional rules in softmmu_ss.
Signed-off-by: Paolo Bonzini
---
net/meson.build | 18 ++
1 file changed, 10 insertions(+)
On 29/8/23 10:29, Paolo Bonzini wrote:
CONFIG_DARWIN and CONFIG_SOLARIS are only used in C sources.
Move them to config_host_data.
Signed-off-by: Paolo Bonzini
---
configure | 12
hw/9pfs/meson.build | 4 +++-
meson.build | 2 ++
3 files changed, 5 insertio
On 29/8/23 10:29, Paolo Bonzini wrote:
Just use $targetos always.
Signed-off-by: Paolo Bonzini
---
configure | 18 ++
1 file changed, 6 insertions(+), 12 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
to log an error in case of bad configuration of the XIVE tables by the FW.
Signed-off-by: Cédric Le Goater
---
hw/intc/pnv_xive.c | 27 +++
hw/intc/pnv_xive2.c | 27 +++
2 files changed, 46 insertions(+), 8 deletions(-)
diff --git a/hw/intc/pnv_x
Hello,
Today, the inter chip communication for interrupts uses the
pnv_xive_get_remote() routine to grab the remote XIVE interrupt
controller object. This is a modeling shortcut which can be improved
by implementing :
* remote END triggers
* memory operations on remote NVT structures.
Both are
The notify page of the interrupt controller can either be used to
receive trigger events from the HW controllers (PHB, PSI) or to
reroute interrupts between Interrupt Controllers. In which case, the
VSD table is used to determine the address of the notify page of the
remote IC and the store data is
The XIVE interrupt contoller maintains various fields on interrupt
targets in a structure called NVT. Each unit has a NVT cache, backed
by RAM.
When the NVT structure is not local (in RAM) to the chip, the XIVE
interrupt controller forwards the memory operation to the owning chip
using the PC MMIO
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